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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1
March 2016
FOD8163, FOD8163T
3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in
Stretched Body SOP 6-Pin
Features
• 8 mm Creepage and Clearance Distance, and
0.4 mm Insulation Distance to Achieve Reliable and
High Voltage Insulation
• High Noise Immunity Chara c terized by Common
Mode Transient Immunity (CMTI)
– 20 kV/s Minimum CMTI
• Specifications Guarante ed Over 3 V to 5.5 V Supply
Voltage and -40°C to 100°C Extended Industrial
Temperature Range
• High-Speed, 10 Mbit/s Data Rate (NRZ)
• Safety and Regulatory Approvals
– UL1577, 5,000 VACRMS for 1 Minute
– DIN-EN/IEC60747-5-5, 1,140 V Peak Working
Immunity Insulation Voltage
Applications
• Isolating Intelligent Power Module
• Isolating Industrial Communication Interface
Related Resources
•www.fairchildsemi.com/products/optoelectronics/
•www.fairchildsemi.com/pf/FO/FOD8160.html
•www.fairchildsemi.com/pf/FO/FODM8061.html
•www.fairchildsemi.com/pf/FO/FODM611.html
Description
The FOD8163 series is a 3.3 V / 5 V high-speed logic
gate optocoupler with open-collector output, which
supports isolated communications allowing digital
signals to communicate between systems without
conducting ground loops or hazardous voltages.
The FOD8163 seri es utilizes stretched body package to
achieve 8 mm creepage and clearance distances
(FOD8163T), and optimized IC design to achieve reliably
high-insulation voltage and high-noise immunity.
The FOD8163 series consists of an aluminium gallium
arsenide (AlGaAs) light emitting di ode and an integrated
high-speed photodetecto r. The output of the detector IC
is an open collector schottky-clamped transistor. The
electrical and switching characteristics are guaranteed
over the
extended industrial temperature range of -40°C to
100°C
and a VCC range of 3 V to 5.5 V.
Functional Schematic
Figure 1. Functional Schematic
Figure 2. Package Outline
1
3
6
5
4
ANODE
CATHODE GND
VO
VCC
2
NC
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 2
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Truth Table
Pin Definitions
Pin Configuration
Figure 3. Pin Con fi guration
LED VO
Off HIGH
On LOW
Pin # Name Description
1 ANODE Anode
2 NC Not Connected
3 CATHODE Cathode
4 GND Output Ground
5V
OOutput Voltage
6V
CC Output Supply Voltage
1
3
6
5
4
ANODE
CATHODE GND
V
O
V
CC
2
NC
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 3
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Safety and Insulation Ratings
As per DIN EN/IEC60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit data.
Compliance with the safety ratings shall be ensured by means of protective circuits.
Parameter Characteristics
FOD8163 FOD8163T
Installation Classifications per DIN VDE 0110/1.89 Table 1,
For Rated Mains Voltage
< 150 VRMS I–IV I–IV
< 300 VRMS I–IV I–IV
< 450 VRMS I–III I–IV
< 600 VRMS I–III I–III
Climatic Classification 40/100/21 40/100/21
Pollution Degree (DIN VDE 0110/1.89) 2 2
Comparative Tracking Index 175 175
Symbol Parameter Value Unit
FOD8163 FOD8163T
VPR
Input-to-Output Test V o ltage, Method B, VIORM x 1.875 = VPR,
100% Production Test with tm = 1 s, Partial Discharge < 5 pC 1,671 2,137 Vpeak
Input-to-Output Test Voltage, Method A, VIORM x 1.6 = VPR,
Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC 1,426 1,824 Vpeak
VIORM Maximum Working Insulation V oltage 891 1,140 Vpeak
VIOTM Highest Allowable Over-Voltage 6,000 8,000 Vpeak
External Creepage 8.0 8.0 mm
External Clearance 7.0 8.0 mm
DTI Distance Through Insulation (Insulation Thickness) ≥ 0.4 ≥ 0.4 mm
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure,
TS Case Temperature 150 150 °C
IS,INPUT Input Current 200 200 mA
PS,OUTPUT Output Power 600 600 mW
RIO Insulation Resistance at TS, VIO = 500 V 109 109
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 4
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exp osure to stresses above the reco mmended op erating conditions may affe ct device reliabil ity.
The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.
Note:
1. No derating required up to 100°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Note:
2. 0.1 F bypass capacitor must be connected between pins 4 and 6.
Symbol Parameter Value Unit
TSTG Storage Temperature -40 to +125 °C
TOPR Operating Temperature -40 to +100 °C
TJJunction Temperature -40 to +125 °C
TSOL Lead Solder Temperature
(Refer to Reflow Temperature Profile) 260 for 10 sec °C
Input Characteristics
IFAve r a ge Fo rw ard Input Current 25 mA
VRReverse Input Voltage 5.0 V
PDIInput Power Dissipation(1) 45 mW
Output Characteristics
VCC Supply Voltage 0 to 7.0 V
VOOutput Voltage -0.5 to VCC + 0. 5 V
IOAverage Output Current 50 mA
PDOOutput Power Dissipation(1) 85 mW
Symbol Parameter Min. Max. Unit
TAAmbient Operating Temperature -40 +100 ºC
VCC Supply Voltages(2) 3.0 5.5 V
VFL Logic Low Input Voltage 0 0.8 V
IFL Logic Low Input Current 250 A
IFH Logic High Input Current 6.0 15 mA
N Fan Out (at RL = 1 k) 5 TTL loads
RLOutput Pull-up Resistor 330 4000
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 5
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Isolation Characteristics
Apply over all recommended conditions, typical value is measured at TA = 25°C.
Notes:
3. Device is considered a two-terminal device: pins 1, 2 and 3 are shorted together and pins 4, 5, and 6 are shorted
together.
4. 5,000 VACRMS for 1-minute duration is equivalent to 6,000 VACRMS for 1-second duration.
Electrical Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.0 V VCC 5.5 V; unless otherwise specified.
Typical value is measured at TA = 25°C and VCC = 3.3 V or VCC = 5 V.
Symbol Parameter Conditions Min. Typ. Max. Unit
VISO Input-Output Isolation
Voltage TA = 25°C, R.H. < 50%, t = 1.0 min,
II-O 20 A(3)(4) 5,000 VACRMS
RISO Isolation Resistance VI-O = 500 V(3) 1011
CISO Isolation Capacitance VI-O = 0 V, frequency = 1.0 MHz(3) 1.0 pF
Symbol Parameter Conditions Min. Typ. Max. Unit Figure
Input Characteristics
VFForward Voltage IF = 10 mA 1.05 1.45 1.80 V 4
(VF / TA)Temperature Coefficient
of Forward Voltage -1.8 mV/°C
BVRInput Reverse
Breakdown Voltage IR = 10 A5.0 V
IFHL Threshold Input Current VO = 0.6 V,
IOL(sink) = 13 mA 2.0 6.0 mA 5
Output Characteristics
VOL Logic Low Output
Voltage IF = rated IFHL,
IOL(sink) = 13 mA 0.4 0.6 V 6
IOH Logic High Output
Current IF = 250 A, VO = 3.3 V 8.0 50.0 A7
IF = 250 A, VO = 5.0 V 3.0 40.0 A7
ICCL Logic Low Output
Supply Current IF = 10 mA, VCC = 3.3 V 5.3 8.5 mA 8, 10
IF = 10 mA, VCC = 5.0 V 7.1 10.0 mA 8, 10
ICCH Logic High Output
Supply Current IF = 0 mA, VCC = 3.3 V 3.5 7.0 mA 9, 10
IF = 0 mA, VCC = 5.0 V 5.3 9.0 mA 9, 10
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 6
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Switching Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.3 V VCC 5 V, IF = 6.0 mA; unless othe rwise spec-
ified. Typical value is measured at TA = 25°C and VCC = 3.3 V.
Notes:
5. tPSK is equal to the magnitude of the worst-case difference in tPHL and/or tPLH between any two units from the same
manufacturing date code that are operated at same case temperature (±5° C), at same operating conditions, with
equal loads (RL = 350 , CL = 15 pF), and with an input rise time less than 5 ns.
6. Common-mode transient immunity at output HIGH is the maximum tolerable positive dVcm/dt on the leading edge
of the common-mode impulse signal, VCM, to assure that the output remains HIGH. Common-mode transient
immunity at output LOW is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal,
VCM, to assure that the output remains LOW.
Symbol Parameter Conditions Min. Typ. Max. Unit Figure
Data Rate RL = 350 10 Mbit/sec
tPHL Propagation Delay to
Logic Low Output RL = 350 , CL = 15 pF 42 80 ns 11, 13,
16
tPLH Propagation Delay to
Logic High Output RL = 350 , CL = 15 pF 53 90 ns 11, 13,
16
PWD Pulse Width Distortion,
| tPHL – tPLH|RL = 350 , CL = 15 pF 11 35 ns 12, 14,
16
tPSK Propagation Delay Skew RL = 350 , C L = 15 pF (5) 40 ns
tROutput Rise Time
(10% to 90%) RL = 350 , CL = 15 pF 20 ns 15, 16
tFOutput Fall Time
(90% to 10%) RL = 350 , CL = 15 pF 10 ns 15, 16
| CMH |Common-Mode
Tran sient Immunity at
Output High
IF = 0 mA, VO > 2 V,
VCM = 1500 V(6) 20 40 kV/s17
| CML | Common-Mode
Tran sient Immunity at
Output Low
IF = 6.0 mA, VO < 0.8 V,
VCM = 1500 V(6) 20 40 kV/s17
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 7
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Typical Performance Characteristics
Figure 4. Inpu t LED Current vs.
Forward Voltage Figure 5. Threshold Input Current vs.
Ambient Temperature
Figure 6. Logi c Low Output Voltage vs.
Ambient Temperature Figure 7. Logi c High Output Current vs.
Ambient Temperature
Figure 8. Logic Low Output Supply Current vs.
Ambient Temperature Figure 9. Logic High Output Supply Current vs.
Ambient Temperature
1E-3
0.01
0.1
1
10
0.6 0.8 1.0 1.2 1.4 1.6 1.8
-40oC
25oC
VF - FORWARD VOLTAGE (V)
IF - INPUT LED CURRENT (mA)
TA = 100oC
-40-200 20406080100
0.5
1.0
1.5
2.0
2.5
VCC = 5.0 V
VCC = 3.3 V
IOL = 13 mA
IFHL - THRESH OLD I NP UT CURRE NT (mA)
TA - AMBIENT TEMPERATURE (oC)
-40-200 20406080100
0.20
0.25
0.30
0.35
0.40
0.45
0.50
VCC = 5.0 V
VCC = 3.3 V
IOL = 13 mA
IF = 6 mA
VOL - LOGIC LOW OUT P UT VOLTAGE (V)
TA - AMBIENT TEMPERATURE (oC)
-40-200 20406080100
0
5
10
15
20
25
30
VCC = 5.0 V
VCC = 3.3 V
IF = 250 A
VO = 3.3 V / 5.0 V
IOH - LOGIC HIG H OUT P UT CURRENT (A)
TA - AMBIENT TEMPERATURE (oC)
-40-200 20406080100
0
2
4
6
8
10
VCC = 5.0 V
VCC = 3.3 V
IF = 10 mA
ICCL - LOGI C LOW OUTPUT SUPPLY CURRENT (mA)
TA - AMBIENT TEMPERATURE (oC)
-40-200 20406080100
0
2
4
6
8
10
VCC = 5.0 V
VCC = 3.3 V
IF = 0 A
ICCH - LOGIC HIGH OUTPUT SUPP LY CURRENT (mA)
TA - AMBIENT TEMPERATURE (oC)
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 8
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Typical Performance Characteristics (Continued)
Figure 10. Output Supply Current vs.
Output Supply Voltage Figure 11. Propagation Dela y vs.
Ambient Temperature
Figure 12. Pulse Width Distortion vs.
Ambient Temperature Figure 13. Propagation Dela y vs.
Input LED Current
Figure 14. Pulse Width Distortion vs.
Input LED Current Figure 15. Rise Time and Fall Time vs.
Ambient Temperature
3.0 3.5 4.0 4.5 5.0 5.5
0
2
4
6
8
10
ICCH
IF = 0 A (for ICCH)
IF = 10 mA (for ICCL)
TA = 25oC
ICC - OUTPUT SUPPLY CURRENT (mA )
VCC - OUTPUT SUPPLY VOLTAGE (V)
ICCL
-40-200 20406080100
20
30
40
50
60
70
80
tPLH @ VCC = 5.0V
tPHL @ VCC = 5.0V
tPLH @ VCC = 3.3V
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
tP - PROPAGATION DELAY (ns )
TA - AMBIENT TEMPERATURE (oC)
tPHL @ VCC = 3.3V
-40-200 20406080100
0
5
10
15
20
25
30
VCC = 5.0V
VCC = 3.3V
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
(l tPHL - tPLH l) - PULSE WIDTH DISTORTION (ns)
TA - AMBIENT TEMPERATURE (oC)
5678910
20
30
40
50
60
70
80
tPLH @ VCC = 5.0V
tPHL @ VCC = 5.0V
tPLH @ VCC = 3.3V
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
tP - PROPAGATION DELAY (ns )
IF - INPUT LED CURRENT (mA)
tPHL @ VCC = 3.3V
5678910
0
5
10
15
20
25
30
VCC = 5.0V
VCC = 3.3V
f = 5 MHz, 50% Duty Cycle
TA = 25oC, RL = 350
(l tPHL - tPLH l) - PULSE WIDTH DISTORT ION (ns )
IF - INPUT LED CURRENT (mA)
-40-200 20406080100
0
10
20
30
40
tR @ VCC = 5.0V
tF @ VCC = 5.0V
tR @ VCC = 3.3V
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
tR, tF - RISE, FALL TIME (ns)
TA - AMBIENT TEMPERATURE (oC)
tF @ VCC = 3.3V
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 9
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Test Circuit
Figure 16. Tes t Circuit for Propagation Delay, Rise Time, and Fall Time
Figure 17. Test Circuit for Instantaneous Common-Mode Rejection Voltage
Output
350 Ω
VO Monitoring
Node
tPHL
CL
RM
IF
0.1 μF
Bypass
Pulse Gen.
5 MHz
tf = tr = 5 ns
DC = 50%
Input
Monitoring
Mode
tftr
tPLH
(IF = 6 mA)
50%
VOL
90%
1.5 V
10%
Input
2
350 Ω
VO (IF = 0 mA)
VO (IF = 6 mA)
VO Monitoring
Node
Pulse Gen
VCC
CL
VCM
VCM
RM
SW
IF
0.1 μF
Bypass
1 kV
0 V
VOH
2 V
0.8 V
VOL
90%
10%
trtf
2
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 10
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Reflow Profile
Figure 18. Reflow Profile
Profile Freature Pb-Free Assembly Profile
Temperature Minimum (Tsmin) 150°C
Temperature Maximum (Tsmax) 200°C
Time (tS) from (Tsmin to Tsmax) 60 s to 120 s
Ramp-up Rate (tL to tP) 3°C/second maximum
Liquidous Temperature (TL) 217°C
Time (tL) Maintained Above (TL) 60 s to 150 s
Peak Body Package Temperature 260°C +0°C / –5°C
Time (tP) within 5°C of 260°C 30 s
Ramp-Down Rate (TP to TL) 6°C/s maximum
Time 25°C to Peak Temperature 8 minutes maximum
Time (seconds)
Temperature (°C)
Time 25°C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Maximum Ramp-up Rate = 3°C/s
Maximum Ramp-down Rate = 6°C/s
240 360
©2015 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1 11
FOD8163, FOD8163T — 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin
Ordering Information
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
Part Number Package Packing Method
FOD8163 Stretched Body SOP 6-Pin Tube (100 units per tube)
FOD8163R2 Stretched Body SOP 6-Pin Tape and Reel (1,000 units per reel)
FOD8163V Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option Tube (100 units per tube)
FOD8163R2V Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option Tape and Reel (1,000 units per reel)
FOD8163T Stretched Body SOP 6-Pin, Wide Lead Tube (100 units per tube)
FOD8163TR2 Stretched Body SOP 6-Pin, Wide Lead Tape and Reel (1,000 units per reel)
FOD8163TV Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option Tube (100 units per tube)
FOD8163TR2V Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option Tape and Reel (1,000 units per reel)
1
2
6
3
Definitions
1 Fairchild Logo
2 Device Number, e.g. 8163
3DIN EN/IEC60747-5-5 Option (only appears on component
ordered wi th this option)
4 One Digit Year Code, e.g. ‘5’
5 Two Digit Work Week Ranging from ‘01’ to ‘53’
6 Assembly Package Code
8163
V XX YY
45
P
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06BREV1
1.27
6.81±0.30
4.50±0.30
1.27
10.45
7.45
0.80
1.50
3.18±0.30
0.40±0.10
0.20±0.10
RECOMMENDED LAND PATTERN
PIN 1
INDICATOR
(0.78)
C
A
B
0.10 C
6X 6X
(1.59)
45 6
321
10°
46
31
0.20 C A B
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06CREV1
(2.54)
1.27
6.81±0.30
4.50±0.30
1.27
12.25
9.25
0.80
1.50
0.204~0.304
11.50±0.30
0.75±0.30
3.18±0.30
0.40±0.10
0.20±0.10
RECOMMENDED LAND PATTERN
PIN 1
INDICATOR
R0.15
R0.15
0°~8°
(0.78)
C
A
B
0.10 C
6X 6X
(1.59)
10°
0.20 C A B
456
321
46
31
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