Ee LPR eS S| DATA Slalle 74LVC27 Triple 3-input NOR gate Product specification Supersedes data of 1998 Apr 06 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 PHILIPSPhilips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 FEATURES Wide supply voltage: 1.2 to 3.6 V in accordance with JEDEC standard no. 8-1A. @ inputs accept voltages up to 5.5 V DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. CMOS low power consumption Direct interface with TTL levels Output capability: standard loc category: SSI QUICK REFERENCE DATA GND = 0 V; Tamp = 25C; t, = S 2.5ns . SYMBOL PARAMETER CONDITIONS TYPICAL UNIT Pr i C, = 50 pF; tpH/teLy ae nC a ey Veo . oor 3.4 ns C Input capacitance 5.0 pF Cpep Power dissipation capacitance per gate Notes 1 and 2 26 pF NOTES: 1. Cpp is used to determine the dynamic power dissipation (Pp in pW) Pp = Cpp x Veo? x fj +5 (Cy x Voc? x fp} where: f, = input frequency in MHz; C, = output load capacity in pF; fp = output frequency in MHz; Vcc = supply voltage in V; 5 (CL x Voc? x f.) = sum of the outputs. 2. The condition is V; = GND to Voc. OR TION NORTH 14-Pin so to +85C 7 D SOT108-1 14-Pin Plastic Type Il -40C to +85C 74\VC27 DB -1 14-Pin Plastic Type | to +85C 74U PW 402-1 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 1 al U 4} cc 2 12 1B [2] 43" | 1c 3 2 Fir} : 2c [3 | 10] 38 4 6 ~ ra} GND [7 | rs | 3 9 Svoosas 10 8 "1 $vo0044g 1998 Apr 28 2 853-2056 19309Philips Semiconductors Triple 3-input NOR gate Product specification 74LVC27 PIN DESCRIPTION LOGIC DIAGRAM (ONE GATE) PIN NUMBER SYMBOL NAME AND FUNCTION 1,3,9 1A-3A | Data inputs A 2,4, 10 1B-38 | Data inputs ; 13, 5, 11 1C-3C | Data inputs [Sof po 7 GND Ground (0 V) 12, 6,8 1 -3Y Data outputs c 14 Veco Positive supply voltage Svo04dag LOGIC SYMBOL 1 FUNCTION TABLE , INPUTS OUTPUTS nA nB nc ny 8 L L L H 3 x X H L 4 xX H x L > H X X L 9 NOTES: 10 H = HIGH voltage level L = LOW voltage level tt X = dont care $v00447 RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER CONDITIONS UNIT MIN MAX Voc DC supply voltage (for max. speed performance) 27 3.6 V Voc DC supply voltage (for low-voltage applications) 1.2 3.6 Vv vi DC input voltage range 0 .5 V Vo DC output voltage range 0 Voc Vv Tamb Operating free-air temperature range -40 +85 C : : Voc = 1.2 to 2.7V ff) 20 ty, te Input rise and fall times Veo = 2.7 to 3.6V 0 10 ns/V 1998 Apr 28Philips Semiconductors Product specification Triple 3-input NOR gate 74L\VC27 ABSOLUTE MAXIMUM RATINGS! In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = OV) SYMBOL PARAMETER CONDITIONS RATING UNIT Veco DC supply voltage ~0.5 to +6.5 Vv lik DC input diode current vVi< 0 50 mA V; DC input voltage Note 2 ~0.5 to 45.5 Vv lox BC output diode current Vo >Vec or Vo < 0 +50 mA Vo DC output voltage | Note 2 0.5 to Voc +0.5 Vv lo DC output source or sink current Vo = Oto Veco +50 mA lenp: lec ~| DC Voc or GND current +100 mA Tstg Storage temperature range ~60 to +150 C Power dissipation per package Prot ~ plastic mini-pack (SO) above +70C derate linearly with 8 mW/K 500 W plastic shrink mini-pack (SSOP and TSSOP) above +680C derate linearly with 5.5 mW/K 500 m NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = OV) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C =| UNIT MIN TYP! | MAX Vee = 1.2V Vec Vin HIGH level Input voltage Vv Voc = 2.7 to 3.6V 2.0 Voc = 1.2V GND Vie LOW level Input voltage V Voc = 2.7 to 3.6V 0.8 Voc = 2.7V; V, = Vin or Vij lp = -T2mA Veco -0.5 Voc = 3.0V; Vi = Vin or Vit; lp = -100pA Veo -9.2 | Voc Vou HIGH level output voltage Vv Veo =3.0V; Vi = Vin or Viz; lo = -12mA Veco ~ 9.6 Vec = 3.0V; Vj = Vin OF Vit; lo = ~24mA Veco - 1.0 Voc = 2.7V; Vi) = Vin of Vic; lp = 12mA 0.40 Vor LOW level output voltage Veo = 3.0V; Vy = Vin of Vit; lo = 100pA GND | 0.20 Vv Voc = 3.0V; V) = Vin or Vit; lp = 24mA 0.55 \; input leakage current Voc = 3.6V; V, = 5.5V or GND +0.1 +5 nA lec Quiescent supply current Voc = 3.6V; Vi = Voc or GND; Ig = 0 0.1 10 pA Alec input pin quiescent supply current per | y. . 2.7V to 3.6V; Vi = Voc -0.6V Ip = 0 5 | 500 | pA NOTE: 1. All typical values are at Vec = 3.3V and Tamp = 25C. 1998 Apr 28Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 AC CHARACTERISTICS GND =0V; t= & = 2.5 ns; C, = 50 pF; Ry = 5009) Tamp = ~40C to +85C LIMITS SYMBOL PARAMETER WAVEFORM Vee = 3.3V 10.3V Veco = 2.7V UNIT MIN Typ! MAX MIN MAX tori! Propagation delay : _ _ tpi nA, nB, nC to n Figure 1, 2 3.4 5.9 7.0 ns NOTE: 1. These typical values are at Voc = 3.3V and Tamp = 25C. AC WAVEFORMS TEST CIRCUIT Vu =1.5VatVoc 2 2.7V Vu = 0.5 * Veco at Veo < 2.7 V St oy Voi and Voy are the typical output voltage drop that occur with the . ce o Open output load. | o-~ GND 5000 Vi---- vt Vo meu ne GENERATOR DUT fF GND Rr T ur 500s You 7 = = = = = ny OUTPUT SWITCH POSITION Von TEST 8 Vee vi $ve0420 teLHPHE Open <2.7V Vec Figure 1. Input (nA, nB, nC) to output (nY) propagation delays. 2.7~3.6V 27 Sv00903 Figure 2. Load circuitry for switching times. 1998 Apr 28 5Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 $014: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D - ly Zz ; Rofo AE Pi index ' , 4 puny | }-_ t L ue 8 As HI H Ho ae be Go 25 5 mm be scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT a. Ar | Az | As | bp | c | DM | EM] ee | He | L | bp | @ [| v | wy y | 2M) 6 mn | 175 [923] 148] os [949] 088] 8751 49 | sar] 2 | sos] 29] 22 [ozs fos] or | OFT icres | 0.069 | 2982 | 2987 | oor | 2612 /0.0'001 025 | 218 | .050] 2244] avai | 2098/2028] cor | oor | aco] 9098] Note 1. Plastic or metal protrusions of 0.15.mm maximum per side are not included. OUTLINE = en) sn EUROPEAN ISSUE DATE SOT108-1 o76E06S MS-012AB =} @ BOS 22 1998 Apr 28 8Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm $OT337-1 D ~ E {a] at i | \ = a t } LU os S- LJ Sy rn N ~ mit He wtefelv @A] m4 14 8 | t | le 4 ----_|_-__-# Aa \ 4 A | Ay | (Aa) t pin 1 rex t | rz Cy | ' lip fF i j a | >| 1 t Ee 0 25 5mm scale DIMENSIONS (mm are the original dimensions) UNIT | | Ar | Az | As | bp | | OM] eM! | He | bE] op] @ | v | wi] y [2M] 6 0.21 | 1.80 0.38 | 0.20! 64 | 54 79 1.03 | 09 14 | 8 mm | 29 | oo5 | 165 | 975 | o25 | 009} 60 | 52 | 9] 76 | 15] 063} o7 | 22 [9] Ot] o9 | 9 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES EUROPEAN ISSUE DATE VERSION lec JEDEC EAI PROJECTION SOT397-1 MO-150AB f-} eee 1998 Apr 28Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 Ao {A3) maja > Ht (Yt of Ke 4, { scale DIMENSIONS (mm are the original dimensions) A UNIT | ax. | At | Ae As Bp c | pM] E@] e He L Lp | @ v w y zM] 6 0.15 | 0.95 0.30 | 9.2 fF 5.4 45 6.6 0.75 | 0.4 0.72 | 8 mm 1 419] o95 | 080 | 925 J o19 | 01 | 49 | 43 | 98] 62 | 1 [oso] o3 | %2 | 913 1 OF | ogg] oe Notes 1. Plastic or metal protrusions of 6,15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE REFERENCES VERSION EUROPEAN ec 5 BAI PROJECTION ISSUE DATE soT402-1 MO-153 a a ov ta 1998 Apr 28 8Philips Semiconductors Product specification Triple 3-input NOR gate 74\V C27 NOTES 1998 Apr 28 9Philips Semiconductors Product specification Triple 3-input NOR gate 74LVC27 Data sheet status Data sheet Product Definition {1} status status Objective Development This data sheet contains the design target or goal specifications for product development. specification Specification may change in any manner without notice. Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. specification Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product Production This data sheet contains fina! specifications. Philips Semiconductors reserves the right io make specification changes at any time without notice in order to improve design and supply the best possible product. {1] Please consuit the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given.are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information - Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. 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