BLC8G27LS-180AV - NXP SEMICONDUCTORS

1. Product profile

1.1 General description

180 W LDMOS packaged asymmetrical Doherty power transistor for base station

applications at frequencies from 2496 MHz to 2690 MHz.

[1] Test signal: 3GPP test model 1; 1 to 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF.

1.2 Features and benefits

High efficiency

Excellent ruggedness

Designed for broadband operation

Low thermal resistance providing excellent thermal stability

Integrated ESD protection

Designed for low memory effects providing excellent pre-distortability

Lower output capacitance for improved performance in Doherty applications

Asymmetrical design to achieve optimal efficiency across the band

Decoupling leads to enable improved video bandwidth

Internally matched for ease of use (input and output)

Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances

(RoHS)

1.3 Applications

RF power amplifier for W-CDMA base stations and multi carrier applications in the

2496 MHz to 2690 MHz frequency range

BLC8G27LS-180AV

Power LDMOS transistor

Rev. 3 — 1 September 2015 Product data sheet

Table 1. Typical performance

Ty pical RF performance at Tcase = 25



C in a Doherty production test circuit.

Test signal f VDS PL(AV) GpDACPR

(MHz) (V) (W) (dB) (%) (dBc)

1-carrier W-CDMA 2496 to 2690 28 28 14 43.5 30 [1]

Product data sheet Rev. 3 — 1 September 2015 2 of 14

BLC8G27LS-180AV

Power LDMOS transistor

2. Pinning information

[1] Connected to flange.

3. Ordering information

4. Limiting values

[1] Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF

calculator.

5. Thermal characteristics

Table 2. Pinning

Pin Description Simplified outline Graphic symbol

1 drain1 (main)

2 drain2 (peak)

3gate1 (main)

4 gate2 (peak)

5 video decoupling (main)

6 video decoupling (peak)

7source [1]

51 26

1, 5

2, 6

aaa-007731

Table 3. Ordering information

Type number Package

Name Description Version

BLC8G27LS-180AV - air cavity plastic earless flanged package; 6 leads SOT1275-3

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage - 65 V

VGS gate-source voltage 0.5 +13 V

Tstg storage temperature 65 +150 C

Tjjunction temperature [1] - 225 C

Table 5. Thermal characteristics

Symbol Parameter Conditions Typ Unit

Rth(j-case) thermal resistance from

junction to case

Tcase =80C; VDS =28V; I

Dq =200mA;

VGS(amp)peak = 0.6 V; f = 2600 MHz; PL=28W

0.38 K/W

Product data sheet Rev. 3 — 1 September 2015 3 of 14

BLC8G27LS-180AV

Power LDMOS transistor

6. Characteristics

Table 6. DC characteristics

Tj = 25



C unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Unit

Main device

V(BR)DSS drain-source breakdown voltage VGS =0V; I

D=0.7mA 65 - - V

VGS(th) gate-source threshold voltage VDS =10 V; I

D=72mA 1.5 1.9 2.3 V

VGSq gate-source quiescent voltage VDS =28 V; I

D= 300 mA 1.6 2.0 2.4 V

IDSS drain leakage current VGS =0V; V

DS =28V - - 1.2 A

IDSX drain cut-off current VGS =V

GS(th) +3.75 V;

VDS =10V

- 13.3 - A

IGSS gate leakage current VGS =11V; V

DS = 0 V - - 120 nA

gfs forward transconductance VDS =10V; I

D= 72 mA - 0.63 - S

RDS(on) drain-source on-state resistance VGS =V

GS(th) + 3.75 V;

ID=2.52A

- 198 318 m

Peak device

V(BR)DSS drain-source breakdown voltage VGS =0V; I

D=1.3mA 65 - - V

VGS(th) gate-source threshold voltage VDS =10 V; I

D= 130 mA 1.5 1.9 2.3 V

VGSq gate-source quiescent voltage VDS =28 V; I

D= 600 mA 1.6 2.0 2.4 V

IDSS drain leakage current VGS =0V; V

DS =28V - - 1.2 A

IDSX drain cut-off current VGS =V

GS(th) +3.75 V;

VDS =10V

-23-A

IGSS gate leakage current VGS =11V; V

DS = 0 V - - 120 nA

gfs forward transconductance VDS =10V; I

D= 130 mA - 1.13 - S

RDS(on) drain-source on-state resistance VGS =V

GS(th) + 3.75 V;

ID=4.55A

- 109 155 m

Table 7. RF characteristics

Test signal: 1-carrier W-CDMA; PAR = 7.2 dB at 0.01 % probability on the CCDF;

3GPP test model 1; 1 to 64 DPCH; f1=2496MHz; f

2= 2690 MHz; RF performance at VDS =28V;

IDq = 200 mA (main); VGS(amp)peak = 0.6 V; Tcase =25



C; unless otherwise specified; in an

asymmetrical Doherty producti on test circuit at 2496 MHz to 2690 MHz.

Symbol Parameter Conditions Min Typ Max Unit

Gppower gain PL(AV) =28W 13 14 - dB

RLin input return loss PL(AV) =28W - 10 7dB

Ddrain efficiency PL(AV) = 28 W 39.5 43.5 - %

ACPR adjacent channel power ratio PL(AV) =28W - 30 26 dBc

Table 8. RF characteristics

Test signal: pulsed CW; tp = 100





= 10 %; f = 2690 MHz; RF performance at VDS = 28 V;

IDq = 200 mA (main); VGS(amp)peak = 0.6 V; Tcase = 25



C; unless otherwise specified; in an

asymmetrical Doherty producti on test circuit at 2496 MHz to 2690 MHz.

Symbol Parameter Conditions Min Typ Max Unit

PL(3dB) output power at 3 dB gain

compression

153 173 193 W

Product data sheet Rev. 3 — 1 September 2015 4 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7. Test information

7.1 Ruggedness in Doherty operation

The BLC8G27LS-180AV is capable of withstanding a load mismatch corresponding to a

VSWR = 10 : 1 through all phases under the following conditions: VDS =28V;

IDq = 200 mA (main); VGS(amp)peak =0.6V; P

L= 140 W; f = 2496 MHz.

7.2 Impedance information

[1] ZS and ZL defined in Figure 1.

[2] at 3 dB gain compression.

[1] ZS and ZL defined in Figure 1.

[2] at 3 dB gain compression.

Table 9. Typical impedance of main device

Measured load-pull data of main device; IDq = 420 mA (main); VDS = 28 V.

f ZS [1] ZL [1] PL [2] D [2] Gp [2]

(MHz) () ()(W) (%) (dB)

Maximum power load

2496 3.1  j7.4 2.7  j7.7 49.4 56.4 14.7

2600 4.0  j7.7 2.7  j8.3 49.3 54.8 15.3

2690 4.6  j7.2 2.7  j8.3 49.4 56 16.1

Maximum drain efficiency load

2496 3.1  j7.4 5.7  j6.1 47.7 63.3 17

2600 4.0  j7.7 4.2  j6.1 48.1 62.6 17.5

2690 4.6  j7.2 3.7  j6.4 48.2 63 18.2

Table 10. Typical impedance of peak device

Measured load-pull data of peak device; IDq = 780 mA (peak); VDS = 28 V.

f ZS [1] ZL [1] PL [2] D [2] Gp [2]

(MHz) () ()(W) (%) (dB)

Maximum power load

2496 3.9  j8.9 3.9  j10.8 51.7 55 14.2

2600 5.3  j9.3 4.7  j12.0 51.6 52.4 14.6

2690 6.3  j7.6 6.0  j12.4 51.3 54 15.6

Maximum drain efficiency load

2496 3.9  j8.9 3.9  j7.6 50.2 62.5 16.3

2600 5.3  j9.3 3.3  j8.3 49.9 61.6 17

2690 6.3  j7.6 4.1  j9.1 49.8 60.5 17.6

Product data sheet Rev. 3 — 1 September 2015 5 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7.3 Recommended impedances for Doherty design

[1] ZS and ZL defined in Figure 1.

[2] at 3 dB gain compression.

[3] at PL(AV) = 44.5 dBm.

[1] ZS and ZL defined in Figure 1.

[2] at 3 dB gain compression.

[3] at PL(AV) = 44.5 dBm.

7.4 VBW in Doherty operation

The BLC8G27LS-180AV shows 125 MHz (typical) video bandwidth in Doherty

development board in 2600 MHz at VDS = 28 V; IDq = 200 mA and VGS(amp)peak =0.6V.

Fig 1. Definition of transistor impedance

001aaf059

drain

gate

Table 11. Typical impedance of main device at 1 : 1 load

Measured load-pull data of main device; IDq = 420 mA (main); VDS = 28 V.

f ZS [1] ZL [1] PL [2] D [3] Gp [3]

(MHz) () ()(dBm) (%) (dB)

2496 3.9  j8.9 4.0  j7.6 49.0 42 18.8

2600 5.3  j9.3 3.9  j7.5 48.9 41 19.0

2690 6.3  j7.6 3.3  j7.6 49.1 40 20.0

Table 12. Typical impedance of main device at 1 : 2 load

Measured load-pull data of main device; IDq = 420 mA (main); VDS = 28 V.

f ZS [1] ZL [1] PL [2] D [3] Gp [3]

(MHz) () ()(dBm) (%) (dB)

2496 3.9  j8.9 7.7  j5.8 46.7 53.0 20.5

2600 5.3  j9.3 7.0  j5.1 46.5 52.0 21.0

2690 6.3  j7.6 5.4  j5.5 47.0 51.0 22.0

Product data sheet Rev. 3 — 1 September 2015 6 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7.5 Test circuit

Printed-Circuit Board (PCB): Rogers RO4350B; r= 3.5; thickness = 0.508 mm;

thickness copper plating = 35 m.

See Table 13 for a list of components.

Fig 2. Component layout for test circuit

Table 13. List of components

See Figure 2 for component layout.

Component Description Value Remarks

C1, C4, C13, C15,

C17, C18

multilayer ceramic chip capacitor 10 F, 50 V Murata: SMD 1206

C2, C5, C14, C16 multilayer ceramic chip capacitor 1 F, 50 V Murata: SMD 1206

C3, C6, C7, C8,

C9, C10, C12

multilayer ceramic chip capacitor 11 pF ATC 600F series

C11 multilayer ceramic chip capacitor 3 pF ATC 600F series

C19, C20 electrolytic capacitor 2200 F, 63 V Vishay BCcomponents

R1 SMD resistor 50 

R2, R3 SMD resistor 5.1 SMD 0805

aaa-016036

80 mm

40 mm 40 mm

C1 C3

C14

C13

C17

C11

C12

C10

C16

C15

C18

C19

C20

Product data sheet Rev. 3 — 1 September 2015 7 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7.6 Graphical data

7.6.1 Pulsed CW

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak = 0.6 V; tp= 100 s; =10%.

(1) f = 2496 MHz

(2) f = 2690 MHz

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V; t

p= 100 s; =10%.

(1) f = 2496 MHz

(2) f = 2690 MHz

Fig 3. Power gain as a function of output power;

typical values

Fig 4. Drain efficiency as a function of output power;

typical values

VDS = 28 V; IDq = 200 mA (main device); VGS(amp)peak = 0.6 V; tp=100s; =10%.

(1) f = 2496 MHz

(2) f = 2690 MHz

Fig 5. Input return loss as a function of output power; typical values

aaa-014563

0 40 80 120 160 200

PL (W)

(dB)(dB)(dB)

(2)(2)(2)

(1)(1)(1)

aaa-014564

0 40 80 120 160 200

PL (W)

ηD

(%)(%)(%)

(2)(2)(2)

(1)(1)(1)

aaa-014565

0 40 80 120 160 200

PL (W)

RLinin

RLin

(dB)(dB)(dB)

(1)(1)(1)

(2)

(2)(2)

Product data sheet Rev. 3 — 1 September 2015 8 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7.6.2 1-Carrier W-CDMA

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

Fig 6. Power gain as a function of output power;

typical values

Fig 7. Drain efficiency as a function of output power;

typical values

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

Fig 8. Input return loss as a function of output

power; typical values

Fig 9. Peak-to-average power ratio as a function of

output power; typical values

aaa-014566

0 10 20 30 40 50

13.4

13.8

14.2

14.6

PL (W)

(dB)(dB)(dB)

(1)(1)(1)

(2)(2)(2)

aaa-014567

0 10 20 30 40 50

PL (W)

ηD

(%)(%)(%)

(1)(1)(1)

(2)(2)(2)

aaa-014568

0 10 20 30 40 50

PL (W)

RLinin

RLin

(dB)(dB)(dB)

(1)(1)(1)

(2)

(2)(2)

aaa-014569

0 10 20 30 40 50

PL (W)

PAR

PARPAR

(dB)

(dB)(dB)

(2)(2)(2)

(1)(1)(1)

Product data sheet Rev. 3 — 1 September 2015 9 of 14

BLC8G27LS-180AV

Power LDMOS transistor

7.6.3 2-Tone VBW

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

VDS = 28 V; IDq = 200 mA (main device);

VGS(amp)peak =0.6V.

(1) f = 2496 MHz

(2) f = 2690 MHz

Fig 10. Adjacent channel power ratio (5 MHz) as a

function of output power; typical values

Fig 11. Adjacent channel power ratio (10 MHz) as a

function of output power; typical values

aaa-014570

0 10 20 30 40 50

-45

-40

-35

-30

-25

-20

PL (W)

ACPR

ACPR5M5M

ACPR5M

(dBc)(dBc)(dBc)

(1)(1)(1)

(2)

(2)(2)

aaa-014571

0 10 20 30 40 50

-70

-60

-50

-40

-30

PL (W)

ACPR

ACPR10M10M

ACPR10M

(dBc)(dBc)(dBc)

(1)(1)(1)

(2)(2)(2)

VDS = 28 V; IDq = 200 mA; fc = 2600 MHz.

(1) IMD low

(2) IMD high

Fig 12. VBW capability in Doherty development board

aaa-014572

1 10 102103

-70

-60

-50

-40

-30

-20

-10

carrier spacing (MHz)

IMD3

IMD3IMD3

(dBc)

(dBc)(dBc)

(1)(1)(1)

(2)(2)(2)

(1)(1)(1)

(2)(2)(2)

(1)(1)(1)

(2)(2)(2)

IMD3IMD3IMD3

IMD5

IMD5IMD5

IMD7

IMD7IMD7

Product data sheet Rev. 3 — 1 September 2015 10 of 14

BLC8G27LS-180AV

Power LDMOS transistor

8. Package outline

Fig 13. Package outline SOT1275-3

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT1275-3 14-10-14

15-04-02

Air cavity plastic earless flanged package; 6 leads SOT1275-3

sot1275-3_po

Unit

max

nom

min

4.01

3.40

3.94

3.68

9.8

9.5

25.5

25.2

Dimensions (mm are the original dimensions)

1EE

1H1LQ

1.68

1.45

20.7

20.5

9.91

9.70

1.14

0.89

0.178

0.127

20.42

20.12

19.53

19.33

1.14

0.94

9.75

9.55

8.89

eFH U

3.17

5.79

2.67 5.29

Z1α

0.24

0.5

0.1

0.5

10 mm50

scale

20.37

20.17

12.8

12.6

EE1

w1B

w2B

v A

detail X

51 2

65°

61°

Product data sheet Rev. 3 — 1 September 2015 11 of 14

BLC8G27LS-180AV

Power LDMOS transistor

9. Handling information

10. Abbreviations

11. Revision history

CAUTION

This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling

electrostatic sensitive devices.

Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or

equivalent standards.

Table 14. Abbreviations

Acronym Description

3GPP 3rd Generation Partnership Project

CCDF Complementary Cumulative Distribution Function

CW Continuous Wave

DPCH Dedicated Physical CHannel

ESD ElectroStatic Discharge

LDMOS Laterally Diffused Metal-Oxide Semiconductor

MTF Median Time to Failure

PAR Peak-to-Average Ratio

SMD Surface-Mounted Device

VBW Video BandWidth

VSWR Voltage Standing-Wave Ratio

W-CDMA Wideband Code Division Multiple Access

Table 15. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BLC8G27LS-180AV#3 20150901 Product data sheet - BLC8G27LS-180AV v.2

Modifications: •The format of this document has been redesigned to comply with the new identity

guidelines of Ampleon.

•Legal texts have been adapted to the new company name where appropriate.

BLC8G27LS-180AV v.2 20150209 Product data sheet - BLC8G27LS-180AV v.1

BLC8G27LS-180AV v.1 20140701 Objective data sheet - -

Product data sheet Rev. 3 — 1 September 2015 12 of 14

BLC8G27LS-180AV

Power LDMOS transistor

12. Legal information

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[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.ampleon.com.

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for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

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Applications — Applications that are described herein for any of these

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or warranty that such applications will be suitable for the specified use without

further testing or modification.

Customers are responsible for the design and operation of their applications

and products using Ampleon products, and Ampleon accepts no liability for

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

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subject to the general terms and conditions of commercial sale, as published

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 3 — 1 September 2015 13 of 14

BLC8G27LS-180AV

Power LDMOS transistor

Non-automotive qualified products — Unless this data sheet expressly

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is not suitable for automotive use. It is neither qualified nor tested in

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reference or use of any ‘NXP’ trademark in this document or in or on the

surface of Ampleon products does not result in any claim, liability or

entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of

the NXP group of companies and any reference to or use of the ‘NXP’

trademarks will be replaced by reference to or use of Ampleon’s own

trademarks.

13. Contact information

For more information, please visit:

http://www.ampleon.com

For sales office addresses, please visit:

http://www.ampleon.com/sales

BLC8G27LS-180AV

Power LDMOS transistor

For more information, please visit: http://www.ampleon.com

For sales office addresses, please visit: http://www.ampleon.com/sales

Date of release: 1 September 2015

Document identifier: BLC8G27LS-180AV#3

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4

7.1 Ruggedness in Doherty operation . . . . . . . . . . 4

7.2 Impedance information . . . . . . . . . . . . . . . . . . . 4

7.3 Recommended impedances for Doherty design 5

7.4 VBW in Doherty operation . . . . . . . . . . . . . . . . 5

7.5 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

7.6 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.6.1 Pulsed CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.6.2 1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 8

7.6.3 2-Tone VBW . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

9 Handling information. . . . . . . . . . . . . . . . . . . . 11

10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

12.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

13 Contact information. . . . . . . . . . . . . . . . . . . . . 13

14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14