TPS2559QWDRCRQ1 - TEXAS INSTRUMENTS

June, 2015 − Rev. 1 1Publication Order Number:

NCS5652/D

NCS5652, NCV5652

Dual Power Operational

Amplifier

Description

The NCx5652 is a dual power operational amplifier with a versatile

output stage configuration that allows conventional op−amp biasing or

user tuning of efficiency, isolation, or current monitoring. Integrated

flyback diodes protect the amplifiers during inductive load transients.

Operating at supply voltages as low as 3.3 V, the NCx5652 is capable

of delivering 500 mA of current while maintaining an excellent output

swing. The integrated thermal shutdown circuit protects the NCx5652

from excessive power dissipation. A thermal warning flag is provided

for external monitoring of the device, providing a flexible interface to

a system’s microcontroller. This open−collector thermal flag output

doubles as a DISABLE input that can be used to tri−state both

amplifier outputs under user control. The 12−pin UDFN 3x3 mm

package provides thermal robustness while achieving space savings

on high density PCBs.

Features

•Operating Supply Voltage Range: 3.3 V to 13.2 V

•Output Supply Voltage Range: 3.3 V to 13.2 V

•High Current Drive: 500 mA Operating

•Thermal Flag: Open−collector for Flexible Interface

•Thermal Shutdown/ Disable Function

•Output Short Circuit Tolerable (1 A to Source or Ground)

•No Power Sequencing Required (VCC, VC1, VC2)

•UDFN12 Package Features Wettable Flank for Improved

Solderability

•NCV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

•Telecom

•Vcom Driver

•Small DC Brush Motors

•LED String Driver

•Electrochromic Driver

UDFN12

MU SUFFIX

CASE 517AM

MARKING DIAGRAM

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N5652 = Specific Device Code

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

G= Pb−Free Package

(Note: Microdot may be in either location)

N5652

ALYWG

See detailed ordering and shipping information on page 12 o

this data sheet.

ORDERING INFORMATION

IN1+

IN1−

DISABLE/Tflag

VCC

OUT

IN2−

OUT

VC2

VC1

IN2+

6GND

12 GND

−

EXPOSED

THERMAL PAD

(13)

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Thermal

Detection

VCC

OUT1

GND

VC2

OUT2

IN2−

IN2+

DISABLE/

Tflag

IN1+

IN1− −

10 VC1

VCC

6GND

Class

Bias

VCC

−

+Class

Bias

VCC

Exposed

Pad (13)

Figure 1. Block Diagram

Table 1. PIN DESCRIPTION

Pin Name Type Description

1IN1− Input Negative input of amplifier 1.

2 IN1+ Input Positive input of amplifier 1.

3 DISABLE/Tflag Input/Output Dual use pin −Thermal flag− an open collector output requiring an external

pull−up resistor. The output is pulled low when the thermal limit is reached. It

is high−impedance in normal operation.

Disable − Must use an open collector/drain for input with pull−up resistor to

Vcc. Pulling pin low disables the amplifiers. If pin is not used, a pull−up resis-

tor to Vcc is still required (10 KW recommended)

4 IN2+ Input Positive input of amplifier 2.

5IN2− Input Negative input of amplifier 2.

6 GND Power Power ground.

7 OUT2 Output Output of amplifier 2.

8 VC2 Power Positive supply of output stage 2.

9 VCC Power Positive supply of core circuitry.

10 VC1 Power Positive supply of output stage 1.

11 OUT1 Output Output of amplifier 1.

12 GND Power Power ground.

13 EXPOSED PAD Power The Exposed Pad must be attached to a heat−sinking conduit and connected

to GND.

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Table 2. ABSOLUTE MAXIMUM RATINGS Over operating free−air temperature, unless otherwise stated

Parameter Symbol Limit Unit

Supply Voltage (VCC − GND) VCC 16 V

Output Supply Voltage VC1, VC2 16 V

INPUT AND OUTPUT PINS

Differential Input Voltage Vid ±VCC V

Input Common Mode Voltage Range VICR −0.3 to VCC +0.3 V

Output Current (Note 1) IOUT ±1000 mA

DISABLE/Tflag Pin Voltage (Note 2) VDISABLE/Tflag 7 V

TEMPERATURE

Storage Temperature TSTG −65 to 165 °C

Junction Temperature TJ(MAX) 150 °C

ESD RATINGS (Note 3)

Human Body Model HBM ±1500 (IN−, Tflag pins).

±2000 (All other pins) V

Machine Model MM ±150( IN−, Tflag pins).

±200 (All other pins) V

Charge Device Model CDM ±2500 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be af fected.

1. Continuous short−to−ground or source; power dissipation must be taken into consideration.

2. Connected to voltage source via a pull−up resistor.

3. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per AEC−Q100−002 (JEDEC standard: JESD22−A114)

ESD Machine Model tested per AEC−Q100−003 (JEDEC standard: JESD22−A115)

ESD Charged Device Model tested per ANSI/ESD S5.3.1−2009 (AEC−Q100−011)

Table 3. THERMAL INFORMATION (Note 4)

Thermal Metric Symbol Limit Unit

Junction to Ambient – UDFN12

(Exposed pad connected to 50 mm2 one ounce copper.) qJA 147 °C/W

Junction to Ambient – UDFN12

(Exposed pad connected to 1200 mm2 one ounce copper.) qJA 52 °C/W

4. Based on JEDEC.

Table 4. RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Limit Unit

Operating Supply Voltage VCC 3.3 to 13.2 V

Output Supply Voltage VC1, VC2 3.3 to 13.2 V

Output Current (Note 5) IC1, IC2 ±500 mA

Operating Temperature Range TA−40 to +125 °C

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

5. Power dissipation must be taken into consideration to avoid thermal shutdown.

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Table 5. ELECTRICAL CHARACTERISTICS: VCC = VC1 = VC2 = 5 V

Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.

At TA = +25°C, RL = 1 kW connected to midsupply, VOUT = midsupply, unless otherwise noted.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS 1 15 mV

Offset Voltage Drift dV/dT 2 mV/°C

Input Bias Current IIB 550 1000 nA

Input Offset Current IOS 10 100 nA

Input Common Mode Range (Note 6) VCM 03.8 V

Common Mode Rejection Ratio CMRR 90 100 dB

OUTPUT CHARACTERISTICS (OUT1, OUT2)

Output Voltage High (Note 7) VOH Vid = 1 V, IO = +250 mA 4.0 4.15 V

Output Voltage Low VOL Vid = −1 V, IO = −250 mA 200 350mV

DYNAMIC PERFORMANCE

Open Loop Voltage Gain AVOL 90 105 dB

Gain Bandwidth Product GBWP RL = 47 W, CL = 100 nF 350 kHz

Gain Margin AMRL = 47 W, CL = 100 nF 6 dB

Phase Margin yMRL = 47 W, CL = 100 nF 45 °

Slew Rate SR 1.5 V/ms

POWER SUPPLY

Power Supply Rejection Ratio PSRR VCC = VC1 = VC2 = 3.3 V to 13.2 V 65 75 dB

Quiescent Current (Operating) ICC No RL, CL = 100 nF 34mA

Quiescent Current (Output) IC1, IC2 (Per op amp) No RL, CL = 100 nF 46mA

THERMAL CHARACTERISTICS

Thermal Shutdown (Note 8) TSHUTDOWN 160°C

LOGIC CHARACTERISTICS (DISABLE/Tflag)

Output Voltage Low (Note 6) VOL IOL = 1 mA 0.7 V

Input Voltage High (Note 9) VIH 1.5 V

Input Voltage Low (Note 10) VIL 1.1 V

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

6. VCM is a function of VCC (VCC – 1.2 V).

7. VOH is a function of VCC (VCC − 0.8 V).

8. Guaranteed by design/characterization.

9. DISABLE/Tflag pin with a pull−up resistor for sourcing.

10.DISABLE/Tflag pin with an open collector/drain for sinking.

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TYPICAL CHARACTERISTICS

3.4

3.2

2.8

2.6

2.4

2.2

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 2. ICC Quiescent Current vs. Supply

Voltage over Temperature

−40°C

25°C

125°C

VCC = VC1 = VC2

VOUT = VCC/2

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 3. Ic Quiescent Current vs. Supply

Voltage over Temperature (Ic1, Ic2 combined)

−40°C

25°C

125°C

VCC = VC1 = VC2

VOUT = VCC/2

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 4. Comparator Mode (Negative), ICC

Quiescent Current vs Supply Voltage

VCC = VC1 = VC2

Vid = −1 V

−40°C

25°C

125°C

1.000

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 5. Comparator Mode (Negative), Ic

Quiescent Current vs Supply Voltage (Ic1,Ic2

Combined)

0.100

0.010

0.001

0.0001

VCC = VC1 = VC2

Vid = −1 V

−40°C25°C

125°C

3.0

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 6. Comparator Mode (Positive), ICC

Quiescent Current vs Supply Voltage

VCC = VC1 = VC2

Vid = +1 V

2.8

2.6

2.4

2.2

2.0

−40°C

25°C

125°C

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

31716151413456 78 1211109

Figure 7. Comparator Mode (Positive), Ic

Quiescent Current vs Supply Voltage (Ic1,Ic2

Combined)

−40°C

25°C

125°C

VCC = VC1 = VC2

Vid = +1 V

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TYPICAL CHARACTERISTICS

Figure 8. Low Level Output Voltage vs. Output

Current Over Temperature Figure 9. High Level Output Voltage vs. Output

Current Over Temperature

OUTPUT CURRENT (mA) OUTPUT CURRENT (mA)

7006005004003002001000

0.001

0.01

0.1

600500400 7003002001000

1.2

1.0

0.8

0.6

0.4

0.2

Figure 10. Open Loop Gain/Phase

(No RL, CL = 0) Figure 11. Open Loop Gain/Phase

(No RL, CL = Varied)

FREQUENCY (Hz) FREQUENCY (Hz)

−40

−20

100

120

100K10K1K10010

−200

−100

−50

150

250

Figure 12. Open Loop Gain/Phase

(RL = 47 W, CL = Varied) Figure 13. Open Loop Gain/Phase

(RL = 150 W, CL = Varied)

VOLTAGE FROM NEG RAIL (V)

OUTPUT VOLTAGE FROM POS RAIL (V)

PHASE (Deg)

−40°C0°C

+25°C+125°C

VCC = 3.3 to 13.2 V

VCC = VC1 = VC2

Vid = −1 V

VCC = 3.3 to 13.2 V

VCC = VC1 = VC2

Vid = +1 V

−40°C

0°C

+25°C

+125°C

10 1K 1M

VCC = VC1 = VC2 = 5 V

VOUT = VCC/2

No RL, CL = 0

TA = 25°C

−200

−150

−100

−50

100

150

200

Phase

Gain

200

100 10K 100K

GAIN (dB)

−250

Phase − CL = 50 nF

Phase − CL = 100 nF

Phase − CL = 200 nF

Phase − CL = 300 nF

Gain − CL = 50 nF

Gain − CL = 100 nF

Gain − CL = 200 nF

Gain − CL = 300 nF

100

−150

FREQUENCY (Hz) FREQUENCY (Hz)

−40

−20

100

120

100K10K1K10010

−200

−100

−50

150

250

PHASE (Deg)

10 1K

−250

−150

−100

−50

100

150

250

200

100 10K 100K

GAIN (dB)

−250

100

−150

Phase − CL = 50 nF

Phase − CL = 100 nF

Phase − CL = 200 nF

Phase − CL = 300 nF

Gain − CL = 50 nF

Gain − CL = 100 nF

Gain − CL = 200 nF

Gain − CL = 300 nF

200

−200

Phase − CL = 50 nF

Phase − CL = 100 nF

Phase − CL = 200 nF

Phase − CL = 300 nF

Gain − CL = 50 nF

Gain − CL = 100 nF

Gain − CL = 200 nF

Gain − CL = 300 nF

TA = 25°C

VOUT = VCC/2

VCC = VC1 = VC2 = 5 V

No RL

TA = 25°C

VOUT = VCC/2

VCC = VC1 = VC2 = 5 V

RL = 47 W

TA = 25°C

VOUT = VCC/2

VCC = VC1 = VC2 = 5 V

RL = 150 W

10M 1M

1M1M

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TYPICAL CHARACTERISTICS

Figure 14. Gain Margin vs. Load

CL, CAPACITIVE LOAD (nF)

Figure 15. Phase Margin vs. Load

CL, CAPACITIVE LOAD (nF)

Figure 16. Open Loop Output Impedance vs.

Frequency Figure 17. Channel Separation vs. Frequency

FREQUENCY (Hz) FREQUENCY (Hz)

0.1

100

1000

−120

−100

−80

−60

−40

−20

OUTPUT IMPEDANCE (W)

CHANNEL SEPARATION (dB)

50 100 200 300

GAIN MARGIN (dB)

No RL

RL =150 W

RL = 48 W

50 100 200 300

PHASE MARGIN (Deg)

No RL

RL = 150 W

RL = 48 W

100 1K 10K 100K 10 100 1K 10K 100K1M 1M

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TYPICAL CHARACTERISTICS

Figure 18. Total Harmonic Distortion + Noise

vs. Vout Figure 19. Total Harmonic Distortion + Noise

vs. Frequency

VOUT pk−pk (V) FREQUENCY (Hz)

6543210

0.001

0.01

0.1

100K10K1K10010

0.001

0.01

0.1

Figure 20. CMRR vs. Frequency Figure 21. PSRR vs. Frequency

FREQUENCY (Hz) FREQUENCY (Hz)

100

120

140

160

THD + N (%)

CMRR (dB)

PSRR (dB)

TA = 25°C

FIN = 1 KHz

AV = 1

VCC = VC1 = VC2 = 5 V

TA = 25°C

AV = 1

VCC = VC1 = VC2 = 5 V

10 100 1K 10K 100K 1M 10M

TA = 25°C

VCC = VC1 = VC2 = 5 V

10 100 1K 10K 100K 1M

100

TA = 25°C

VCC = VC1 = VC2 = 5 V

PSRR−

PSRR+

100M 10M

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APPLICATIONS INFORMATION

Figure 22 shows a typical application on how to connect

the NCx5652 pins where the VCC is supplied by 5 V and the

output stages are supplied with 12 V. In this configuration

the inputs can be driven up to 3.8 V. The outputs can be as

high as 4 V and able to go near ground due to the excellent

VOL parameters. The loads can be up to 500 mA continuous.

Power Supply

The supply pins should be properly bypassed with

ceramic 0.1 mF to 1 mF capacitors. The different supply pins

for the input stage (VCC) and the output stage (VC1,VC2)

provide a flexible power option. In many applications there

is often a digital supply and different supply for driving

motors or elements. The output stage can be optimized for

the voltage requirements of the load. There are no

requirements o n the voltage levels (as long as they are within

specification) and sequencing of the VCC, VC1, and VC2

pins. It should be noted that the input and output swings are

a function of VCC. The common mode voltage range and

output swings are specified in the electrical section

according to the VCC voltage.

Shutdown Feature

The NCx5652 provides a thermal shutdown feature to

protect the device during fault conditions (See Output Short

Circuit Protection section). Pin 3 is an open collector output

that can be connected to a microcontroller to alert the system

that a thermal shutdown has occurred. The thermal

shutdown circuit has approximately 20°C hysteresis. When

the device is in a thermal shutdown condition, the outputs

are tri−stated. The same pin can be used for an input as well.

It can be open collector OR’d so that the microcontroller can

disable the device by driving this pin low. This pin must

always be pulled high via a 10 kW resistor (recommended

value). It should always be driven with an open

collector/drain device. Some microcontrollers have open

drain configurable outputs.

Stability

The NCx5652 is designed to drive large capacitive loads

and not oscillate even at unity gain. It is recommended that

a minimum of 0.1 mF capacitor be placed on the outputs to

ensure stability. This is mainly required for no load or light

load conditions. If configuring the device as a follower , it is

also recommended to use a 10 kW feedback resistor as

shown in Figure 22.

Thermal Considerations

As power in the NCx5652 increases, it might become

necessary to provide some thermal relief. The maximum

power dissipation supported by the device is dependent

upon board design and layout. Mounting pad configuration

on the PCB, the board material, and the ambient temperature

affect the rate of junction temperature rise for the part. When

the NCS5652 has good thermal conductivity through the

PCB, the junction temperature will be relatively low with

high power applications. The maximum dissipation the

NCx5652 can handle is given by:

PD(MAX) +

ƪTJǒMAXǓ*TAƫ

RqJA (eq. 1)

Since TJ is not recommended to exceed 150°C, then the

NCx5652 soldered on 1200 mm2, 1 oz copper area, FR4 can

dissipate up to 2.5 W when the ambient temperature (TA) is

25°C.

Output Short Circuit Protection

The NCx5652 is designed to withstand short circuits on

the outputs. With proper application design, the outputs can

be shorted to ground or to a source up to 16 V without

damage. Depending on the ambient temperature and thermal

conductivity of the PCB, the device may enter thermal

shutdown during a short circuit event. Even though the

thermal shutdown disables the outputs, the application

should not allow the outputs to be enabled continuously

during a short circuit event when a thermal shutdown occurs.

The DISABLE/Tflag pin (pin 3) should be monitored to

recognize when a thermal shutdown event happens. And

then respond within 5ms to disable the outputs for a

minimum of 5 seconds (DIS and DISHOLD parameters in

Figure 23). This low duty cycle keeps the device average

junction temperature in a safe zone.

•Output Short to Source

When it is possible that the NCx5652 can be shorted to a

source higher than VC1, VC2, a diode (D1) should be used

to prevent current flow going back to the VC1,VC2 source

as shown in Figure 22. The worst case for this event is when

VOUT is low (VOL). Figure 23 shows a diagram short from

low to high (VOUT = VOL shorted to 12 V−16 V). Note that

when the short circuit current (ISC) is lo w, the device is either

operating normal or the outputs are disabled (tri−stated).

Table 6 shows typical values for ISC−PK and ISC−CLAMP. The

parameter ISC−HOLD is the time it takes the device to enter

thermal shutdown. This parameter varies depending on the

ambient temperature and the thermal conductivity of the

PCB. If the device thermal limit is not reached, the output

current will stay clamped to the ISC−CLAMP value.

As stated earlier , the device should be disabled as soon as

thermal shutdown occurs (noted by TSHDN in figure 23).

After TSHDN occurs the device thermal shutdown circuit

will disable the outputs for approximately 20ms before

enabling them again (a characteristic from the thermal

shutdown hysteresis). To allow variations of conditions, it is

recommended that the microcontroller responds within 5ms

(DIS parameter in Table 6) to keep pin 3 low. After a

minimum of 5 seconds the microcontroller can then enable

the outputs (indicated by the EN in Figure 23). This cycle

will repeat until the short is removed from the outputs.

Figures 24 t h r u 2 6 s h o w s o m e t y p i c a l values for an example

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application using a 1200 mm2 one ounce copper PCB. The

microcontroller disables the outputs 1ms after detecting the

thermal shutdown. Note that at −40°C thermal shutdown

does not happen. Again the ISC−HOLD parameter will vary

with temperature and PCB characteristics.

It is possible that a short from low to high can disable the

outputs and not cause a thermal shutdown. When the short

is pulled significantly higher than VCC (8−9 V), the

high−side NPN protection circuit will be activated. This

protection circuitry will turn off the current source providing

the drive current to the output stage. This results in a very

short ISC−PK pulse and then disables the output. The output

is disabled until the short is removed.

•Output short to ground

When possible, it is recommended that the application use

current limiting resistors to limit the output current to 1 A

maximum when shorted to ground. This method helps

distribute the heat between the NCx5652 and the current

limiting resistors during normal operation and for a short to

ground condition. Say that Figure 22 application example

will have a 3 V maximum output with a full load of 300 mA.

The RILIM resistors of 27 W are chosen so the voltage drop

across them will be greater than 3 V at a full load of 300 mA.

(VC1 = VC2 = 12 V – VD1− (RILIM * 300 mA) = 3.2 V).

Worst case is the voltage across RILIM will be ∼ 11.3 V. So

maximum current = 11.3 V / 27 W ∼ 420 mA.

If the power dissipation exceeds the thermal shutdown

limit, the thermal shutdown circuit will disable the outputs.

As discussed with the low to high short above, the

microcontroller should disable the outputs within 5 ms and

not enable them again for 5 seconds.

Figure 22. NCx5652 Application Diagram

Thermal

Detection

312

VCC

−

VCC

Class

Bias

VCC

−

+Class

Bias

VCC

Exposed

Pad (13)

5 V

Load 1

500 mA

Max

Load 2

500 mA

Max

VC1

VC2

*Optional

0 to 3.8 V Input

To microcontroller

From microcontroller

NCx5652

0 to 3.8 V Input

5 V

12 V

VC1

RILIM

VC2

RILIM

27 W27 W

10 KW

1 mF

0.1 mF

1 mF

0.1 mF

10 KW

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Figure 23. Output Short to Source. Output = VOL Shorted to 12−16 V

ISC−HOLD

ISC−CLAMP

ISC−PK

ISC

DISABLE/Tflag

DISHOLD

TSHDN EN

DIS

Continues Until Short is Removed

Table 6. SHORT CIRCUIT PARAMETERS

Parameter Symbol Min Typ Max Units

Peak Instantaneous Short Current ISC−PK 1000 mA

Short−Circuit Clamping Current ISC−CLAMP 600 mA

Disable Response Time after Thermal Shutdown DIS 5 ms

Disable Hold Time DISHOLD 5 seconds

Short Circuit Hold Time* ISC−HOLD Varies

*Short circuit hold time is dependent on ambient temperature and printed circuit board characteristics.

Figure 24. Output Short to Source. Output = VOL Shorted to 12 V, TA = 255C

Figure 25. Output Short to Source. Output = VOL Shorted to 12 V, TA = −405C

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Figure 26. Output Short to Source. Output = VOL Shorted to 12 V, TA = 1255C

ORDERING INFORMATION

Device Automotive Marking Package Shipping †

NCS5652MUTWG No N5652 UDFN12, 3x3 mm

Pb−Free 3000 / Tape & Reel

NCV5652MUTWG Yes N5652 UDFN12, 3x3 mm

Pb−Free

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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PACKAGE DIMENSIONS

UDFN12 3x3, 0.5P

CASE 517AM

ISSUE O NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED

TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.30 MM FROM TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

ÇÇÇ

C0.10

PIN ONE

REFERENCE

TOP VIEW

SIDE VIEW

BOTTOM VIEW

C0.10

C0.08

12X A1 SEATING

PLANE

12X

NOTE 3

12X 0.10 C

0.05 C

ABB

DIM MIN MAX

MILLIMETERS

A0.45 0.55

A1 0.00 0.05

b0.20 0.30

D3.00 BSC

D2 2.40 2.60

E3.00 BSC

E2 1.60 1.80

e0.50 BSC

K0.20 −−−

L0.30 0.50

12 7

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

12X

0.48

3.30

0.50

PITCH

1.80

0.60

2.60

12X

DIMENSIONS: MILLIMETERS

0.35

11X

A3 0.07 REF

(0.15)

ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed

at www.onsemi.com/site/pdf/Patent− Marking.pdf. S CILLC r eserves the r ight to make changes without f urther n otice to any product s herein. S CILLC makes n o warranty, representation

or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and

specifically disclaims any and all l iabilit y, including without limitation special, consequential or i ncident al d amages. “Typical” parameters which may be p rovided i n SCILLC data sheets

and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each

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