FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
Publication Order Number:
FQU2N100/D
Thermal Characteristics
Symbol Parameter Unit
RJC Thermal Resistance, Junction to Case, Max. 2.5
oC/W
RJA
110
50
FQD2N100 / FQU2N100
N-Channel QFET® MOSFET
1000 V, 1.6 A, 9 Ω
Description
This N-Channel enhancement mode power MOSFET is
produced using ON Semiconductor’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
Features
•1.6 A, 1000 V, RDS(on) = 9 Ω (Max.)@ VGS = 10 V,
ID = 0.8 A
•Low Gate Charge ( Typ. 12 nC)
•Low Crss ( Typ. 5 pF)
•100% Avalanche Tested
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter FQD2N100TM / FQU2N100TU Unit
VDSS Drain-Source Voltage 1000 V
IDDrain Current - Continuous (TC = 25°C) 1.6 A
- Continuous (TC = 100°C) 1.0 A
IDM Drain Current - Pulsed (Note 1) 6.4 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 160 mJ
IAR Avalanche Current (Note 1) 1.6 A
EAR Repetitive Avalanche Energy (Note 1) 5.0 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns
PDPower Dissipation (TA = 25°C) * 2.5 W
Power Dissipation (TC = 25°C) 50 W
- Derate above 25°C 0.4 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
• RoHS Compliant
FQD2N100TM
FQU2N100TU
GDS
I-PAK
D-PAK
G
S
D
G
S
D
©2004 Semiconductor Components Industries, LLC.
October-2017,Rev.3
Thermal Resistance, Junction to Ambient (minimum pad of 2 oz copper), Max.
Thermal Resistance, Junction to Ambient (* 1 in2 pad of 2 oz copper), Max.
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FQD2N100 FQD2N100TM DPAK
FQU2N100 FQU2N100TU IPAK -
330 mm 16 mm
-
2500
70
(Note 4)
(Note 4)
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 120mH, IAS = 1.6A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 2.0A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Unit
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA1000 -- -- V
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.976 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 1000 V, VGS = 0 V -- -- 10 µA
VDS = 800 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA3.0 -- 5.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 0.8 A -- 7.1 9 Ω
gFS Forward Transconductance VDS = 50 V, ID = 0.8 A -- 1.9 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 400 520 pF
Coss Output Capacitance -- 40 52 pF
Crss Reverse Transfer Capacitance -- 5 6.5 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 500 V, ID = 2.0 A,
RG = 25 Ω-- 13 35 ns
trTurn-On Rise Time -- 30 70 ns
td(off) Turn-Off Delay Time -- 25 60 ns
tfTurn-Off Fall Time -- 35 80 ns
QgTotal Gate Charge VDS = 800 V, ID = 2.0 A,
VGS = 10 V
-- 12 15.5 nC
Qgs Gate-Source Charge -- 2.5 -- nC
Qgd Gate-Drain Charge -- 6.5 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 1.5 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 6.0 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.6 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 2.0 A,
dIF / dt = 100 A/µs
-- 520 -- ns
Qrr Reverse Recovery Charge -- 2.3 -- µC
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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0 2 4 6 8 01 21 14
0
2
4
6
8
10
12
VDS = 500V
VDS = 200V
VDS = 1000V
※ Note : ID
= 1.6 A
VGS , Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10-1 100101
0
100
200
300
400
500
600
700 C
iss = Cgs + Cgd (Cds = shorted)
Cgd
ds
C
oss = C + Cgd
C
rss =
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
150℃25℃
※ Notes :
1. VGS = 0V
2. 250µs Pulse Test
IDR , Reverse Drai n Current [A]
V
SD , Source-Drain Voltage [V]
01 32 4
0
5
10
15
20
※ Note : TJ = 25℃
VGS = 20V
VGS = 10V
RDS(on) , [ Ω]
Drain-Source On-Resistance
ID , Drain Current [A]
22 810
10-1
100
※
Notes :
1. VDS = 50V
2. 250µs Pulse Test
-55℃
150℃
25℃
ID , Drain Current [A]
4
VGS , Gate-Source Voltage [V]
10-1 100101
10-2
10-1
100
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
※ Not es :
1. 250µs Pulse Test
2. TC
= 25℃
ID, Drain Current [A]
Typical Characteristics
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 2. Transfer Characteristics
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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ZJC(t), Thermal Response [oC/W]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
※ N otes :
1 . Z θJC(t) = 2.5 ℃/W M ax.
2 . D uty F a cto r, D =t1/t2
3 . T JM - T C = PDM * ZθJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
25 50 75 100 125 150
0.0
0.3
0.6
0.9
1.2
1.5
1.8
ID, Drain Current [A]
TC, Case Temperature [℃
]
100101102103
10-2
10-1
100
101
10 µs
DC
10 ms
1 ms
100 µs
Operation in This Area
is Limited by R DS(on)
※ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※ Notes :
1. VGS = 10 V
2. ID
= 0.8 A
RDS(ON) , (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [o
C]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※
Notes :
1. VGS = 0 V
2. ID
= 250µA
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
T
J
, Junction Temperature [o
C]
Typical Characteristics (Continued)
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
t1, S q ua re W ave P u lse D u ra tion [sec]
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
IG = const.
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
Mechanical Dimensions
Dimension in Millimeters
TO-252 3L (DPAK)
Figure 16. TO252 (D-PAK), Molded, 3 Lead, Option AA&AB
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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Mechanical Dimensions
Dimension in Millimeters
TO-251 3L (IPAK)
Figure 17. TO-251 (I-PAK) Molded, 3 Lead Option AA
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
www.onsemi.com
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FQD2N100 / FQU2N100 — N-Channel QFET® MOSFET
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