Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
3A, 12V, Asynchronous Buck Converter
The APW7143 is a 3A asynchronous Buck converter with
an integrated 70mΩ P-channel power MOSFET. The
APW7143, designed with a current-mode control scheme,
can convert wide input voltage of 4.3V to 14V to the output
voltage adjustable from 0.8V to VIN to provide excellent
output voltage regulation.
For high efficiency over all load current range, the
APW7143 is equipped with an automatic Skip/PWM
mode operation. At light load, the IC operates in the Skip
mode, which keeps a constant minimum inductor peak
current, to reduce switching losses. At heavy load, the IC
works in PWM mode, which inductor peak current is pro-
grammed by the COMP voltage, to provide high efficiency
and excellent output voltage regulation.
The APW7143 is also equipped with power-on-reset,
soft-start, and whole protections (undervoltage, over
temperature, and current-limit) into a single package. In
shutdown mode, the supply current drops below 3µA.
This device, available in an 8-pin SOP-8 package, pro-
vides a very compact system solution with minimal exter-
nal components and PCB area.
FeaturesGeneral Description
•Wide Input Voltage from 4.3V to 14V
•Output Current up to 3A
•Adjustable Output Voltage from 0.8V to VIN
- ±2% System Accuracy
•70mΩ Integrated Power MOSFET
•High Efficiency up to 92%
- Automatic Skip/PWM Mode Operation
•Current-Mode Operation
- Easy Feedback Compensation
- Stable with Low ESR Output Capacitors
- Fast Load/Line Transient Response
•Power-On-Reset Monitoring
•Fixed 500kHz Switching Frequency in PWM mode
•Built-in Digital Soft-Start
•Current-Limit Protection with Frequency Foldback
•Hiccup-Mode 50% Undervoltage Protection
•Over-Temperature Protection
•<3µA Quiescent Current in Shutdown Mode
• Small SOP-8 Package
•Lead Free and Green Devices Available
(RoHS Compliant)
Applications
•OLPC, UMPC
•Notebook Computer
• Handheld Portable Device
•Step-down Converters Requiring High Efficiency
and 3A Output Current
Output Current, IOUT(A)
Efficiency, (%)
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
VIN=5V, VOUT=3.3V, L1=2.2µH
VIN=12V, VOUT=5V, L1=6.8µH
VIN=12V, VOUT=3.3V, L1=4.7µH
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw2
Ordering and Marking Information
Absolute Maximum Ratings (Note 2)
Symbol Parameter Rating Unit
VIN VIN Supply Voltage (VIN to AGND) -0.3 ~ 15 V
> 100ns -1 ~ VIN+1
VLX LX to AGND Voltage < 100ns - 5 ~ VIN+5 V
EN to AGND Voltage -0.3 ~ VIN+0.3 V
FB, COMP to AGND Voltage -0.3 ~ 6 V
Maximum Junction Temperature 150 oC
TSTG Storage Temperature -65 ~ 150 oC
TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 oC
Note 2 : Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device.
Thermal Characteristics
Symbol Parameter Value Unit
θJA Junction-to-Ambient Thermal Resistance in Free Air (Note 3)
SOP-8
80 oC/W
Note 3: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Pin Configuration
APW7143
SOP-8
Top View
1
2
3
4
8
7
6
5
LX
LX
EN
COMP
VIN
NC
AGND
FB
Pin 7 and 8 must be externally connected together.
APW7143 Package Code
K : SOP-8
Operating Junction Temperature Range
I : -40 to 85 C
Handling Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device G : Halogen and Lead Free Device
°
Handling Code
Temperature Range
Package Code
Assembly Material
APW7143 K : XXXXX - Date Code
APW7143
XXXXX
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw3
Symbol Parameter Range Unit
VIN VIN Supply Voltage 4.3 ~ 14 V
VOUT Converter Output Voltage 0.8 ~ VIN V
IOUT Converter Output Current 0 ~ 3 A
CIN Converter Input Capacitor (MLCC) 8 ~ 50 µF
Converter Output Capacitor 20 ~ 1000 µF
COUT Effective Series Resistance 0 ~ 60 mΩ
LOUT Converter Output Inductor 1 ~ 22 µH
Resistance of the Feedback Resistor connected from FB to AGND 1 ~ 20 kΩ
TA Ambient Temperature -40 ~ 85 oC
TJ Junction Temperature -40 ~ 125 oC
Note 4: Refer to the Typical Application Circuits
Recommended Operating Conditions (Note 4)
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V, and TA= -40 ~ 85°C, unless otherwise
specified. Typical values are at TA=25°C.
APW7143
Symbol Parameter Test Conditions Min Typ Max Unit
SUPPLY CURRENT
IVIN VIN Supply Current VFB = VREF +50mV, VEN=3V, LX=NC - 0.5 1.5 mA
IVIN_SD VIN Shutdown Supply Current VEN = 0V - - 3 µA
POWER-ON-RESET (POR) VOLTAGE THRESHOLD
VIN POR Voltage Threshold VIN rising 3.9 4.1 4.3 V
VIN POR Hysteresis - 0.5 - V
REFERENCE VOLTAGE
VREF Reference Voltage Regulated on FB pin - 0.8 - V
TJ = 25oC, IOUT=10mA, VIN=12V -1.0 - +1.0
Output Voltage Accuracy IOUT=10mA~3A, VIN=4.75~14V -2.0 - +2.0 %
Line Regulation VIN = 4.75V to 14V - +0.02
- %/V
Load Regulation IOUT = 0.5A ~ 3A - -0.04
- %/A
OSCILLATOR AND DUTY CYCLE
FOSC Oscillator Frequency TJ = -40 ~ 125oC, VIN = 4.75 ~ 14V 450 500 550 kHz
Foldback Frequency VOUT = 0V - 80 - kHz
Maximum Converter’s Duty - 99 - %
TON_MIN Minimum Pulse Width of LX - 150 - ns
CURRENT-MODE PWM CONVERTER
Gm Error Amplifier Transconductance
VFB=VREF±50mV - 200 - µA/V
Error Amplifier DC Gain COMP = NC - 80 - dB
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw4
Electrical Characteristics (Cont.)
Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V, and TA= -40 ~ 85°C, unless otherwise
specified. Typical values are at TA=25°C.
APW7143
Symbol Parameter Test Conditions Min Typ Max Unit
Current-Sense to COMP Voltage
Transresistance - 0.06 - V/A
V
IN = 5V, TJ= 25°C - 90 110
P-Channel Switch Resistance V
IN = 12V, TJ= 25°C - 70 90 mΩ
PROTECTIONS
ILIM P-Channel Switch Current-limit Peak Current 5.0 6.5 8.0 A
VTH_UV FB Under-Voltage Threshold V
FB falling 45 50 55 %
FB Under-Voltage Debounce - 1 - µs
TOTP Over-Temperature Trip Point - 150 - oC
Over-Temperature Hysteresis - 40 - oC
SOFT-START, SOFTSTOP, ENABLE AND INPUT CURRENTS
TSS Soft-Start 1.5 2 2.5 ms
LX Pull-Low Switch Resistance Switch is turned on for 2 ms (typ.)
interval from the falling edge of
enable signal. - 10 - Ω
EN Shutdown Voltage Threshold V
EN falling 0.5 - - V
EN Enable Voltage Threshold - - 2.1 V
P-Channel Switch Leakage Current V
EN = 0V, VLX = 0V - - 2 µA
IFB FB Pin Input Current -100 - +100
nA
IEN EN Pin Input Current V
EN = 0V ~ VIN -100 - +100
nA
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw5
Typical Operating Characteristics
VIN Input Current vs. Supply Voltage
Supply Voltage, VIN (V)
VIN Input Current, IVIN(mA)
Current-Limit Level (Peak Current)
vs. Junction Temperature
Junction Temperature, TJ (oC)
Output Voltage vs. Input Voltage
Input Voltage, VIN (V)
Output Current vs. Efficiency Output Voltage vs. Output Current
Output Current, IOUT(A)Output Current, IOUT(A)
Output Voltage, VOUT (V)
Efficiency, (%)
Output Voltage, VOUT (V)
Current Limit Level, ILIM(A)
Reference Voltage, VREF (V)
Junction Temperature, TJ (oC)
Reference Voltage vs. Junction Temperature
0.784
0.788
0.792
0.796
0.800
0.804
0.808
0.812
0.816
-50 -25 025 50 75 100 125 150
3.2
3.22
3.24
3.26
3.28
3.3
3.32
3.34
3.36
3.38
3.4
0 1 2 3
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
0.0
0.5
1.0
1.5
2.0
0 2 4 6 8 10 12 14
VFB=0.85V
4.5
5
5.5
6
6.5
7
-40 -20 0 20 40 60 80 100 120 140
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1 10
VIN=5V, VOUT=3.3V, L1=2.2µH
VIN=12V, VOUT=5V, L1=6.8µH
VIN=12V, VOUT=3.3V, L1=4.7µH
3.2
3.22
3.24
3.26
3.28
3.3
3.32
3.34
3.36
3.38
3.4
4 6 8 10 12 14
IOUT=500mA
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw6
Typical Operating Characteristics (Cont.)
Oscillator Frequency vs.
Junction Temperature
Oscillator Frequency, FOSC(KHz)
Junction Temperature, TJ (oC)
Operating Waveforms
Power OnPower Off
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
450
460
470
480
490
500
510
520
530
540
550
-50 -25 0 25 50 75 100 125 150
CH1 : VIN , 5V/div
CH2 : VOUT , 2V/div
Time : 10ms/div
CH3 : IL1 , 2A/div
1
2
3
VIN
VOUT
IL1
IOUT=3A
CH1 : VIN , 5V/div
CH2 : VOUT , 2V/div
Time : 5ms/div
1
2
3
CH3 : IL1 , 2A/div
VIN
VOUT
IL1
IOUT=3A
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw7
Operating Waveforms (Cont.)
EnableShutdown
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Over CurrentShort Circuit
CH1 : VEN , 5V/div
CH3 : IL1 , 2A/div
Time : 1ms/div
CH2 : VOUT , 2V/div
1
2
3
VEN
VOUT
IL1
IOUT=3A
VEN
VOUT
IL1
CH1 : VEN , 5V/div
CH3 : IL1, 2A/div
Time : 100µs/div
CH2 : VOUT , 2V/div
1
2
3
IOUT=3A
1
2
3
VLX
VOUT
IL1
CH1 : VLX , 5V/div
CH2 : VOUT , 200mV/div
CH3 : IL1 , 5A/div
Time : 5ms/div
VOUT is shorted to ground by a short wire
CH1 : VLX , 10V/div
CH2 : VOUT , 2V/div
CH3 : IL1 , 5A/div
Time : 20µs/div
IOUT =3~7A
VLx
VOUT
IL1
1
2
3
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw8
Operating Waveforms (Cont.)
Load Transient Response Load Transient Response
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Switching WaveformSwitching Waveform
VOUT
IL1
CH1 : VOUT , 200mV/div
CH2 : IL1 , 2A/div
Time : 100µs/div
1
2
IOUT= 50mA-> 3A ->50mA
IOUT rising/falling time=10µs
CH1 : VOUT , 100mV/div
CH2 : IL1 , 2A/div
Time : 100µs/div
IL1
VOUT
1
2
IOUT= 0.5A-> 3A ->0.5A
IOUT rising/falling time=10µs
CH1 : VLX , 5V/div
CH2 : IL1 , 2A/div
Time : 1µs/div
IL1
VLX
IOUT=0.2A
1
2
CH1 : VLX , 5V/div
CH2 : IL1 , 2A/div
Time : 1µs/div
VLX
IL1
IOUT=3A
1
2
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw9
Operating Waveforms (Cont.)
Line Transient
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
VIN
VOUT
IL1
CH1 : VIN , 5V/div
CH2 : VOUT , 50mV/div (Voffset=3.3V)
Time : 100µs/div
1
2
3
CH3 : IL1 , 2A/div
VIN= 5~12V VIN rising/falling time=20µs
Pin Description
PIN No. NAME FUNCTION
1 VIN
Power Input. VIN supplies the power (4.3V to 14V) to the control circuitry, gate driver,
and step-down converter switch. Connecting a ceramic bypass capacitor and a suitably
large capacitor between VIN and AGND eliminates switching noise and voltage ripple on
the input to the IC.
2 NC No Connection.
3 AGND Ground of MOSFET Gate Driver and Control Circuitry.
4 FB Output feedback Input. The APW7143 senses the feedback voltage via FB and
regulates the voltage at 0.8V. Connecting FB with a resistor-divider from the converter’s
output sets the output voltage from 0.8V to VIN.
5 COMP Output of the error amplifier. Connect a series RC network from COMP to AGND to
compensate the regulation control loop. In some cases, an additional capacitor from
COMP to AGND is required.
6 EN Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn
on the regulator, drive it low to turn it off. Connect this pin to VIN if it is not used.
7, 8 LX Power Switching Output. LX is the Drain of the P-Channel power MOSFET to supply
power to the output LC filter.
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw10
Block Diagram
LX
Gate
Control
VREF
Soft-Start /
Soft-Stop
and
Fault Logic
Error
Amplifier
FB
Inhibit
50%VREF UVP
AGND
POR
Power-On-
Reset
Enable
Current Sense
Amplifier
EN
COMP
Oscillator
500kHz
Slope
Compensation
Current
Compartor
1.5V
VIN
Over
Temperature
Protection
Current
Limit
FB
UG
Gate
Driver
Soft-Start
Gm
Typical Application Circuits
1. +12V Single Power Input Step-down Converter (with an Electrolytic Output Capacitor)
LX
EN
6
VIN
2
AGND
3
COMP
5
8
U1
APW7143
FB 4
VOUT
3.3V/3A
L1
4.7µH /3A
VIN
12V
C1
2.2µF
LX 7
Enable
Shutdown C2
470µF
(ESR=30mΩ)
R1
46.9K
±1%
R2
15K
±1% C4
47pF
R3
62K
C3
680pF
C5
470µF
D1
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw11
Typical Application Circuits (Cont.)
2. 4.3~14V Single Power Input Step-down Converter(with ceramic Input/Output Capacitor)
a. Cost-effective Feedback Compensation (C4 is not connected)
b. Fast-Transient-Response Feedback Compensation (C4 is connected)
VIN(V) VOUT(V) L1(µH) C2(µF) C2 ESR(mΩ)C3(pF)
12 56.8 22 563.0 12 10.0 1500
12 56.8 44 363.0 12 20.0 1500
12 3.3 4.7 22 546.9 15 10.0 1500
12 3.3 4.7 44 346.9 15 22.0 1500
12 23.3 22 530.0 20 10.0 1500
12 23.3 44 330.0 20 20.0 1500
12 1.2 2.2 22 57.5 15 8.2 1800
12 1.2 2.2 44 37.5 15 16.0 1800
53.3 2.2 22 546.9 15 8.2 680
53.3 2.2 44 346.9 15 20.0 680
51.2 2.2 22 57.5 15 3.0 1800
51.2 2.2 44 37.5 15 7.5 1800
R1(kΩ)R2(kΩ)R3(kΩ)
R2
±1%
LX
EN
6
VIN
1
AGND
3
COMP
5
8
U1
APW7143
FB 4
VOUT
L1
D1
VIN
C1
C3
R3
C2
R1
±1%
LX 7
Enable
Shutdown
C4
Optional
VIN(V) VOUT(V) L1(µH) C2(µF) C2 ESR(mΩ)C4(pF) C3(pF)
12 56.8 22 563.0 12 47 33.0 470
12 56.8 44 3 63.0 12 47 68.0 470
12 3.3 4.7 22 546.9 15 47 22.0 680
12 3.3 4.7 44 346.9 15 47 47.0 680
12 23.3 22 5 30.0 20 47 13.0 1200
12 23.3 44 3 30.0 20 47 27.0 1200
12 1.2 2.2 22 57.5 15 150 7.5 2200
12 1.2 2.2 44 37.5 15 150 15.0 2200
53.3 2.2 22 5 46.9 15 56 20.0 220
53.3 2.2 44 3 46.9 15 56 43.0 220
51.2 2.2 22 5 7.5 15 330 3.3 1800
51.2 2.2 44 37.5 15 330 8.2 1500
R1(kΩ)R2(kΩ)R3(kΩ)
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw12
Function Description
VIN Power-On-Reset (POR)
The APW7143 keeps monitoring the voltage on VIN pin to
prevent wrong logic operations which may occur when
VIN voltage is not high enough for the internal control
circuitry to operate. The VIN POR has a rising threshold of
4.1V (typical) with 0.5V of hysteresis.
During start-up, the VIN voltage must exceed the enable
voltage threshold. Then the IC starts a start-up process
and ramps up the output voltage to the voltage target.
Digital Soft-Start
The APW7143 has a built-in digital soft-start to control
the rise rate of the output voltage and limit the input cur-
rent surge during start-up. During soft-start, an internal
voltage ramp (VRAMP), connected to one of the positive
inputs of the error amplifier, rises up from 0V to 0.95V to
replace the reference voltage (0.8V) until the voltage ramp
reaches the reference voltage.
Output Undervoltage Protection (UVP)
In the process of operation, if a short-circuit occurs, the
output voltage will drop quickly. Before the current-limit
circuit responds, the output voltage will fall out of the re-
quired regulation range. The undervoltage continually
monitors the FB voltage after soft-start is completed. If a
load step is strong enough to pull the output voltage lower
than the undervoltage threshold, the IC shuts down
converter’s output.
The undervoltage threshold is 50% of the nominal output
voltage. The undervoltage comparator has a built-in 2µs
noise filter to prevent the chips from wrong UVP shut-
down caused by noise. The undervoltage protection works
in a hiccup mode without latched shutdown. The IC will
initiate a new soft-start process at the end of the preced-
ing delay.
Over-Temperature Protection (OTP)
The over-temperature circuit limits the junction tempera-
ture of the APW7143. When the junction temperature ex-
ceeds TJ = +150οC, a thermal sensor turns off the power
MOSFET, allowing the devices to cool. The thermal sen-
sor allows the converters to start a start-up process and
regulate the output voltage again after the junction tem-
perature cools by 40οC. The OTP is designed with a 40oC
hysteresis to lower the average TJ during continuous ther-
Enable/Shutdown
Driving EN to ground places the APW7143 in shutdown.
When in shutdown, the internal P-Channel power MOSFET
turns off, all internal circuitry shuts down and the quies-
cent supply current reduces to less than 3µA.
mal overload conditions, increasing lifetime of the
APW7143.
Current-Limit Protection
The APW7143 monitors the output current, flows through
the P-Channel power MOSFET, and limits the current peak
at current-limit level to prevent loads and the IC from dam-
ages during overload or short-circuit conditions.
Frequency Foldback
The foldback frequency is controlled by the FB voltage.
When the output is shorted to ground, the frequency of
the oscillator will be reduced to about 80kHz. This lower
frequency allows the inductor current to discharge safely
and thereby prevent current runaway. The oscillator’s fre-
quency will gradually increase to its designed rate when
the feedback voltage on FB again approaches 0.8V.
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw13
Application Information
(V) )
R2
R1
(10.8VOUT +⋅=
Suggested R2 is in the range from 1K to 20kΩ. For
portable applications, a 10kΩ resistor is suggested for
R2. To prevent stray pickup, locate resistors R1 and R2
close to APW7143.
Input Capacitor Selection
Each time, when the P-channel power MOSFET (Q1) turns
on, small ceramic capacitors for high frequency decoupling
and bulk capacitors are required to supply the surge current.
The small ceramic capacitors have to be placed physi-
cally close to the VIN and between the VIN and the anode
of the Schottky diode (D1).
The important parameters for the bulk input capacitor are
the voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and
current ratings above the maximum input voltage and
largest RMS current required by the circuit. The capacitor
voltage rating should be at least 1.25 times greater than
the maximum input voltage and a voltage rating of 1.5
times is a conservative guideline. The RMS current (IRMS)
of the bulk input capacitor is calculated as the following
equation:
(A) D)-(1DI IOUTRMS ⋅⋅=
where D is the duty cycle of the power MOSFET.
For a through hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid
tantalum capacitors can be used, but caution must be
exercised with regard to the capacitor surge current
rating.
VIN
VOUT
CIN
COUT
L
Q1
LX
ESR
ILIOUT
IQ1
ICOUT
D1
VIN
Figure 1 Converter Waveforms
IOUT
VLX
T=1/FOSC
IL
IQ1
ICOUT
IOUT
I
I
DT
VOUT
VOUT
Output Capacitor Selection
An output capacitor is required to filter the output and
supply the load transient current. The filtering requirements
are the functions of the switching frequency and the ripple
current (∆I). The output ripple is the sum of the voltages,
having phase shift, across the ESR and the ideal out-
put capacitor. The peak-to-peak voltage of the ESR is
calculated as the following equations:
DIN
DOUT VV VV
D++
=........... (1)
........... (2)
........... (3)
L · FD)-(1 · V
IOSC
OUT
=∆
(V) ESR · I VESR ∆=
where VD is the forward voltage drop of the diode.
The peak-to-peak voltage of the ideal output capacitor is
calculated as the following equation:
Setting Output Voltage
The regulated output voltage is determined by:
(V)
CF8I
VOUTOSC
COUT ⋅⋅ ∆
=∆........... (4)
For the applications, using bulk capacitors, the ∆VCOUT
is much smaller than the VESR and can be ignored.
Therefore, the AC peak-to-peak output voltage (∆VOUT ) is
shown below:
(V) ESRI VOUT ⋅∆=∆........... (5)
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw14
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For the applications, using ceramic capacitors, the VESR is
much smaller than the ∆VCOUT and can be ignored.
Therefore, the AC peak-to-peak output voltage (∆VOUT ) is
close to ∆VCOUT .
The load transient requirements are the functions of the
slew rate (di/dt) and the magnitude of the transient load
current. These requirements generally met with a mix of
capacitors and careful layout. High frequency capaci-
tors initially supply the transient and slow the current
load rate seen by the bulk capacitors. The bulk filter ca-
pacitor values are generally determined by the ESR
(Effective Series Resistance) and voltage rating require-
ments rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed
physically as close to the power pins of the load as
possible. Be careful not to add inductance in the circuit
board wiring that could cancel the usefulness of these
low inductance components. An aluminum electrolytic
capacitor’s ESR value is related to the case size with lower
ESR available in larger case sizes. However, the
Equivalent Series Inductance (ESL) of these capacitors
increases with case size and can reduce the usefulness
of the capacitor to high slew-rate transient loading.
Inductor Value Calculation
The operating frequency and inductor selection are
interrelated in that higher operating frequencies permit
the use of a smaller inductor for the same amount of
inductor ripple current. However, this is at the expense of
efficiency due to an increase in MOSFET gate charge
losses. The equation (2) shows that the inductance value
has a direct effect on ripple current.
Accepting larger values of ripple current allows the use of
low inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆I ≤ 0.4 ⋅ IOUT(MAX) . Remember, the
maximum ripple current occurs at the maximum input
voltage. The minimum inductance of the inductor is
calculated as the following equation:
........... (6)
IN(MAX)IN V V=
Output Diode Selection
The Schottky diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel power MOSFET duty cycle. At high input voltages
the diode conducts most of the time. As VIN approaches
VOUT, the diode conducts only a small fraction of the time.
The most stressful condition for the diode is when the
output is short-circuited. Therefore, it is important to
adequately specify the diode peak current and average
power dissipation so as not to exceed the diode ratings.
Under normal load conditions, the average current con-
ducted by the diode is:
OUT
DIN
OUTIN
DI
V V V- V
I⋅
+
=
The APW7143 is equipped with whole protections to
reduce the power dissipation during short-circuit
condition. Therefore, the maximum power dissipation of
the diode is calculated from the maximum output current
as:
D(MAX)D DIODE(MAX) I · V P=
OUT(MAX)OUT I I=
where
where
Remember to keep leading length short and observing
proper grounding to avoid ringing and increasing
dissipation.
1.2
V· L · 500000 )V-(V · V
IN
OUTINOUT ≤
(H)
V· 600000 )V-(V · V
LIN
OUTINOUT
≥
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw15
Layout Consideration
In high power switching regulator, a correct layout is
important to ensure proper operation of the regulator. In
general, interconnecting impedance should be minimized
by using short, wide printed circuit traces. Signal and
power grounds are to be kept separate and finally
combined using ground plane construction or single
point grounding. Figure 2 illustrates the layout, with bold
lines indicating high current paths. Components along
the bold lines should be placed close together. Below is
a checklist for your layout:
1. Begin the layout by placing the power components
first. Orient the power circuitry to achieve a clean power
flow path. If possible, make all the connections on
one side of the PCB with wide, copper filled areas.
2. In Figure 2, the loops with same color bold lines
conduct high slew rate current. These interconnecting
impedances should be minimized by using wide and
short printed circuit traces.
3. Keep the sensitive small signal nodes (FB, COMP)
away from switching nodes (LX or others) on the PCB.
Therefore, place the feedback divider and the feed-
back compensation network close to the IC to avoid
switching noise. Connect the ground of feedback
divider directly to the AGND pin of the IC using a
dedicated ground trace.
4. Place the decoupling ceramic capacitor C1 near the
VIN as close as possible. The bulk capacitors C5 are
also placed near VIN. Use a wide power ground plane
to connect the C1, C2, C5, and Schottky diode to
provide a low impedance path between the com-
ponents for large and high slew rate current.
Figure 2 Current Path Diagram
Figure 3 Recommended Layout Diagram
LX
EN
6
VIN
1
AGND
3
COMP
5
8
U1
APW7143
FB 4
C3
R3
LX 7
L1
C2Load
+
VOUT
-
C1
+
VIN
-
Compensat
ion Network
D1
R1
R2Feedback
Divider
(Optional)
VOUT
VLX
SOP-8
VIN
Ground 4
3
2
1L1
8
7
6
5
APW7143
D1
C2
C1
Ground
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw16
Package Information
SOP-8
S
Y
M
B
O
LMIN. MAX.
1.75
0.10
0.17 0.25
0.25
A
A1
c
D
E
E1
e
h
L
MILLIMETERS
b0.31 0.51
SOP-8
0.25 0.50
0.40 1.27
MIN. MAX.
INCHES
0.069
0.004
0.012 0.020
0.007 0.010
0.010 0.020
0.016 0.050
0
0.010
1.27 BSC 0.050 BSC
A2 1.25 0.049
0
°
8
°
0
°
8
°
D
e
E
E1
SEE VIEW A
cb
h X 45
°
A
A1A2
L
VIEW A
0.25
SEATING PLANE
GAUGE PLANE
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
3.80
5.80
4.80
4.00
6.20
5.00 0.189 0.197
0.228 0.244
0.150 0.157
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw17
Application
A H T1 C d D W E1 F
330.0±2.00
50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
SOP-8(P)
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
5.20±0.20
2.10±0.20
(mm)
Devices Per Unit
Carrier Tape & Reel Dimensions
A
E1
A
B
W
F
T
P0
OD0
BA0
P2
K0
B0
SECTION B-B
SECTION A-A
OD1
P1
H
T1
A
d
Package Type Unit Quantity
SOP-8 Tape & Reel 2500
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw18
Test item Method Description
SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec
HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C
PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C
TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles
ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V
Latch-Up JESD 78 10ms, 1tr > 100mA
Reflow Condition (IR/Convection or VPR Reflow)
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Average ramp-up rate
(TL to TP) 3°C/second max. 3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
- Temperature (TL)
- Time (tL) 183°C
60-150 seconds 217°C
60-150 seconds
Peak/Classification Temperature (Tp)
See table 1 See table 2
Time within 5°C of actual
Peak Temperature (tp) 10-30 seconds 20-40 seconds
Ramp-down Rate 6°C/second max. 6°C/second max.
Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.
Notes: All temperatures refer to topside of the package. Measured on the body surface.
Reliability Test Program
t 25 C to Peak
tp
Ramp-up
tL
Ramp-down
ts
Preheat
Tsmax
Tsmin
TL
TP
25
Temperature
Time
Critical Zone
TL to TP
°
Copyright ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
APW7143
www.anpec.com.tw19
Table 2. Pb-free Process – Package Classification Reflow Temperatures
Package Thickness Volume mm3
<350 Volume mm3
350-2000 Volume mm3
>2000
<1.6 mm 260 +0°C* 260 +0°C* 260 +0°C*
1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C*
≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C*
*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the
stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C)
at the rated MSL level.
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
Package Thickness Volume mm3
<350 Volume mm3
≥350
<2.5 mm 240 +0/-5°C 225 +0/-5°C
≥2.5 mm 225 +0/-5°C 225 +0/-5°C
Classification Reflow Profiles (Cont.)
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
