1
IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE
SEPTEMBER 2009
IDT74FCT162823AT/CT
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 18-BIT
REGISTER
DESCRIPTION:
The FCT162823T 18-bit bus interface register is built using advanced, dual
metal CMOS technology. These high-speed, low-power registers with clock
enable (xCLKEN) and clear (xCLR) controls are ideal for parity bus interfacing
in high-performance synchronous systems. The control inputs are organized
to operate the device as two 9-bit registers or one 18-bit register. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT162823T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times – reducing the need for external series terminating resistors. The
FCT162823T is a plug-in replacement for the FCT16823T and ABT16823 for
on-board interface applications.
R
C
D
2
OE
2
CLR
2
CLKEN
2
CLK
2
D
1
2
Q
1
TO EIGHT OTHER CHANNELS
R
C
D
1
OE
1
CLR
1
CLKEN
1
CLK
1
D
1
1
Q
1
TO EIGHT OTHER CHANNELS
2
1
56
55
54
3
27
28
29
30
42
15
FEATURES:
• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤≤
≤≤
≤1µA (max.)
•VCC = 5V ±10%
• Balanced Output Drivers of ±24mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,
TA = 25°C
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2009 Integrated Device Technology, Inc. DSC-5437/7
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
3225
26
27
28
2
CLR
GND
V
CC
2
Q
3
2
Q
5
2
Q
6
2
Q
4
GND
2
Q
7
2
Q
8
2
Q
9
2
OE
GND
1
Q
9
1
Q
5
1
Q
6
1
Q
7
1
Q
8
2
Q
1
2
Q
2
GND
1
Q
2
V
CC
1
CLR
1
Q
1
1
Q
3
1
Q
4
1
OE
1
CLK
1
D
1
GND
1
D
2
1
D
3
V
CC
1
D
4
1
D
5
1
D
6
1
D
7
1
D
8
1
D
9
GND
2
D
1
1
CLKEN
2
D
2
GND
2
D
4
V
CC
2
D
5
2
D
6
GND
2
D
7
2
D
8
2
D
9
2
CLK
2
D
3
2
CLKEN
Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to 7 V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 3.5 6 pF
COUT Output Capacitance VOUT = 0V 3.5 8 pF
CAPACITANCE (TA = +25°C, f = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
Pin Names Description
xDx Data Inputs
xCLK Clock Inputs
xCLKEN Clock Enable Inputs (Active LOW)
xCLR Asynchronous clear Inputs (Active LOW)
xOE Output Enable Inputs (ActiveLOW)
xOx 3-State Outputs
PIN DESCRIPTION
FUNCTION TABLE(1)(1)
(1)(1)
(1)
Inputs Outputs
xOE xCLR xCLKEN xCLK xDx xQx Function
H X X X X Z High Z
L L X X X L Clear
LHHXXQ
(2) Hold
HHL↑L Z Load
HHL↑HZ
LHL↑LL
LHL↑HH
NOTES:
1 . H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
2. Output level before indicated steady-state input conditions were established.
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IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
IODL Output LOW Current VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) 60 115 200 mA
IODH Output HIGH Current VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) –60 –115 –200 mA
VOH Output HIGH Voltage VCC = Min. IOH = –24mA 2 . 4 3. 3 — V
VIN = VIH or VIL
VOL Output LOW Voltage VCC = Min. IOL = 24mA — 0.3 0.55 V
VIN = VIH or VIL
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
IIH Input HIGH Current (Input pins)(4) VCC = Max. VI = VCC ——±1µA
Input HIGH Current (I/O pins)(4) ——±1
IIL Input LOW Current (Input pins)(4) VI = GND — — ±1
Input LOW Current (I/O pins)(4) ——±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ± 1 µA
IOZL (3-State Output pins)(4) VO = 0.5V — — ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND(3) –80 –140 –250 mA
VHInput Hysteresis — — 100 — m V
ICCL Quiescent Power Supply Current VCC = Max — 5 500 µA
ICCH VIN = GND or VCC
ICCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This test limit for this parameter is ±5µA at TA = –55°C.
OUTPUT DRIVE CHARACTERISTICS
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
ΔICC Quiescent Power Supply Current VCC = Max. — 0.5 1.5 mA
TTL Inputs HIGH VIN = 3.4V(3)
ICCD Dynamic Power Supply Current(4) VCC = Max. VIN = VCC — 75 120 µA/
Outputs Open VIN = GND M H z
xOE = xCLKEN = GND
One Input Toggling
50% Duty Cycle
ICTotal Power Supply Current(6) VCC = Max. VIN = VCC — 0.8 1.7 mA
Outputs Open VIN = GND
fCP = 10MHz
50% Duty Cycle
xOE = xCLKEN = GND VIN = 3.4V — 1.3 3.2
at fi = 5MHz VIN = GND
50% Duty Cycle
One Bit Toggling
VCC = Max. VIN = VCC — 4.2 7.1(5)
Outputs Open VIN = GND
fCP = 10MHz
50% Duty Cycle
xOE = xCLKEN = GND VIN = 3.4V — 9.2 22.1(5)
at fi = 2.5MHz VIN = GND
50% Duty Cycle
Eighteen Bits Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
POWER SUPPLY CHARACTERISTICS
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IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT162823AT FCT162823CT
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 1.5 10 1.5 4.7 ns
tPHL xCLKx to xOx RL = 500Ω
CL = 300pF(4) 1.5 20 1.5 8
RL = 500Ω
tPHL Propagation Delay CL = 50pF 1.5 14 1.5 4.7 ns
xCLR to xQx RL = 500Ω
tPZH Output Enable Time CL = 50pF 1.5 12 1.5 4.4 ns
tPZL xOE to xOx RL = 500Ω
CL = 300pF(4) 1.5 23 1.5 9
RL = 500Ω
tPHZ Output Disable Time CL = 50pF(4) 1.5 7 1.5 3.6 ns
tPLZ xOE to xOx RL = 500Ω
CL = 50pF 1.5 8 1.5 3. 6
RL = 500Ω
tSU Set-up Time HIGH or LOW xDx to xCLK CL = 50pF 3 — 1.5 — ns
RL= 500Ω
tHHold Time HIGH or LOW, xDx to xCLK 1.5 — 0 — ns
tSU Set-up Time HIGH or LOW, xCLKEN to xCLK 3 — 2.5 — ns
tHHold Time HIGH or LOW, xCLKEN to xCLK 0 — 0 — ns
tWxCLK Pulse Width HIGH or LOW 6 — 3 — ns
tWxCLR Pulse Width LOW 6 — 3 — ns
tREM Recovery Time, xCLR to xCLK 6 — 3 — ns
tSK(o) Output Skew(3) — 0.5 — 0.5 ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This condition is guaranteed but not tested.
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER
Pulse
Generator
RT
D.U.T.
VCC
VIN
CL
VOUT
50pF 500Ω
500Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU tH
tREM
tSU tH
PRESET
CLEAR
CLOCK ENABLE
ETC.
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
tPLH tPHL
tPHL
VOL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
VOL
0.3V
0.3V
tPLZtPZL
tPZH tPHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
VOH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Tests Open
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
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IDT74FCT162823AT/CT
FAST CMOS 18-BIT REGISTER INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
XX
Temp. Range
XXXX
Device Type
XX
Package
PVG
PAG
Shrink Small Outline Package - Green
Thin Shrink Small Outline Package - Green
18-Bit Register
74 40C to +85C
162 Double-Density, 5 Volt, Balanced Drive
FCT XXX
Family
823AT
823CT
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
Datasheet Document History
09/06/09 Pg. 7 Updated the ordering information by removing the "IDT" notation and non RoHS part.
