USER GUIDE | UG:303 PI3749-x0-EVAL1 Cool-Power(R) ZVS Switching Regulators Buck-Boost Evaluation Board Contents Page Introduction 1 Bill of Materials 2 Typical Connections 4 Vicor PCB Edge Connector Description 5 PAD Numbering 5 Schematic Symbol 6 PAD Definitions 6 PCB Design Files 7 Introduction The PI3749-x0-EVAL1 evaluation board demonstrates the features and benefits of the Vicor ZVS BuckBoost regulator; pre-configured for a 24VOUT voltage and rated for over 160W of output power up to 60C and up to 120W at 85C. Please refer to the corresponding PI3749-x0 data sheet for all power specifications. The PI3749-x0-Eval1 evaluation board is used with the following ZVS buck-boost products: PI3749-00, PI3749-20. The evaluation board provides several options for applying input power (VIN and GND) and output load (VOUT and GND). The user can solder tabstyle banana jacks or wire, use threaded connectors with retaining nuts or solder turret pins for clip-on connections. The evaluation board comes with all of the PI3749-x0's features accessible to the user. The currentmonitor function (IMON) is set-up to monitor the PI3749-x0's output current, sensed across a 5m resistor. The general purpose amplifier (VDIFF) comes pre-set with a gain of 2, but can be easily reconfigured for differential measurements by adding extra 0603 resistors. The I/O pins are brought out to the right edge of the evaluation board to allow for easy monitoring or for adding additional circuitry. The status of the PGD pin is indicated by a dual colored LED; red indicating a fault and green indicating no faults. The SYNCO (sync out) and SYNCI (sync in) pins are accessible to allow for paralleling or for synchronizing to an external clock. Shorting J5 on the board will connect the output of IMON to the positive input of the GP amplifier, allowing for userdesigned signal scaling and conditioning. A footprint for an external soft-start capacitor (0603) is available to tailor the start-up profile of the converter. The error amplifier's output (EAO) is brought to a pin and in conjunction with the soft-start pin can be used for paralleling converters. The error amplifier's input (EAIN) is not directly connected to a pin, but connects to the pin EXT_VREF via a 10k series resistor. Appling a DC voltage to this pin will allow the user to change the regulated output voltage without changing the feedback network. The board is designed with an edge connector to facilitate testing at the factory, but this connection can also be used for board evaluation. The PCB is 4-layer FR-4 170Tg material with 2oz copper per layer, ENIG pad finish and a board thickness of 0.062in. The board includes an I2CTM header for use with I2C-capable products like the PI3729-20. Note that the I2C interface is inhibited by default by 0 resistors installed at RSDA and RSCL (refer to Table 1 Bill of materials). These must be removed to enable I2C functionality. UG:303 Page 1 Bill of Materials Table 1 Bill of materials populated components Qty Reference Designator Value Description Manufacturer Manufacturer Part Number 14 C1, C2, C3, C4, C5, C7, C8, C9, C10, C11, C12, C13, C14, CIN1 10F Ceramic Cap, X5R, 50V, 1206 TDK C3216X5R1H106K160AB 1 C6 0.1F Murata GRM319R71H104KA01D 1 CCOMP 4.7nF Murata GRM188R71H472KA01D 1 CVDR 0.1F TDK CGA3E3X7S2A104K080AB 1 D1 Fault Status Rohm SML-P24MUWT86 2 FT1, FT2 TEST 1, TEST 2 SM Testpoint Keystone 5015 2 J5, J6 0.1in Header Jumper Samtec TSW-148-07-F-S 1 L1 65nH FP0404 Series Inductor Cooper FP0404R1-R065-R 1 LMAG 480nH HCV1206 Inductor Cooper HCV1206-R48-R 1 PCB PI3749-x0 Edge Connector Eval Board VICOR PCB0175rC VICOR PI3749-20-LGIZ Rohm MCR03EZPFX1001 Rohm MCR03EZPFX1002 Yageo RC0603FR-0714KL Yageo RC0603FR-071K07L Rohm MCR03ERTF49R9 Rohm MCR18ERTFL1R00 Panasonic ERJ-M1WSF5M0U Rohm MCR03EZPJ000 Fairchild NC7WZ14EP6X 1 1 5 1 1 1 1 1 3 1 Ceramic Cap, X7R, 50V, 1206 Ceramic Cap, X7R, 50V, 0603 Ceramic Cap, X7S, 100V, 0603 1 x 1mm Dual Color SM LED ZVS Buck-Boost, Low-Voltage ZVS I2CTM capable B-B SIP 10 x 14mm Resistor, 1%, R5 1.00k 0.1W, 0603 RDIFF1, RDIFF2, REA3, Resistor, 1%, 10.0k RPGD, RSYNCI 0.1W, 0603 Resistor, 1%, REA1 14.0k 0.1W, 0603 Resistor, 1%, REA4 1.07k 0.1W, 0603 Resistor, 1%, RGP 49.9 0.1W, 0603 Resistor, 1%, RIN 1 0.25W, 1206 Resistor, 1%, RSENSE 0.005 1W, 2512 Resistor, 1%, RSDA, RSCL, RZ1 0 0.1W, 0603 Dual Schmidt U1 NC7WZ14EP6X trigger Inverter PI3749 Non-Populated Components Table 2 Non-populated components Qty Reference Designator Description 3 REA2, RIMON, RZ2 Resistor, 1%, 0.1W, 0603 4 R1, R2, R3, R4 Factory Use Only 14 EAO, EXT_VREF, PGD, IMON, SGND1, SGND2, SS/TRK, SYNCI, SYNCO, VDIFF, VDR, VIN, VSN, VSP Thru-hole Testpoints, Vector K24C 3 CEAIN1, CEAO, CTRK Ceramic Cap, 50V, 0603 1 CIN2 Bi-Polar Capacitor, Nichicon UPW2A330MPD or equivalent 2 JVIN, JVOUT Johnson Jack, Tektronix 131503100 3 ENABLE, FT3, FT4 SM Test Point, Keystone 5015 1 JGP 0.1in Header Jumper UG:303 Page 2 PGD PCB0175rC 3 1 PCB0175rC PCM0102 PCB J4 J1 A2 A1 PGND CIN2 DNP VIN Y2 Y1 4 6 1.00k R5 VDR R3 DNP R1 DNP D1B PCB0175rC U1 NC7WZ14 ADDR0 PG SENSE CIN1 10uF VDR 1 1 5 VCC GND 2 R4 DNP 10uF 10uF D1A RSDA 0 PGD ADDR1 ADDR0 VDR 3 4 1 TOP VIEW 2 RPGD TRK PGND F2 Fiducials F1 RSYNCI 10.0K CVDR 0.1uF 10.0K PGD VDR TRK A1 ADDR1 A2 ADDR0 D1 E1 A3 SCL A4 SDA A5 EN K7 G1 VIN H1 VIN J1 VIN K1 VIN K2 VIN SCL SDA ENABLE .1uF C6 VIN_FILT 10uF C5 B1 SYNCI C1 SYNCO RSCL 0 10uF C4 SYNCI SYNCO 10uF C3 VIN_F DUAL LED ORIENTATION PGD ADDR1/FT1 ADDRO/FT2 VDR 4 SCL 3 SDA 2 EN 1 SGND SYNCI SYNCO C2 C1 H1 I2C Header ADDR1 R2 DNP 65nH FP0404R1 L1 0.51 JVIN 2 3 RZ1 0 CCOMP 4.7nF DNP CTRK LMAG 500nH PI3749 MECH PIN 1 DNP RZ2 DNP CEAO EAO RIN 1 4 VSUPPLY 2 3 K4 VS1 K5 VS1 SGND B14 TRK A6 COMP A8 UG:303 A13 EAO VSP VSN VDIFF A10 VSP VSP A9 EAO VDIFF VSN A11 EAIN A12 EAIN ISP ISN IMON K8 E14 IS+ D14 ISA14 IMON PGND G14 VOUT H14 VOUT J14 VOUT K13 VOUT K14 VOUT LGH VS1 K10 VS2 K11 VS2 VS2 A7 10uF 10uF RDIFF2 10.0K 10uF C11 VSN 10uF C13 IMON ENABLE DAC DNP CEAIN1 10uF C12 VSP J5 J6 DNP JGP Tie .005 RSENSE SGND SGND EXT_VREF 49.9 RGP 10uF C14 Tie Tie Jumper J5 to connect IMON to VP for ATE Testing. 10.0K REA3 VDIFF REA4 1.07k 14.0k REA1 DNP IMON 10uF C10 REA2 10uF C9 RDIFF1 10.0K RIMON DNP C8 C7 JVOUT VOUT SGND2 DNP SGND1 DNP 1 1 -VO SENSE 1 -VO SENSE +VO SENSE + VO SENSE 1 J3 J2 Figure 1 Evaluation board schematic COMP Page 3 Figure 2 Evaluation board details Typical Connections Figure 3 illustrates the typical input supply and output load connections required to power the PI3749-x0 evaluation board. The test points on the right side of the board provide access to key nodes used to assess the board's performance. The jumper "JGP" provides an access point that allows the user to add a small signal in the feedback loop to make Gain/Phase measurements. The jumper J5 will connect the IMON output signal to the positive input of the general purpose amplifier, allowing this signal to be scaled. The J6 jumper will disable the converter when connected. H1 provides optional access to the I2C interface, and includes SDA, SCL, EN and SGND JVIN is an unpopulated "Johnson Jack" location that may be used to measure input ripple voltage. Figure 3 Typical input and output connections UG:303 Page 4 Vicor PCB Edge Connector Description SAMTEC Reference Mechanical Drawings: based on EXTreme LPHPowerTM Socket Assembly series, available from Samtec's website PCB Dimensions: nn Recommended PCB layout for LPHS-XX-XX-X-VXX-XX PCB Layout.pdf nn Right-angle Socket: LPHS-XX-XX-X-RTX-XX-MKT.pdf nn Vertical Socket: LPHS-XX-XX-X-VXX-XX-MKT.pdf Figure 4 Edge connector details PAD Numbering Figure 5 Top (component) view Figure 6 Bottom view UG:303 Page 5 Schematic Symbol Figure 7 Schematic of edge connector CN1 P3 ENABLE SDA SCL ADDR1 P4 P1 P2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 SAMTEC LPHS-04-24 VOUT VIN DAC EAO VDIFF VSN VSP SYNCO SYNCI PGD ADDR0 VDR ISN VIN_FILT SAMTEC LPHS HORZ Edge Conn PAD Definitions Table 3 PAD Definitions PAD Name Descirption P1, P2 PGND Power ground connection for the input supply and output load P3 VOUT Output voltage connection P4 VIN 1, 2, 6, 7, 8, 10 SGND Signal ground used as reference for I/O measurements 11, 12 PGND Power ground used as reference for input and output voltage measurements 3 ENABLE 4 SDA I2CTM Serial Data 5 SCL I2C Serial Clock 9 ADR1 I2C Address <1> 13 DAC External voltage node to adjust regulated output voltage (EXT_VREF) 14 EAO Error amplifier output 15 VDIFF Differential amplifier output 16 VSN Differential amplifier inverting input 17 VPN Differential amplifier non-inverting input 18 SYNCO Sync output pin 19 SYNCI Sync input pin 20 PGD Power good status pin 21 ADR0 I2C Address <0> 22 VDR Factory use only 23 ISN Remote-sensed output voltage, after the IMON resistor 24 VIN Input supply voltage measured at SiP's input Input voltage connection Enable UG:303 Page 6 PCB Design Files ODB++ evaluation board design files are available for download on the Vicor website. Table 4 Design files Product Deisgn File Format PI3749-x0-EVAL1 ODB++ Link to Download PI3749-xx Eval ODB++.zip UG:303 Page 7 Limitation of Warranties Information in this document is believed to be accurate and reliable. HOWEVER, THIS INFORMATION IS PROVIDED "AS IS" AND WITHOUT ANY WARRANTIES, EXPRESSED OR IMPLIED, AS TO THE ACCURACY OR COMPLETENESS OF SUCH INFORMATION. VICOR SHALL HAVE NO LIABILITY FOR THE CONSEQUENCES OF USE OF SUCH INFORMATION. IN NO EVENT SHALL VICOR BE LIABLE FOR ANY INDIRECT, INCIDENTAL, PUNITIVE, SPECIAL OR CONSEQUENTIAL DAMAGES (INCLUDING, WITHOUT LIMITATION, LOST PROFITS OR SAVINGS, BUSINESS INTERRUPTION, COSTS RELATED TO THE REMOVAL OR REPLACEMENT OF ANY PRODUCTS OR REWORK CHARGES). Vicor reserves the right to make changes to information published in this document, at any time and without notice. You should verify that this document and information is current. This document supersedes and replaces all prior versions of this publication. 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