Datasheet AP6256 IEEE 802.11ac/a/b/g/n 1x1 WiFi with Bluetooth5.0 Combo Sip Module AP6256 Datasheet The revision history of the product specification Version Purpose Date Editor 1.0 Initial Doc 2019/07/18 Aaron All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 1 AP6256 Datasheet Contents 1. Introduction .................................................................................................................................... 3 1.1 Product Overview ...................................................................................................................... 3 1.2 Product Feature .......................................................................................................................... 3 1.2.1 WLAN .............................................................................................................................. 3 1.2.2 Bluetooth ........................................................................................................................ 3 2. Specification .................................................................................................................................... 4 2.1 General Specification ................................................................................................................. 4 2.2 WiFi 2.4GHz RF Specification ................................................................................................... 5 2.3 WiFi 5GHz RF Specification....................................................................................................... 6 2.4 Bluetooth RF Specification .......................................................................................................... 8 3. Electrical Characteristics .................................................................................................................. 9 3.1 Absolute Maximum Ratings ....................................................................................................... 9 3.2 Recommended Operating Rating ................................................................................................. 9 3.3 Recommended Operating Conditions and DC Characteristics .................................................... 10 4. Host Interface Timing Diagram .......................................................................................................11 4.1 Power-up Sequence Timing Diagram ........................................................................................ 11 4.2 SDIO Default Mode Timing Diagram ....................................................................................... 13 4.3 SDIO High Speed Mode Timing Diagram ................................................................................. 14 4.4 SDIO Bus Timing Specifications in SDR Modes ....................................................................... 15 4.5 SDIO Bus Timing Specifications in DDR50 Mode .................................................................... 18 4.6 PCM Interface Description ....................................................................................................... 20 4.7 UART Interface Description ..................................................................................................... 24 5. Power Consumption .......................................................................................................................26 6. Block Diagram ................................................................................................................................27 7. Pin Definition .................................................................................................................................28 7.1 Pin Outline............................................................................................................................... 28 7.2 Pin Table ................................................................................................................................. 29 8. Mechanical Specification ................................................................................................................30 8.1 Module Dimension ................................................................................................................... 30 8.2 PCB Footprint .......................................................................................................................... 31 9. External Clock Reference ................................................................................................................32 9.1 SDIO Interface Description ...................................................................................................... 33 10. Recommended Reflow Profile .........................................................................................................34 11. Package Information ......................................................................................................................35 12. Ordering Information .....................................................................................................................37 All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 2 AP6256 Datasheet 1. Introduction 1.1 Product Overview AP6256 is 11ac/a/b/g/n 1T1R WiFi +Bluetooth 5.0 SiP Module, 802.11ac allow efficient allocation of low data-rate connections, also it could interact with different vendors' 802.11ac/a/b/g/n 1x1 Access Points with SISO standard and can accomplish up to speed of 433.3Mbps with dual stream. Furthermore AP6256 included SDIO interface for Wi-Fi, UART/ PCM interface for Bluetooth. In addition, this compact module is a total solution for a combination of Wi-Fi + BT technologies. The module is specifically developed for tablet, OTT box and portable devices. 1.2 Product Feature 1.2.1 WLAN Single-stream spatial multiplexing up to 433.3 Mbps data rate 20, 40, 80 MHz channels with optional SGI (256 QAM modulation) Lead Free design which is compliant with ROHS requirements TX and RX low-density parity check (LDPC) support for improved range and power efficiency Supports 1antenna with one for WLAN & Bluetooth shared port. Also, shared Bluetooth and WLAN receive signal path eliminates the need for an external power splitter while maintaining excellent sensitivity for both Bluetooth and WLAN. Supports standard SDIO v3.0, compatible with SDIO v2.0 HOST interfaces. 1.2.2 Bluetooth BT host digital interface: - HCI UART (up to 4 Mbps) - PCM for audio data Complies with Bluetooth Core Specification Version 5.0 with provisions for supporting future specifications. With Bluetooth Class 1 or Class2 transmitter operation Supports extended synchronous connections (eSCO), for enhanced voice quality by allowing for retransmission of dropped packets All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 3 AP6256 Datasheet 2. Specification 2.1 General Specification Standards IEEE 802.11 ac/a/b/g/n 1T1R Wi-Fi + BT 5.0 Module Bluetooth V5.0 , GFSKDQPSK8DPSKLE(1Mdps)2LE(2Mdps) Chipset Broadcom Operating Frequency 2.400 GHz ~ 2.4835 GHz (2.4GHz ISM Band) 5.15~5.35GHz5.47~5.725GHz5.725~5.85GHz (5GHz UNII Band) Bluetooth: 2402 MHz ~ 2480 MHz Modulation 802.11b : DQPSKDBPSKCCK 802.11 g/n : OFDM /64-QAM16-QAMQPSKBPSK 802.11a : OFDM /64-QAM16-QAMQPSKBPSK 802.11n : OFDM /64-QAM16-QAMQPSKBPSK 802.11ac : OFDM /256-QAMOFDM /64-QAM16-QAMQPSKBPSK Bluetooth: GFSKDQPSK8DPSKLE(1Mbps)2LE(2Mbps) WiFi Interface SDIO 3.0 / 2.0 BT Interface UART / PCM Form Factor Stamp Type Antenna External Dimension L x W: 12 x 12(Typ.)mmH : 1.65 (Max.) mm (with shielding cover) L x W: 12 x 12(Typ.)mmH : 1.37 (Max.) mm (without shielding cover) Operating temperature -30C to 85C Storage temperature -40C to 125C Humidity Operating Humidity 10% to 95% Non-Condensing Driver Support Linux, Android Note: The optimal RF performance specified in the data sheet, however, is guaranteed only -20 C to +75 C and 3.2V < VBAT < 3.8V without derating performance. All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 4 AP6256 Datasheet 2.2 WiFi 2.4GHz RF Specification Conditions: VBAT=3.3V; VDDIO=3.3V; Temp:25 Output Power, tolerance + 1.5dB The transmit EVM quality & spectrum mask are compliant with IEEE 802.11 standard 802.11b 1Mbps 2Mbps 5.5Mbps 11Mbps 17 17 17 17 69Mbps 1218Mbps 24Mbps 36Mbps 48Mbps 802.11g 16 16 16 16 15 54Mbps 15 MCS0~2 MCS3 MCS4 MCS5 MCS6 802.11n 17 17 16 15 14 20MHz MCS7 14 Note: The specifications of RF output power are subject to change to fulfill the safety regulation and requirements in end-user product. Sensitivity, tolerance 2 dB CCK modulation PER 8%OFDM modulation PER 10% Data Rate Spec.(dBm) 1Mbps -96 802.11b 2Mbps -90 5.5Mbps -88 11Mbps -87 Data Rate Spec.(dBm) Data Rate 6Mbps -91 24Mbps 802.11g 9Mbps -88 36Mbps 12Mbps -87 48Mbps 18Mbps -85 54Mbps Data Rate Spec.(dBm) Data Rate MCS0 -90 MCS5 802.11n_20MHz MCS1 -85 MCS6 MCS2 -84 MCS7 MCS3 -80 MCS8 Maximum Input 802.11b : -10 dBm Level 802.11g/n : -20 dBm All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 Spec.(dBm) -83 -80 -76 -73 Spec.(dBm) -77 -75 -72 -71 5 AP6256 Datasheet 2.3 WiFi 5GHz RF Specification Conditions: VBAT=3.3V ; VDDIO=3.3V ; Temp:25C Output Power , tolerance 2 dB The transmit EVM quality & spectrum mask are compliant with IEEE 802.11 standard Frequency (MHz) 6~9Mbps 12~18Mbps 24Mbps 36Mbps 5180~5350 17 17 17 16 5500~5700 17 17 17 16 802.11a 5745~5825 17 17 17 16 Frequency (MHz) 48Mbps 54Mbps 5180~5350 16 15 5500~5700 16 15 5745~5825 16 15 Frequency (MHz) MCS0~2 MCS3 MCS4 MCS5 5180~5350 17 17 16 16 5500~5700 17 17 16 16 802.11n 5745~5825 17 17 16 16 20MHz Frequency (MHz) MCS6 MCS7 5180~5350 15 14 5500~5700 15 14 5745~5825 15 14 Frequency (MHz) MCS0~2 MCS3 MCS4 MCS5 16 16 5180~5350 17 17 802.11n 16 16 5500~5700 17 17 40MHz 16 16 5745~5825 17 17 Frequency (MHz) MCS6 MCS7 5180~5350 15 14 5500~5700 15 14 5745~5825 15 14 Frequency (MHz) MCS0~2 MCS3 MCS4 MCS5 17 17 16 16 5180~5350 17 17 16 16 5500~5700 802.11ac 17 17 16 16 5745~5825 20MHz Frequency (MHz) MCS6 MCS7 MCS8 5180~5350 15 14 12 5500~5700 15 14 12 5745~5825 15 14 12 All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 6 AP6256 Datasheet Frequency (MHz) MCS0~2 MCS3 MCS4 MCS5 17 17 5180~5350 16 16 17 17 5500~5700 16 16 802.11ac 17 17 5745~5825 16 16 40MHz Frequency (MHz) MCS6 MCS7 MCS8 MCS9 5180~5350 15 14 12 10.5 5500~5700 15 14 12 10.5 5745~5825 15 14 12 10.5 Frequency (MHz) MCS0~2 MCS3 MCS4 MCS5 17 17 5180~5350 16 16 17 17 5500~5700 16 16 802.11ac 17 17 5745~5825 16 16 80MHz Frequency (MHz) MCS6 MCS7 MCS8 MCS9 5180~5350 15 14 12 10.5 5500~5700 15 14 12 10.5 5745~5825 15 14 12 10.5 Note: The specifications of RF output power are subject to change to fulfill the safety regulation and requirements in end-user product. Sensitivity, tolerance 2 dB OFDM modulation PER 10% Data Rate Spec.(dBm) Data Rate Spec.(dBm) 6Mbps -92 24Mbps -82 802.11a 9Mbps -89 36Mbps -79 12Mbps -88 48Mbps -75 18Mbps -86 54Mbps -74 Data Rate Spec.(dBm) Data Rate Spec.(dBm) MCS0 -91 MCS4 -78 802.11n_20MHz MCS1 -88 MCS5 -74 MCS2 -85 MCS6 -73 MCS3 -82 MCS7 -72 Data Rate Spec.(dBm) Data Rate Spec.(dBm) MCS0 -89 MCS4 -76 802.11n_40MHz MCS1 -85 MCS5 -71 MCS2 -83 MCS6 -70 MCS3 -79 MCS7 -68 Data Rate Spec.(dBm) Data Rate Spec.(dBm) MCS0 -90 MCS5 -73 802.11ac_20MHz MCS1 -87 MCS6 -71 MCS2 -84 MCS7 -70 MCS3 -81 MCS8 -67 MCS4 -77 Data Rate Spec.(dBm) Data Rate Spec.(dBm) MCS0 -88 MCS5 -70 All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 7 AP6256 Datasheet 802.11ac_40MHz 802.11ac_80MHz Maximum Input Level MCS1 MCS2 MCS3 MCS4 Data Rate MCS0 MCS1 MCS2 MCS3 MCS4 802.11a/n : -20 dBm 802.11ac : -30 dBm -83 -81 -78 -75 Spec.(dBm) -85 -82 -78 -74 -71 MCS6 MCS7 MCS8 MCS9 Data Rate MCS5 MCS6 MCS7 MCS8 MCS9 -68 -66 -65 -63 Spec.(dBm) -69 -65 -63 -61 -60 2.4 Bluetooth RF Specification Conditions: VBAT=3.3v ; VDDIO=3.3V ; Temp:25 RF Specification Output Power , tolerance 1.5 dB BDR Output Power EDR Output Power BLE Output Power Sensitivity @ BER=0.1% for GFSK (1Mbps) Sensitivity @ BER=0.01% for /4-DQPSK (2Mbps) Sensitivity @ BER=0.01% for 8DPSK (3Mbps) Sensitivity @ BER=0.01% for LE (1Mbps) Sensitivity @ BER=0.01% for 2LE (2Mbps) CL1 (dBm) 6 4 5 Sensitivity, tolerance 1.5 dB Min Typical -86 dBm CL2 (dBm) 2 2 2 Max -87 dBm -83 dBm -90 dBm -90 dBm FSK (1Mbps):-20dBm Maximum Input Level /4-DQPSK (2Mbps) :-20dBm 8DPSK (3Mbps) :-20dBm Note*The Bluetooth output power is able to be configured by firmware (hcd file). All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 8 AP6256 Datasheet 3. Electrical Characteristics 3.1 Absolute Maximum Ratings Symbol Description Min. Input supply Voltage VBAT VDDIO Digital/Bluetooth/SDIO/ I/O Voltage -0.5 -0.5 Max. Unit 5.0 3.9 V V Extreme caution must be exercised to prevent electrostatic discharge (ESD) damage. Minimum Symbol Condition ESD Rating ESD_HAND_HBM Human body model contact discharge per JEDEC EID/JESD22-A114 ESD_HAND_CDM Charged device model contact discharge per JEDEC EIA/JESD22-C101 Unit 1 kV 250 V 3.2 Recommended Operating Rating The module requires two power supplies: VBAT and VDDIO. Voltage rails VBAT VDDIO VBAT current consumption 1A (Peak), when VBAT = 3.3V Min. Typ. Max. Unit 3.0 1.68 3.3 1.8/3.3 4.8 3.6 V V The module requires two power supplies: other Digital I/O Pins. For VDDIO=1.8V VIL/VIH VOL/VOH output@2mA For VDDIO=3.3V Min. Max. Unit 0.35xVDDIO 0.4 0.65xVDDIO VDDIO-0.4 V V Min. Max. Unit VIL/VIH 0.80 2 V VOL/VOH output@2mA 0.4 VDDIO-0.4 V All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 9 AP6256 Datasheet 3.3 Recommended Operating Conditions and DC Characteristics Parameter Symbol DC supply voltage for VBAT DC supply voltage for core DC supply voltage for RF blocks in chip DC supply voltage for TCXO input buffer DC supply voltage for digital I/O DC supply voltage for RF switch I/Os External TSSI input Internal POR threshold VBAT VDD VDDRF WRF_TCXO_VDD VDDIO VDDIO_RF TSSI Vth_POR Minimum Value Typical Maximum Unit 3.0a 1.14 1.14 1.62 1.62 3.13 0.15 0.4 1.2 1.2 1.8 3.3 - 5.25b 1.26 1.26 1.98 3.63 3.46 0.95 0.7 V V V V V V V V Other Digital I/O Pins For VDDIO = 1.8V Input high voltage Input low voltage Output high Voltage @ 2 mA Output Low Voltage @ 2 mA For VDDIO = 3.3V Input high voltage Input low voltage Output high Voltage @ 2 mA Output Low Voltage @ 2 mA VIH VIL VOH VOL 0.65 x VDDIO VDDIO - 0.45 - -- 0.35 x VDDIO 0.45 V V V V VIH VIL VOH VOL 2.00 VDDIO - 0.4 - - 0.80 0.40 V V V V VOH VOL C OUT VDDIO - 0.4 - - 0.40 5 V V pF RF Switch Control Output Pins c For VDDIO_RF = 3.3V Output high Voltage @ 2 mA Output Low Voltage @ 2 mA Output capacitance All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 10 AP6256 Datasheet 4. Host Interface Timing Diagram 4.1 Power-up Sequence Timing Diagram The module has signals that allow the host to control power consumption by enabling or disabling the Bluetooth, WLAN and internal regulator blocks. These signals are described below. Additionally, diagrams are provided to indicate proper sequencing of the signals for carious operating states. The timing value indicated are minimum required values: longer delays are also acceptable. WL_REG_ON: Used by the PMU to power up or power down the internal regulators used by the WLAN section. When this pin is high, the regulators are enabled and the WLAN section is out of reset. When this pin is low the WLAN section is in reset. BT_REG_ON: Used by the PMU to power up or power down the internal regulators used by the BT section. Low asserting reset for Bluetooth. This pin has no effect on WLAN and does not control any PMU functions. This pin must be driven high or low (not left floating). WLAN=ON, Bluetooth=ON All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 11 AP6256 Datasheet WLAN=ON, Bluetooth=OFF All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 12 AP6256 Datasheet 4.2 SDIO Default Mode Timing Diagram All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 13 AP6256 Datasheet Parameter Symbol Minimum Typical Maximum Unit 25 400 10 10 MHz kHz ns ns ns ns - - ns ns - 14 50 ns ns SDIO CLK (ALL values are referred to minimum VIH and maximum VIL b) Frequency - Data Transfer mode fPP 0 Frequency - Identification mode fOD 0 Clock low time tWL 10 Clock high time tWH 10 Clock rise time tTLH Clock low time tTHL InputsCMD, DAT(referenced to CLK) Input setup time Input hold time OutputsCMD, DAT(referenced to CLK) tISU tIH 5 5 Output delay time - Data Transfer mode tODLY 0 Output delay time,- Identification mode tODLY 0 a. Timing is based on CL 40 pF load on CMD and Data. b. Min. (Vih) = 0.7 x VDDIO and max. (Vil) = 0.2 x VDDIO 4.3 SDIO High Speed Mode Timing Diagram All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 14 AP6256 Datasheet Parameter Symbol Minimum Typical SDIO CLK (ALL values are referred to minimum VIH and maximum VIL b) Frequency - Data Transfer mode fPP 0 Frequency - Identification mode fOD 0 Clock low time tWL 7 Clock high time tWH 7 Clock rise time tTLH Clock low time tTHL InputsCMD, DAT(referenced to CLK) Maximum Unit 50 400 3 3 MHz kHz ns ns ns ns Input setup time Input hold time OutputsCMD, DAT(referenced to CLK) tISU tIH 6 2 - - ns ns Output delay time - Data Transfer mode Output hold time Total system capacitance(each line) tODLY tOH CL 2.5 - 14 40 ns ns 4.4 SDIO Bus Timing Specifications in SDR Modes Parameter Symbol Minimum Maximum Unit Comments - 40 - ns SDR12 mode 20 - ns SDR25mode 10 - ns SDR50 mode 4.8 - ns SDR104 mode - 0.2 x tCLK ns t t CR, CF < 2.00 ns (max) @100MHz, CCARD = 10 pF t t CR, CF < 0.96 ns (max) @208MHz, CCARD = 10 pF t - t Clock duty CLK t CR, CF - 30 70 % - All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 15 AP6256 Datasheet SDIO Bus Input timing (SDR Modes) Symbol Minimum Maximum Unit Comments SDR104 Mode t t IS 1.4 - ns C CARD = 10 pF, VCT= 0.975V IH 0.80 - ns C CARD = 5 pF, VCT= 0.975V IS 3.00 - ns C CARD = 10 pF, VCT= 0.975V IH 0.80 - ns C CARD = 5 pF, VCT= 0.975V SDR50 Mode t t SDIO Bus output timing (SDR Modes up to 100MHz) All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 16 AP6256 Datasheet Symbol Minimum t ODLY - 7.5 ns t C CLK 10 ns L ODLY - 14.0 ns t CLK OH 1.5 - ns Hold time at the tODLY (min) CL = 15 pF t t Maximum Unit Comments = 30 pF using driver type B for SDR50 20 ns CL = 40 pF using for SR12, SDR25 Card output timing (SDR Modes 100MHz to 208MHz) Symbol Minimum Maximum Unit Comments t 0 2 UI Card output phase tOP -350 +1550 ps Delay variation due to temp. change after tuning tODW 0.60 - UI t OP ODW = 2.88 ns @ 208MHz tOP = +1550 ps for junction temperature of tOP = 90 degrees during operation tOP = -350 ps for junction temperature of tOP = -20 degrees during operation tOP = +2600 ps for junction temperature of tOP = -20 to +125 degrees during operation All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 17 AP6256 Datasheet Consideration for Variable Data Window (SDR 104 Mode) 4.5 SDIO Bus Timing Specifications in DDR50 Mode Parameter Symbol Minimum Maximum Unit Comments - t CLK 20 - ns DDR50 mode - t t CR, CF - 0.2 x tCLK ns t t CR, CF C CARD= Clock duty - 45 55 % <4.00 ns(max) @ 50MHz 10 pF - All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 18 AP6256 Datasheet Data Timing Parameter Input CMD Input setup time Symbol Minimum Maximum Unit Input hold time t Output CMD Output delay time t Output hold time t Input DAT Input setup time t Input hold time t Output DAT Output delay time t Output hold time t t Comments ISU 6 - ns C CARD < 10 pF (1 Card) IH 0.8 - ns C CARD < 10 pF (1 Card) ODLY - 13.7 ns C CARD < 30 pF (1 Card) OH 1.5 - ns C CARD < 15 pF (1 Card) ISU2x 3 - ns C CARD < 10 pF (1 Card) IH2x 0.8 - ns C CARD < 10 pF (1 Card) ODLY2x - 7.5 ns C CARD < 25 pF (1 Card) ODLY2x 1.5 - ns C CARD < 15 pF (1 Card) All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 19 AP6256 Datasheet 4.6 PCM Interface Description The PCM Interface on the BCM43456 can connect to linear PCM Codec devices in master or slave mode. In master mode, the BCM43456 generates the PCM_CLK and PCM_SYNC signals, and in slave mode, these signals are provided by another master on the PCM interface and are inputs to the BCM43456.The configuration of the PCM interface may be adjusted by the host through the use of vendor-specific HCI commands. Short Frame Sync, Master Modem PCM Timing Diagram (Short Frame Sync, Master Mode) PCM Interface Timing Specifications (Short Frame Sync, Master Mode) Peference 1 2 3 4 5 6 7 8 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC delay PCM_OUT delay PCM_IN setup PCM_IN hold Delay from rising edge of PCM_BCLK during last bit period to PCM_OUT becoming high impedance Minimum 41 41 0 0 8 8 0 Typical - All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 Maximum 12 25 25 25 Unit MHz ns ns ns ns ns ns ns 20 AP6256 Datasheet Short Frame Sync, Slave Mode PCM Timing Diagram (Short Frame Sync, Slave Mode) PCM Interface Timing Specifications (Short Frame Sync, Slave Mode) Peference 1 2 3 4 5 6 7 8 9 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC setup PCM_SYNC hold PCM_OUT delay PCM_IN setup PCM_IN hold Delay from rising edge of PCM_BCLK during last bit period to PCM_OUT becoming high impedance Minimum 41 41 8 8 0 8 8 0 Typical - Maximum 12 25 25 Unit MHz ns ns ns ns ns ns ns Long Frame Sync, Master Mode PCM Timing Diagram (Long Frame Sync, Master Mode) All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 21 AP6256 Datasheet PCM Interface Timing Specifications (Long Frame Sync, Master Mode) Peference 1 2 3 4 5 6 7 8 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC delay PCM_OUT delay PCM_IN setup PCM_IN hold Delay from rising edge of PCM_BCLK during last bit period to PCM_OUT becoming high impedance Minimum 41 41 0 0 8 8 0 Typical - Maximum 12 25 25 25 Unit MHz ns ns ns ns ns ns ns Typical - Maximum 12 25 25 Unit MHz ns ns ns ns ns ns ns Long Frame Sync, Slave Mode PCM Timing Diagram (Long Frame Sync, Slave Mode) PCM Interface Timing Specifications (Long Frame Sync, Slave Mode) Peference 1 2 3 4 5 6 7 8 9 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC setup PCM_SYNC hold PCM_OUT delay PCM_IN setup PCM_IN hold Delay from rising edge of PCM_BCLK during last bit period to PCM_OUT becoming high impedance Minimum 41 41 8 8 0 8 8 0 All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 22 AP6256 Datasheet Short Frame Sync, Burst Mode PCM Burst Mode Timing (Receive Only, Short Frame Sync) PCM Burst Mode (Receive Only, Short Frame Sync) Peference 1 2 3 4 5 6 7 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC setup PCM_SYNC hold PCM_IN setup PCM_IN hold Minimum 20.8 20.8 8 8 8 8 Typical - Maximum 24 - Unit MHz ns ns ns ns ns ns Long Frame Sync, Burst Mode PCM Burst Mode Timing (Receive Only, Long Frame Sync) All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 23 AP6256 Datasheet PCM Burst Mode (Receive Only, Long Frame Sync) Peference 1 2 3 4 5 6 7 Characteristics PCM bit clock frequency PCM bit clock low PCM bit clock high PCM_SYNC setup PCM_SYNC hold PCM_IN setup PCM_IN hold Minimum 20.8 20.8 8 8 8 8 Typical - Maximum 24 - Unit MHz ns ns ns ns ns ns 4.7 UART Interface Description The UART is a standard 4-wire interface (RX, TX, RTS, and CTS) with adjustable baud rates from 9600 bps to 4.0 Mbps. The interface features an automatic baud rate detection capability that returns a baud rate selection. Alternatively, the baud rate may be selected through a vendor-specific UART HCI command. UART has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support EDR. Access to the FIFOs is conducted through the AHB interface through either DMA or the CPU. The UART supports the Bluetooth 5.0 UART HCI specification: H4, a custom Extended H4, and H5. The default baud rate is 115.2 Kbaud. The UART supports the 3-wire H5 UART transport, as described in the Bluetooth specification (Three-wire UART Transport Layer). Compared to H4, the H5 UART transport reduces the number of signal lines required by eliminating the CTS and RTS signals. The BCM43456 UART can perform XON/XOFF flow control and includes hardware support for the Serial Line Input Protocol (SLIP). It can also perform wake-on activity. For example, activity on the RX or CTS inputs can wake the chip from a sleep state. All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 24 AP6256 Datasheet Normally, the UART baud rate is set by a configuration record downloaded after device reset, or by automatic baud rate detection, and the host does not need to adjust the baud rate. Support for changing the baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. The BCM43456 UARTs operate correctly with the host UART as long as the combined baud rate error of the two devices is within 2%. Example of Common Baud Rates Desired Rate 4000000 3692000 3000000 2000000 1500000 1444444 921600 460800 230400 115200 57600 38400 28800 19200 14400 9600 Actual Rate 4000000 3692308 3000000 2000000 1500000 1454544 923077 461538 230796 115385 57692 38400 28846 19200 14423 9600 Error(%) 0.00 0.01 0.00 0.00 0.00 0.70 0.16 0.16 0.17 0.16 0.16 0.00 0.16 0.00 0.16 0.00 UART Timing All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 25 AP6256 Datasheet UART Timing Specifications Pef 1 2 3 Characteristics Delay time, BT_UART_CTS_N low BT_UART_TXD valid Setup time, BT_UART_CTS_N high before midpoint stop bit Delay time, midpoint of stop bit BT_UART_RTS_N high Min. - Typ. - Max. Unit 1.5 Bit periods 0.5 Bit periods 0.5 Bit periods 5. Power Consumption 2.4GHz: Test Mode DUT Status Supply Voltage Supply Voltage (VBAT 3.3V ) (VDDIO 3.3V ) 802.11b Continue TX 357mA 0.59mA 11Mbps Continue RX 55.7mA 0.74mA 802.11g Continue TX 328mA 0.59mA 54Mbps Continue RX 55.7mA 0.74mA 802.11n MCS7 Continue TX HT20 312mA 0.60mA Continue RX HT20 55.7mA 0.74mA 5GHz: Test Mode 802.11a 54Mbps DUT Status Continue TX Supply Voltage Supply Voltage (VBAT 3.3V ) 237mA (VDDIO 3.3V ) 0.64mA Continue RX 70.8mA 0.75mA Continue TX HT20 233mA 0.65mA Continue RX HT20 70.8mA 0.75mA Continue TX HT40 176mA 0.68mA Continue RX HT40 79.8mA 0.76mA Continue TX HT20 228mA 0.68mA Continue RX HT20 70.7mA 0.76mA 802.11ac Continue TX HT40 232mA 0.67mA MCS8 Continue RX HT40 79.7mA 0.76mA Continue TX HT80 240mA 0.66mA Continue RX HT80 104mA 0.75mA Continue TX HT40 169mA 0.69mA 802.11ac Continue RX HT40 79.6mA 0.76mA MCS9 Continue TX HT80 189mA 0.69mA Continue RX HT80 103mA 0.75mA 802.11n MCS7 All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 26 AP6256 Datasheet 6. Block Diagram All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 27 AP6256 Datasheet 7. Pin Definition 7.1 Pin Outline All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 28 AP6256 Datasheet 7.2 Pin Table NO Name Type Description 1 GND Ground connections 2 WL_BT_ANT I/O RF I/O port 3 GND Ground connections 4 NC Floating (Don't connected to ground) 5 NC Floating (Don't connected to ground) 6 BT_WAKE I HOST wake-up Bluetooth device 7 BT_HOST_WAKE O Bluetooth device to wake-up HOST 8 NC Floating (Don't connected to ground) 9 VBAT P Main power voltage source input 10 XTAL_IN I Crystal input 11 XTAL_OU T WL_REG O Crystal output I _ON WL_HOS T_WAKE SDIO_DA O Power up/down internal WLAN toregulators wake-up usedHOST by WiFi SDIOsection data line 2 SDIO data line 3 12 13 14 TA_2 SDIO_DA TA_3 SDIO_DA I/ O I/ O I/ TA_CMD SDIO_DA TA_CLK SDIO_DA O I/ O I/ TA_0 SDIO_DA TA_1 GND O I/ O P 22 VIN_LDO _OUT VDDIO 23 VIN_LDO P 24 LPO I 25 O 26 PCM_OU T PCM_CLK 27 PCM_IN I/ OI 28 PCM_SY NC I/ O I 31 SDIO_VS NC EL GND 32 NC 33 GND 15 16 17 18 19 20 21 29 30 P SDIO command line line SDIO clock SDIO data line 0 SDIO data line 1 Ground connections Internal Buck voltagesupply I/O Voltage generation pin inputBuck Internal voltage External Low generation pin Power Clock input PCM Data output (32.768KHz) PCM clock PCM data input PCM sync signal SDIO mode selection 1 Floating pin (Don't 1.8V(SDIO 3.0/ connected Ground to 2.0), 0 ground) connections Floating (Don't 3.3V(SDIO 2.0) connected Ground to ground) connections All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 29 AP6256 Datasheet 34 35 BT_REG_ ON NC 36 GND 37 GPIO_6 38 GPIO_3 I/ O I/ 39 GPIO_5 40 GPIO_2 41 UART_RT S_N UART_TX O O I 44 D UART_RX D UART_CT 45 S_N TP1(NC) 46 TP2(NC) 47 TP3(NC) 42 43 I O I/ O I/ O I 8. Mechanical Specification Power up/down internal regulators Floating (Don't used by BT section connected Ground to ground) connections GPIO configuration GPIO pin configuration GPIO pin configuration GPIO pin configuration pin Bluetooth UART interface Bluetooth UART interface Bluetooth UART interface Bluetooth UART interface Floating (Don't connected to Floating (Don't ground) connected to Floating (Don't ground) to connected ground) 8.1 Module Dimension All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 30 AP6256 Datasheet 8.2 PCB Footprint Unit: mm Solder paste layer design is generally the same as recommended footprint. () If soldering quality with good wetting on upright side is essential for PQC, how to optimize the aperture design in the stencil to adjust the amount of solder paste would be crucial. In addition, a kind of stencil design with stepped thickness in partial area would be considered if the thickness of stencil is about 0.1mm or thinner. Please optimize the stencil design by manufacture engineer or contact SparkLAN FAE for assistance. ( 0.1mm ,). All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 31 AP6256 Datasheet 9. External Clock Reference External LPO signal characteristics Parameter Specification Units Nominal input frequency Frequency accuracy 32.768 +/-30 kHz ppm Duty cycle 30 - 70 % 1600 to 3300 mV, p-p Square-wave or sine-wave - Input signal amplitude Signal type Input impedance Clock jitter (integrated over 300Hz - 15KHz) Output high voltage >100k pF <5 <1 Hz 0.7Vio - Vio V Input signal amplitude follow VDDIO (1.8V or 3.3V) All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 32 AP6256 Datasheet 9.1 SDIO Interface Description The module supports SDIO version 3.0 for all 1.8V 4-bit UHSI speeds: SDR50(100 Mbps), SDR104(208MHz) and DDR50(50MHz, dual rates) in addition to the 3.3V default speed(25MHz) and high speed (50 MHz). It has the ability to stop the SDIO clock and map the interrupt signal into a GPIO pin. This `out-of-band' interrupt signal notifies the host when the WLAN device wants to turn on the SDIO interface. The ability to force the control of the gated clocks from within the WLAN chip is also provided. Function 0 Standard SDIO function (Max Block Size / Byte Count = 32B) Function 1 Backplane Function to access the internal System On Chip (SOC) address space (Max Block Size / Byte Count = 64B) Function 2 WLAN Function for efficient WLAN packet transfer through DMA (Max Block Size/Byte Count=512B) SDIO Pin Description SD 4-Bit Mode DATA0 DATA1 DATA2 DATA3 CLK CMD Data Line 0 Data Line 1 or Interrupt Data Line 2 or Read Wait Data Line 3 Clock Command Line All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 33 AP6256 Datasheet 10. Recommended Reflow Profile Referred to IPC/JEDEC standard Peak Temperature : <260C Cycle of Reflow: 2 times max. Adding Nitrogen (N2) to implement 2000ppm or less of oxygen concentration during reflow process is recommended. If the shelf time is exceeded, be sure baking step to remove the moisture from the component. All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 34 AP6256 Datasheet 11. Package Information 10 sprocket hole pitch cumulative tolerance 0.20. Carrier camber is within 1 mm in 250 mm. Material: Black Conductive Polystyrene Alloy. All dimensions meet EIA-481-D requirements. Thickness: 0.300.05mm. Component load per 13"reel : 1500 PCS All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 W A0 B0 K0 E F 24.000.30 12.300.10 12.300.10 1.80.10 1.750.10 11.500.10 P0 P1 P2 D0 D1 4.000.10 16.000.10 2.000.10 1.50+0.10-0.00 1.50MIN 35 AP6256 Datasheet All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 36 AP6256 Datasheet Note: 1 tape reel = 1 box = 1,500pcs 1 Carton = 5 box = 7,500pcs 12. Ordering Information Product Name Part Number AP6256 R9701820001 Description 11ac/a/b/g/n 1T1R WiFi + BT5.0 Combo Sip Module All Rights Reserved. SparkLAN may make changes to specification and descriptions at any time without prior notice. www.sparklan.com / sales@sparklan.com / +886 2 2659-1880 37