MC100EP16FMNR4 - ON Semiconductor L.L.C.

December, 2006 − Rev. 4

1Publication Order Number:

MC100EP16F/D

MC100EP16F

3.3V / 5VECL Differential

Receiver/Driver With

Reduced Output Swing

Description

The MC100EP16F is a differential receiver/driver. The device is

functionally equivalent to the EP16 device with higher performance

capabilities. With reduced output swings, rise/fall transition times are

significantly faster than on the EP16. The EP16F is ideally suited for

interfacing with high frequency sources.

The VBB pin, an internally generated voltage supply, is available to

this device only. For single−ended input conditions, the unused

differential input is connected to VBB as a switching reference voltage.

VBB may also rebias AC coupled inputs. When used, decouple VBB

and VCC via a 0.01 mF capacitor and limit current sourcing or sinking

to 0.5 mA. When not used, VBB should be left open.

Features

•100 ps Typical Rise and Fall Time

•Max Frequency >4 GHz Typical

•The 100 Series Contains Temperature Compensation

•PECL Mode Operating Range: VCC = 3.0 V to 5.5 V

with VEE = 0 V

•NECL Mode Operating Range: VCC = 0V

with VEE = −3.0 V to −5.5 V

•Open Input Default State

•Safety Clamp on Inputs

•Pb−Free Packages are Available

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

M = Date Code

G= Pb−Free Package

SOIC−8

D SUFFIX

CASE 751

MARKING DIAGRAMS*

TSSOP−8

DT SUFFIX

CASE 948R

ALYWG

KP60

http://onsemi.com

*For additional marking information, refer to

Application Note AND8002/D.

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

ORDERING INFORMATION

8KEP60

ALYW

DFN8

MN SUFFIX

CASE 506AA

3C MG

(Note: Microdot may be in either location)

MC100EP16F

http://onsemi.com

VEE

VCC

Figure 1. 8−Lead Pinout (Top View) and Logic Diagram

VBB

Q, Q ECL Data Outputs

ECL Data Inputs

VBB Reference Voltage Output

Table 1. PIN DESCRIPTION

D*, D**

FUNCTION

VCC Positive Supply

VEE Negative Supply

NC No Connect

* Pins will default LOW when left open.

** Pins will default to VCC/2 when left open.

EP Exposed pad must be connected

to a sufficient thermal conduit.

Electrically connect to the most

negative supply or leave floating

open.

Table 2. ATTRIBUTES

Characteristics Value

Internal Input Pulldown Resistor 75 kW

Internal Input Pullup Resistor 37.5 kW

ESD Protection Human Body Model

Machine Model

Charged Device Model

> 4 kV

> 200 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg

SOIC−8

TSSOP−8

DFN8

Level 1

Level 3

Level 1

Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in

Transistor Count 139

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

MC100EP16F

http://onsemi.com

Table 3. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit

VCC PECL Mode Power Supply VEE = 0 V 6 V

VEE NECL Mode Power Supply VCC = 0 V −6 V

VIPECL Mode Input Voltage

NECL Mode Input Voltage

VEE = 0 V

VCC = 0 V

VI  VCC

VI  VEE

−6

Iout Output Current Continuous

Surge

100

IBB VBB Sink/Source ± 0.5 mA

TAOperating Temperature Range −40 to +85 °C

Tstg Storage Temperature Range −65 to +150 °C

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

8 SOIC

190

130

°C/W

qJC Thermal Resistance (Junction−to−Case) Standard Board 8 SOIC 41 to 44 ± 5% °C/W

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

8 TSSOP

185

140

°C/W

qJC Thermal Resistance (Junction−to−Case) Standard Board 8 TSSOP 41 to 44 ± 5% °C/W

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

DFN8

129

°C/W

Tsol Wave Solder Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

MC100EP16F

http://onsemi.com

Table 4. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)

−40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE Power Supply Current 23 28 40 25 33 45 26 33 45 mA

VOH Output HIGH Voltage (Note 3) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV

VOL Output LOW Voltage (Note 3) 1525 1690 1775 1525 1690 1775 1525 1690 1775 mV

VIH Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV

VIL Input LOW Voltage (Single−Ended)

(Note 4)

1355 1675 1355 1675 1355 1675 mV

VBB Output Voltage Reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential Configuration)

(Note 5)

2.0 3.3 2.0 3.3 2.0 3.3 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current D

0.5

−150

0.5

−150

0.5

−150

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.

3. All loading with 50 W to VCC − 2.0 V.

4. Not recommended for Single−Ended operation when using an EP16F to drive another EP16F. VOL has reduced output swing and may not

meet the VIL specification over temperature.

5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

Table 5. DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 6)

−40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE Power Supply Current 23 28 40 25 35 45 26 33 45 mA

VOH Output HIGH Voltage (Note 7) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV

VOL Output LOW Voltage (Note 7) 3225 3390 3475 3225 3390 3475 3225 3390 3475 mV

VIH Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV

VIL Input LOW Voltage (Single−Ended)

(Note 8)

3055 3375 3055 3375 3055 3375 mV

VBB Output Voltage Reference 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential Configuration)

(Note 9)

2.0 5.0 2.0 5.0 2.0 5.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current D

0.5

−150

0.5

−150

0.5

−150

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

6. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.

7. All loading with 50 W to VCC − 2.0 V.

8. Not recommended for Single−Ended operation when using an EP16F to drive another EP16F. VOL has reduced output swing and may not

meet the VIL specification over temperature.

9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

MC100EP16F

http://onsemi.com

Table 6. DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 10)

−40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE Power Supply Current 23 28 40 25 34 45 26 33 45 mA

VOH Output HIGH Voltage (Note 11) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV

VOL Output LOW Voltage (Note 11) −1775 −1610 −1525 −1775 −1610 −1525 −1775 −1610 −1525 mV

VIH Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV

VIL Input LOW Voltage (Single−Ended)

(Note 12)

−1810 −1625 −1810 −1625 −1810 −1625 mV

VBB Output Voltage Reference −1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential Configuration)

(Note 13)

VEE+2.0 0.0 VEE+2.0 0.0 VEE+2.0 0.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current D

0.5

−150

0.5

−150

0.5

−150

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

10.Input and output parameters vary 1:1 with VCC.

11. All loading with 50 W to VCC − 2.0 V.

12. Not recommended for Single−Ended operation when using an EP16F to drive another EP16F. VOL has reduced output swing and may not

meet the VIL specification over temperature.

13.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 14)

−40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

fmax Maximum Toggle Frequency

(See Figure 2. Fmax/JITTER)

> 4 > 4 > 4 GHz

tPLH,

tPHL

Propagation Delay to Output

Differential

170 210 250 180 220 260 200 250 300 ps

tSKEW Duty Cycle Skew 5.0 20 5.0 20 5.0 20 ps

tJITTER Cycle−to−Cycle Jitter (RMS)

(See Figure 2. Fmax/JITTER)

0.2 < 1 0.2 < 1 0.2 < 1 ps

VPP Input Voltage Swing

(Differential Configuration)

150 800 1200 150 800 1200 150 800 1200 mV

Output Rise/Fall Times Q

(20% − 80%)

70 85 110 80 100 120 90 110 130 ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

14.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC−2.0 V.

MC100EP16F

http://onsemi.com

100

200

300

400

500

600

700

800

0 1000 2000 3000 4000 5000 6000

Figure 2. Fmax/JITTER

FREQUENCY (MHz)

Measured

Simulated

(JITTER)

ÉÉÉÉÉÉÉÉ

VOUTpp (mV)

JITTEROUT ps (RMS)

Figure 3. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

Driver

Device

Receiver

Device

Q D

Zo = 50 W

50 W50 W

VTT

VTT = VCC − 2.0 V

MC100EP16F

http://onsemi.com

ORDERING INFORMATION

Device Package Shipping†

MC100EP16FD SOIC−898 Units / Rail

MC100EP16FDG SOIC−8

(Pb−Free)

98 Units / Rail

MC100EP16FDR2 SOIC−82500 / Tape & Reel

MC100EP16FDR2G SOIC−8

(Pb−Free)

2500 / Tape & Reel

MC100EP16FDT TSSOP−8100 Units / Rail

MC100EP16FDTG TSSOP−8

(Pb−Free)

100 Units / Rail

MC100EP16FDTR2 TSSOP−82500 / Tape & Reel

MC100EP16FDTR2G TSSOP−8

(Pb−Free)

2500 / Tape & Reel

MC100EP16FMNR4 DFN8 1000 / Tape & Reel

MC100EP16FMNR4G DFN8

(Pb−Free)

1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D −ECL Clock Distribution Techniques

AN1406/D −Designing with PECL (ECL at +5.0 V)

AN1503/D −ECLinPSt I/O SPiCE Modeling Kit

AN1504/D −Metastability and the ECLinPS Family

AN1568/D −Interfacing Between LVDS and ECL

AN1672/D −The ECL Translator Guide

AND8001/D −Odd Number Counters Design

AND8002/D −Marking and Date Codes

AND8020/D −Termination of ECL Logic Devices

AND8066/D −Interfacing with ECLinPS

AND8090/D −AC Characteristics of ECL Devices

MC100EP16F

http://onsemi.com

PACKAGE DIMENSIONS

SOIC−8 NB

CASE 751−07

ISSUE AH

SEATING

PLANE

X 45 _

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW

STANDARD IS 751−07.

0.10 (0.004)

DIM

MIN MAX MIN MAX

INCHES

4.80 5.00 0.189 0.197

MILLIMETERS

B3.80 4.00 0.150 0.157

C1.35 1.75 0.053 0.069

D0.33 0.51 0.013 0.020

G1.27 BSC 0.050 BSC

H0.10 0.25 0.004 0.010

J0.19 0.25 0.007 0.010

K0.40 1.27 0.016 0.050

M0 8 0 8

N0.25 0.50 0.010 0.020

S5.80 6.20 0.228 0.244

−X−

−Y−

0.25 (0.010)

−Z−

0.25 (0.010) ZSXS

____

1.52

0.060

7.0

0.275

0.6

0.024

1.270

0.050

4.0

0.155

ǒmm

inchesǓ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

MC100EP16F

http://onsemi.com

PACKAGE DIMENSIONS

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A2.90 3.10 0.114 0.122

B2.90 3.10 0.114 0.122

C0.80 1.10 0.031 0.043

D0.05 0.15 0.002 0.006

F0.40 0.70 0.016 0.028

G0.65 BSC 0.026 BSC

L4.90 BSC 0.193 BSC

M0 6 0 6

____

SEATING

PLANE

PIN 1

DETAIL E

2X L/2

−U−

U0.15 (0.006) T

0.10 (0.004) V S

0.10 (0.004)

−T−

−V−

−W−

0.25 (0.010)

8x REFK

IDENT

K0.25 0.40 0.010 0.016

TSSOP−8

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948R−02

ISSUE A

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010)

PER SIDE.

5. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

6. DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE −W−.

MC100EP16F

http://onsemi.com

PACKAGE DIMENSIONS

DFN8

CASE 506AA−01

ISSUE D

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994 .

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED

TERMINAL AND IS MEASURED BETWEEN

0.25 AND 0.30 MM FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

ÇÇÇ

C0.10

PIN ONE

2 X

REFERENCE

2 X

TOP VIEW

SIDE VIEW

BOTTOM VIEW

(A3)

C0.10

C0.08

8 X

SEATING

PLANE

e/2 e

8 X

NOTE 3

8 X 0.10 C

0.05 C

ABB

DIM MIN MAX

MILLIMETERS

A0.80 1.00

A1 0.00 0.05

A3 0.20 REF

b0.20 0.30

D2.00 BSC

D2 1.10 1.30

E2.00 BSC

E2 0.70 0.90

e0.50 BSC

K0.20 −−−

L0.25 0.35

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

MC100EP16F/D

ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your local

Sales Representative