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Features
Applications
General Description
Block Diagram
TEMP SENSOR &
COMPENSATION
CIRCUITRY
MEMS
OSCILLATOR PLL DIVIDER
DRIVER
Pin 1
ENABLE
Pin 2
NC
Pin 3
GND
Pin 6
VDD
Pin 5
OUTPUT
Pin 4
OUTPUT
TABLE 1: OUTPUT ENABLE MODES
EN Pin DSC1102 DSC1122
Low-Jitter Precision LVPECL Oscillator
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1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
†Notice:
ELECTRICAL CHARACTERISTICS
Parameters Sym. Min. Typ. Max. Units Conditions
LVPECL Outputs
Note 1:
2:
3:
4:
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ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1:
2:
3:
4:
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Note 1:
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2.0 PIN DESCRIPTIONS
1EN
NC
GND
6VDD
OUT
OUT
5
4
2
3
FIGURE 2-1: Pin Configuration, 6-Lead QFN
TABLE 2-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
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3.0 NOMINAL PERFORMANCE PARAMETERS
FIGURE 3-1: Power Supply Rejection
Ratio. FIGURE 3-2: Phase Jitter (Integrated
Phase Noise).
3.1 Output Waveform
V
IL
1/
f
o
Output
Enable
t
DA
t
EN
t
F
t
R
V
IH
80%
20%
50%
Output
830 mv
350 mV
FIGURE 3-3: Output Waveform.
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3.2 Typical Termination Scheme
VDD
R1
2
34
5
6
R3
R2 R4
VDD
FIGURE 3-4: Typical Termination Scheme.
TABLE 3-1: RECOMMENDED RESISTOR VALUES
VDD R1, R3 R2, R4
3.3 Test Circuit
FIGURE 3-5: Test Circuit.
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3.4 Recommended Board Layout
1
34
6
5
2
4
5
2
3
6
1
Via to GND layer
Via to GND layer
Supply bypass
capacitor
FIGURE 3-6: Recommended Board Layout.
3.5 Solder Reflow Profile
MSL 1 @ 260°C refer to JSTD-020C
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4.0 PACKAGE MARKING INFORMATION
4.1 Package Marking Information
Example
6-Lead CDFN/VDFN*
XXXXXXX
0SSS
DCPYYWW
0400000
0603
DCP1941
Legend:
*
Note
3
e
3
e
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B
A
0.05 C
0.05 C
0.07 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1007A Sheet 1 of 2
2X
6X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
D
E
e
2X b2
4X b1
L
L1
A
A1
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Microchip Technology Drawing C04-1007A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Terminal Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b2
b1
e
L
E
N
1.05 BSC
0.85
0.65
0.45
0.80
0.00
0.50
0.70
0.90
0.85
0.02
2.50 BSC
MILLIMETERS
MIN NOM
6
0.95
0.75
0.55
0.90
0.05
MAX
L1 0.10 REFTerminal Pullback
Overall Length D 3.20 BSC
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RECOMMENDED LAND PATTERN
Dimension Limits
Units
X1Contact Pad Width (X4)
Contact Pitch
MILLIMETERS
1.05 BSC
MIN
E
MAX
1.00
Contact Pad Length (X6)
Contact Pad Width (X2)
Y
X2
0.85
Microchip Technology Drawing C04-3007A
NOM
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
SILK SCREEN
12
6
CContact Pad Spacing 1.60
Space Between Contacts (X4) G1 0.25
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
Y
X2
G
0.60
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B
A
0.20 C
0.20 C
0.10 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C A B
0.10 C A B
0.10 C
Microchip Technology Drawing C04-1010A Sheet 1 of 2
2X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
D
E
e
6X b
D2
E2
6X L (K)
A
A1
0.08 C
6X
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Number of Terminals
Overall Height
Terminal Width
Overall Width
Terminal Length
Exposed Pad Width
Pitch
Standoff
Units
Dimension Limits
A1
A
b
E2
e
L
E
N
2.54
1.70
1.00
1.35
0.80
0.00
1.40
1.10
1.80
0.85
0.02
5.00 BSC
MILLIMETERS
MIN NOM
6
1.90
1.20
1.45
0.90
0.05
MAX
K0.20 REF
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
Terminal-to-Exposed-Pad
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Overall Length
Exposed Pad Length
D
D2 2.70
7.00 BSC
2.80 2.90
Microchip Technology Drawing C04-1010A Sheet 2 of 2
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
DSC1102/22
RECOMMENDED LAND PATTERN
Dimension Limits
Units
Optional Center Pad Width
Optional Center Pad Length
Contact Pitch
Y2
X2
1.90
2.90
MILLIMETERS
2.54 BSC
MIN
E
MAX
Contact Pad Length (X6)
Contact Pad Width (X6)
Y1
X1
1.35
1.50
Microchip Technology Drawing C04-3010A
NOM
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
12
6
CContact Pad Spacing 3.70
Contact Pad to Center Pad (X2) G 0.20
Thermal Via Diameter (X6) V
Thermal Via Pitch EV
0.33
1.20
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
With 2.8x1.8 mm Exposed Pad
C
E
X1
Y1
X2
Y2
EV
EV ØV G
SILK SCREEN
DSC1102/22
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APPENDIX A: REVISION HISTORY
Revision A (October 2019)
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NOTES:
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PRODUCT IDENTIFICATION SYSTEM
Examples:
PART NO.
X
X
Packaging
Stability
Device
Device:
Package:
Temperature
Range:
Stability:
Frequency:
Packing Option:
X
Package
Note 1:
X
Temperature
Range
-XXX.XXXX
Frequency
Option
Note:
DSC1102/22
NOTES:
.
Trademarks
Note the following details of the code protection feature on Microchip devices:
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
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