SLLS171G − O C TOBER 1993 − REVISED MARCH2009
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DMeets or Exceeds the EIA Standards
RS-422-A, RS-423-A, RS-485, and CCITT
Recommendation V.11
DDesigned to Operate With Pulse Durations
as Short as 20 ns
DDesigned for Multipoint Transmission on
Long Bus Lines in Noisy Environments
DInput Sensitivity . . . ±200 mV
DLow-Power Consumption...20 mA Max
DOpen-Circuit Fail-Safe Design
DCommon-Mode Input Voltage Range of
−7 V to 12 V
DPin Compatible With SN75175 and LTC489
description
The SN65LBC175 and SN75LBC175 are monolithic, quadruple, differential line receivers with 3-state outputs
designed to meet the requirements of the EIA standards RS-422-A, RS-423-A, RS-485, and CCITT
Recommendation V.11. The devices are optimized for balanced multipoint bus transmission at data rates up
to and exceeding 10 million bits per second. The receivers are enabled in pairs, with an active-high enable input.
Each differential receiver input features high impedance, hysteresis for increased noise immunity, and
sensitivity of±200 mV over a common-mode input voltage range of 12 V to −7 V. The fail-safe design ensures
that when the inputs are open-circuited, the outputs are always high. Both devices are designed using the TI
proprietary LinBiCMOStechnology allowing low power consumption, high switching speeds, and robustness.
These devices offer optimum performance when used with the SN75LBC172 or SN75LBC174 quadruple line
drivers. The SN65LBC175 is available in the 16-pin DIP (N), small-outline package (D), and the wide
small-outline package (DW). The SN75LBC175 is available in the 16-pin DIP (N) and the small-outline package
(D).
The SN65LBC175 is characterized over the industrial temperature range of −40°C to 85°C. The SN75LBC175
is characterized for operation over the commercial temperature range of 0°C to 70°C.
AVAILABLE OPTIONS
PACKAGE
TEMPERATURE RANGE
PACKAGE
0°C to 70°C −40°C to 85°C
SOIC SN75LBC175D SN65LBC175D
Wide SOIC SN65LBC175DW
PDIP SN75LBC175N SN65LBC175N
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2009 Texas Instruments Incorporated
! " #$%! " &$'(#! )!%*
)$#!" # ! "&%##!" &% !+% !%" %," "!$%!"
"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)%
!%"!/ (( &%!%"*
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
1,2EN
2Y
2A
2B
GND
VCC
4B
4A
4Y
3,4EN
3Y
3A
3B
D, DW, OR N PACKAGE
(TOP VIEW)
LinBiCMOS is a trademark of Texas Instruments.
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
2B
2A
1B
1A
1,2EN
2Y
1Y
5
3
7
6
1
2
4EN
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
4B
4A
3B
3A
3,4EN
4Y
3Y
13
11
15
14
9
10
12 EN
logic diagram (positive logic)
2Y
1Y
5
3
7
6
1
2
4
2B
2A
1B
1A
1,2EN
4Y
3Y
13
11
15
14
9
10
12
4B
4A
3B
3A
3,4EN
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
A−B ENABLE OUTPUT
Y
VID ≥ 0.2 V H H
−0.2 V < VID < 0.2 V H ?
VID ≤ −0.2 V H L
X L Z
Open circuit H H
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTS
VCC
Y Output
EQUIVALENT OF A AND B INPUTS
12 kΩ
3 kΩ
18 kΩ
1 kΩ
VCC
Input
100 kΩ
(A Only)
100 kΩ
(B Only)
Input
VCC
TYPICAL OF EN INPUT
Outpu
t
Receiver
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) −0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (A or B inputs) ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at Y, 1/2EN, 3/4EN −0.3 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN65LBC175 −40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN75LBC175 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic Discharge (ESD): Human Body Model (HBM) 1 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Machine Model (MM) 200 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model (CDM) 1.5 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
D1100 mW 8.7 mW/°C709 mW 578 mW
DW 1200 mW 9.6 mW/°C 770 mW 625 mW
N1150 mW 9.2 mW/°C736 mW 598 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
Common-mode input voltage, VIC −7 12 V
Differential input voltage, VID ±6 V
High-level input voltage, VIH
EN inputs
2 V
Low-level input voltage, VIL EN inputs 0.8 V
High-level output current, IOH −8 mA
Low-level output current, IOL 8 mA
Operating free-air temperature, TA
SN65LBC175 −40 85
°C
Operating free-air temperature, TASN75LBC175 0 70 °C
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIT+ Positive-going input threshold voltage IO = −8 mA 0.2 V
VIT− Negative-going input threshold voltage IO = 8 mA −0.2 V
Vhys Hysteresis voltage (VIT+ − VIT−) 45 mV
VIK Enable input clamp voltage II = −18 mA −0.9 −1.5 V
VOH High-level output voltage VID = 200 mV, IOH = −8 mA 3.5 4.5 V
VOL Low-level output voltage VID = −200 mV, IOL = 8 mA 0.3 0.5 V
IOZ High-impedance-state output current VO = 0 V to VCC ±20 µA
VIH = 12 V, VCC = 5 V, Other inputs at 0 V 0.7 1
II
Bus input current
A or B inputs
VIH = 12 V, VCC = 0 V, Other inputs at 0 V 0.8 1
mA
IIBus input current A or B inputs VIH = −7 V, VCC = 5 V, Other inputs at 0 V −0.5 −0.8 mA
VIH = −7 V, VCC = 0 V, Other inputs at 0 V −0.4 −0.8
IIH High-level enable input current VIH = 5 V ±20 µA
IIL Low-level enable input current VIL = 0 V −20 µA
IOS Short-circuit output current VO = 0 −80 −120 mA
ICC
Supply current
Outputs enabled, IO = 0, VID = 5 V 11 20
mA
I
CC
Supply current
Outputs disabled 0.9 1.4
mA
†All typical values are at VCC = 5 V and TA = 25°C.
switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
tPHL Propagation delay time, high- to low-level output
VID = −1.5 V to 1.5 V,
11 22 30 ns
tPLH Propagation delay time, low- to high-level output
VID = −1.5 V to 1.5 V,
See Figure 1 11 22 30 ns
tPZH Output enable time to high level See Figure 2 17 30 ns
tPZL Output enable time to low level See Figure 3 18 30 ns
tPHZ Output disable time from high level See Figure 2 30 40 ns
tPLZ Output disable time from low level See Figure 3 23 30 ns
tsk(p) Pulse skew (|tPHL − tPLH|) See Figure 2 4 6 ns
ttTransition time See Figure 1 3 10 ns
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOL
VOH
−1.5 V
1.5 V
Output
Input
1.3 V1.3 V
tPHL
tPLH
0 V0 V
(see Note A)
Generator
Output
(see Note B)
CL = 15 pF
50 Ω
TEST CIRCUIT VOLTAGE WAVEFORMS
tt
tt
90%
10%
2 V
Figure 1. tPLH and tPHL Test Circuit and Voltage Waveforms
0 V
S1 Open S1 Closed
1.3 V1.3 V
tPHZ
tPZH 0.5 V
See Note C
VCC
2 kΩ
S1
5 kΩ
1.5 V
CL = 15 pF
(see Note B)
Output
Generator
(see Note A) 1.3 V
Input
Output
3 V
0 V
VOH
≈ 1.4 V
50 Ω
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
Figure 2. tPHZ and tPZH Test Circuit and Voltage Waveforms
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
S2
0 V
3 V
S2 Closed
tPLZ
S2 Open
tPZL
VOL
Output
Input
1.3 V
(see Note A)
Generator
Output
(see Note B)
CL = 15 pF
1.5 V
See Note C
0.5 V
1.3 V 1.3 V
50 Ω
5 kΩ
2 kΩ
VCC
≈ 1.4 V
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle = 50%, tr ≤ 6 ns,
tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms
TYPICAL CHARACTERISTICS
Figure 4
1.5
1
0.5
001020304050
− Output Voltage − V
2
2.5
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
3
60 70 80 90 100
3.5
4
4.5
VO
VID − Differential Input Voltage − mV
VCC = 5 V
TA = 25°C
VIC = − 7 V
VIC = 0 V
VIC = 12 V
VIC = − 7 V
VIC = 0 V
VIC = 12 V
Figure 5
1.5
1
0.5
00 −4 −8 −12 −16 −20
− High-Level Output Voltage − V
2
2.5
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
3
−24 −28 −32 −36 −40
3.5
4
4.5
VOH
IOH − High-Level Output Current − mA
5
5.5
VCC = 4.75 V
VCC = 5.25 V
VCC = 5 V
VID = 0.2 V
TA = 25°C
SLLS171G − O C TOBER 1993 − REVISED MARCH2009
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
180
120
60
00 3 6 9 12 15
− Low-Level Output Voltage − mV
240
300
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
360
18 21 24 27 30
420
480
540
VOL
IOL − Low-Level Output Current − mA
600
660 TA = 25°C
VCC = 5 V
VID = 200 mV
Figure 7
6
4
2
0
10k 100k 1M
− Average Supply Current − mA
8
10
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
12
10M 100M
14
ICC
f − Frequency − Hz
TA = 25°C
VCC = 5 V
Figure 8
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
−0.4
−0.6
−0.8
−1
−8 −6 −4 −2 0 2
− Input Current − mA
−0.2
0
INPUT CURRENT
vs
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
0.2
468
10 12
0.4
0.6
0.8
II
VI − Input Voltage − V
1TA = 25°C
VCC = 5 V
The shaded region of this graph represents
more than 1 unit load per RS-485.
Figure 9
23.5
23
22.5
22
−40 −20 0 20 40 60
Propagation Delay Time − ns
24
24.5
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
80 100
TA − Free-Air Temperature − °C
tPHL
tPLH
VCC = 5 V
CL = 15 pF
VIO = ±1.5 V
tpd −
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN65LBC175D ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DW ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DWG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DWR ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175DWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC175N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN65LBC175NE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75LBC175D ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC175DG4 ACTIVE SOIC D 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC175DR ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC175DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC175N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75LBC175NE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 17-Mar-2009
Addendum-Page 1
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN75LBC175 :
•Military: SN55LBC175
NOTE: Qualified Version Definitions:
•Military - QML certified for Military and Defense Applications
PACKAGE OPTION ADDENDUM
www.ti.com 17-Mar-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN65LBC175DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN65LBC175DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN65LBC175DWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
SN75LBC175DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN75LBC175DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN65LBC175DR SOIC D 16 2500 333.2 345.9 28.6
SN65LBC175DR SOIC D 16 2500 367.0 367.0 38.0
SN65LBC175DWR SOIC DW 16 2000 367.0 367.0 38.0
SN75LBC175DR SOIC D 16 2500 333.2 345.9 28.6
SN75LBC175DR SOIC D 16 2500 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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