WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 1 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
128Kx32 SRAM MODULE, SMD 5962-93187 & 5962-95595
FEATURES
Access Times of 15, 17, 20, 25, 35, 45, 55ns
MIL-STD-883 Compliant Devices Available
Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP
(Package 400)
• 68 lead, 40mm CQFP (G4T)1, 3.56mm (0.140") (Package
502)
• 68 lead, 22.4mm CQFP (G2U), 3.56mm (0.140"),
(Package 510)
• 68 lead, 22.4mm (0.880") square, CQFP (G2L), 5.08mm
(0.200") high, (Package 528)
Organized as 128Kx32; User Confi gurable as 256Kx16 or
512Kx8
Commercial, Industrial and Military Temperature Ranges
5 Volt Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Built in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
Weight:
WS128K32-XG2UX - 8 grams typical
WS128K32-XG2LX - 8 grams typical
WS128K32-XH1X - 13 grams typical
WS128K32-XG4TX1 - 20 grams typical
Devices are upgradeable to 512Kx32
This product is subject to change without notice.
Pin Description
Block Diagram
FIGURE 1 – PIN CONFIGURATION FOR WS128K32N-XH1X
WE#1 CS#1 CS#2 CS#3 CS#4 WE#4 WE#3 WE#2
128K x 8 128K x 8 128K x 8 128K x 8
OE#
A0-16
I/O 0-7 I/O 24-31 I/O 16-23 I/O 8-15
8 8 8 8
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
Top View
I/O8
I/O9
I/O10
A13
A14
A15
A16
NC
I/O0
I/O1
I/O2
1 12 23 344556
11 22 33 44 55 66
WE2#
CS2#
GND
I/O11
A10
A11
A12
VCC
CS1#
NC
I/O3
I/O31
I/O30
I/O29
I/O28
A0
A1
A2
I/O23
I/O22
I/O21
I/O20
VCC
CS4#
WE4#
I/O27
A3
A4
A5
WE3#
CS3#
GND
I/O19
I/O24
I/O25
I/O26
A6
A7
NC
A8
A9
I/O16
I/O17
I/O18
I/O15
I/O14
I/O13
I/O12
OE#
NC
WE1#
I/O7
I/O6
I/O5
I/O4
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 2 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
Block Diagram
FIGURE 2 – PIN CONFIGURATION FOR WS128K32-XG4TX1
FIGURE 3 – PIN CONFIGURATION FOR WS128K32-XG2UX AND WS128K32-XG2LX
Block Diagram
Pin Description
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
Pin Description
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4# Write Enables
CS1-4# Chip Selects
OE# Output Enable
VCC Power Supply
GND Ground
NC Not Connected
Note 1: Package Not Recommended For New Design
Top View
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
2
#
OE#
CS
4
#
NC
NC
NC
NC
NC
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
#
GND
CS
3
#
WE
1
#
A
6
A
7
A
8
A
9
A
10
V
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Top View
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
#
OE#
CS
2
#
NC
WE
2
#
WE
3
#
WE
4
#
NC
NC
NC
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
#
GND
CS
4
#
WE
1
#
A
6
A
7
A
8
A
9
A
10
V
CC
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
WE#1 CS#1 CS#2 CS#3 CS#4 WE#4 WE#3 WE#2
128K x 8 128K x 8 128K x 8 128K x 8
OE#
A0-16
I/O 0-7 I/O 24-31 I/O 16-23 I/O 8-15
8 8 8 8
128K X 8
8 8 8 8
128K X 8 128K X 8 128K X 8
WE#
OE#
A0-16
CS1# CS2# CS3# CS4#
I/O0 - 7 I/O8 - 15 I/O16 - 23 I/O24 - 31
Note 1: Package Not Recommended For New Design
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 3 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter Sym Conditions -15 -17 -20 -25 Units
Min Max Min Max Min Max Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 10 10 10 μA
Output Leakage Current ILO CS# = VIH, OE# = VIH, VOUT = GND to VCC 10 10 10 10 μA
Operating Supply Current ICC CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5 600 600 600 600 mA
Standby Current ISB CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5 80 80 80 60 mA
Output Low Voltage VOL IOL = 8mA, VCC = 4.5 0.4 0.4 0.4 0.4 V
Output High Voltage VOH IOH = -4.0mA, VCC = 4.5 2.4 2.4 2.4 2.4 V
Parameter Sym Conditions -35 -45 -55 Units
Min Max Min Max Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 10 10 μA
Output Leakage Current ILO CS# = VIH, OE# = VIH, VOUT = GND to VCC 10 10 10 μA
Operating Supply Current ICC CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5 600 600 600 mA
Standby Current ISB CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5 60 60 60 mA
Output Low Voltage VOL IOL = 8mA, VCC = 4.5 0.4 0.4 0.4 V
Output High Voltage VOH IOH = -4.0mA, VCC = 4.5 2.4 2.4 2.4 V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS (For WS128K32L-XXX Only)
-55°C ≤ TA ≤ +125°C, -40°C ≤ TA ≤ +85°C
Characteristic Sym Conditions Min Typ Max Units
Data Retention Voltage
Data Retention Quiescent Current
VCC
ICCDR
VCC = 2.0V
CS ³ VCC -0.2V
2
-
-
1
-
2
V
mA
Chip Disable to Data Retention Time (1)
Operation Recovery Time (1)
TCDR
TR
VIN ³ VCC -0.2V
or VIN 0.2V
0
TRC
--
-
ns
ns
NOTE: Parameter guaranteed, but not tested.
TRUTH TABLE
CS OE WE Mode Data I/O Power
H X X Standby High Z Standby
L L H Read Data Out Active
L X L Write Data In Active
L H H Out Disable High Z Active
CAPACITANCE
TA = +25°C
Parameter
Symbol
Conditions Max Unit
OE# capacitance COE
VIN = 0V, f = 1.0 MHz
50 pF
WE1-4# capacitance
HIP (PGA) H1
CWE
VIN = 0V, f = 1.0 MHz
20
pF
CQFP G4T 50
CQFP G2U/G2L 20
CS1-4# capacitance CCS
VIN = 0V, f = 1.0 MHz
20 pF
Data# I/O capacitance CI/O
VI/O = 0V, f = 1.0 MHz
20 pF
Address input capacitance CAD
VIN = 0V, f = 1.0 MHz
50 pF
This parameter is guaranteed by design but not tested.
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Min Max Unit
Operating Temperature TA-55 +125 °C
Storage Temperature TSTG -65 +150 °C
Signal Voltage Relative to GND VG-0.5 VCC+0.5 V
Junction Temperature TJ150 °C
Supply Voltage VCC -0.5 7.0 V
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp (Mil) TA-55 +125 °C
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 4 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle Symbol -15 -17 -20 -25 -35 -45 -55 Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tRC 15 17 20 25 35 45 55 ns
Address Access Time tAA 15 17 20 25 35 45 55 ns
Output Hold from Address Change tOH 0000000 ns
Chip Select Access Time tACS 15 17 20 25 35 45 55 ns
Output Enable to Output Valid tOE 10 10 12 15 20 25 30 ns
Chip Select to Output in Low Z tCLZ13333333 ns
Output Enable to Output in Low Z tOLZ10000000 ns
Chip Disable to Output in High Z tCHZ112 12 12 12 15 20 20 ns
Output Disable to Output in High Z tOHZ112 12 12 12 15 20 20 ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Write Cycle Symbol -15 -17 -20 -25 -35 -45 -55 Units
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tWC 15 17 20 25 35 45 55 ns
Chip Select to End of Write tCW 14 14 15 20 25 30 45 ns
Address Valid to End of Write tAW 14 15 15 20 25 30 45 ns
Data Valid to End of Write tDW 10 10 12 15 20 25 25 ns
Write Pulse Width tWP 14 14 15 20 25 30 45 ns
Address Setup Time tAS 0000000 ns
Address Hold Time tAH 0000000 ns
Output Active from End of Write tOW13333444 ns
Write Enable to Output in High Z tWHZ110 10 12 15 20 25 25 ns
Data Hold Time tDH 0000000 ns
1. This parameter is guaranteed by design but not tested.
FIGURE. 4 – AC TEST CIRCUIT AC Test Conditions
Parameter Typ Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 5 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
FIGURE 7 – WRITE CYCLE - CS# CONTROLLED
WRITE CYCLE 2, CS# CONTROLLED
CS#
WE#
FIGURE 5 – TIMING WAVEFORM - READ CYCLE
READ CYCLE 2 (WE# = VIH)
CS#
OE#
READ CYCLE 2, (CS# = OE# = V
IL
, WE# = V
IH
)
WRITE CYCLE 2, CS# CONTROLLED
CS#
WE#
FIGURE 6 – WRITE CYCLE - WE# CONTROLLED
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 6 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
4.60 (0.181)
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Note 1: Package Not
Recommended
For New Design
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)1
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 7 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
25.15 (0.990) ± 0.25 (0.010) MAX
22.36 (0.880) ± 0.25 (0.010) MAX
20.31 (0.800) REF
0.38 (0.015) ± 0.05 (0.002)
1.27 (0.050) TYP
5.10 (0.200) MAX
0.25 (0.010) ± 0.10 (0.002)
24.0 (0.946)
± 0.25 (0.010)
0.23 (0.009) REF
R 0.127
(0.005)
2
O
/ 9
O
1.01 (0.040)
± 0.13 (0.005)
1.37 (0.054) MIN 0.004
0.940" TYP
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 8 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
ORDERING INFORMATION
Note 1: Package Not Recommended For New Designs
* Low Power Data Retention only available in G2U, G2L, PackageTypes
White Electronic Designs Corporation
(Microsemi corporation)
SRAM
ORGANIZATION, 128Kx32
User confi gurable as 256Kx16 or 512Kx8
IMPROVEMENT MARK:
N = No Connect at pin 8, 21, 28 and 39 in HIP for Upgrades
L = Low Power*
ACCESS TIME (ns)
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex-In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528)
G4T1 = 40 mm Low Profi le CQFP (Package 502)
DEVICE GRADE:
Q = MIL-STD-883 Compliant
M = Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
W S 128K32 X - XXX X X X
WS128K32-XXX
September 2010 © 2010 Microsemi Corporation. All rights reserved. 9 Microsemi Corporation • (602) 437-1520 • www.microsemi.com
Rev. 18
Microsemi Corporation reserves the right to change products or specifi cations without notice.
DEVICE TYPE SPEED PACKAGE SMD NO.
128K x 32 SRAM Module 55ns 66 pin HIP (H1) 5962-93187 05H4X
128K x 32 SRAM Module 45ns 66 pin HIP (H1) 5962-93187 06H4X
128K x 32 SRAM Module 35ns 66 pin HIP (H1) 5962-93187 07H4X
128K x 32 SRAM Module 25ns 66 pin HIP (H1) 5962-93187 08H4X
128K x 32 SRAM Module 20ns 66 pin HIP (H1) 5962-93187 09H4X
128K x 32 SRAM Module 17ns 66 pin HIP (H1) 5962-93187 10H4X
128K x 32 SRAM Module 15ns 66 pin HIP (H1) 5962-93187 11H4X
128K x 32 SRAM Module 55ns 68 lead CQFP Low Profi le (G4T)15962-95595 05HYX1
128K x 32 SRAM Module 45ns 68 lead CQFP Low Profi le (G4T)15962-95595 06HYX1
128K x 32 SRAM Module 35ns 68 lead CQFP Low Profi le (G4T)15962-95595 07HYX1
128K x 32 SRAM Module 25ns 68 lead CQFP Low Profi le (G4T)15962-95595 08HYX1
128K x 32 SRAM Module 20ns 68 lead CQFP Low Profi le (G4T)15962-95595 09HYX1
128K x 32 SRAM Module 17ns 68 lead CQFP Low Profi le (G4T)15962-95595 10HYX1
128K x 32 SRAM Module 15ns 68 lead CQFP Low Profi le (G4T)15962-95595 11HYX1
128K x 32 SRAM Module 55ns 68 lead CQFP/J (G2U) 5962-95595 05HMX
128K x 32 SRAM Module 45ns 68 lead CQFP/J (G2U) 5962-95595 06HMX
128K x 32 SRAM Module 35ns 68 lead CQFP/J (G2U) 5962-95595 07HMX
128K x 32 SRAM Module 25ns 68 lead CQFP/J (G2U) 5962-95595 08HMX
128K x 32 SRAM Module 20ns 68 lead CQFP/J (G2U) 5962-95595 09HMX
128K x 32 SRAM Module 17ns 68 lead CQFP/J (G2U) 5962-95595 10HMX
128K x 32 SRAM Module 15ns 68 lead CQFP/J (G2U) 5962-95595 11HMX
128K x 32 SRAM Module 55ns 68 lead CQFP/J (G2L) 5962-95595 05HAX
128K x 32 SRAM Module 45ns 68 lead CQFP/J(G2L) 5962-95595 06HAX
128K x 32 SRAM Module 35ns 68 lead CQFP/J(G2L) 5962-95595 07HAX
128K x 32 SRAM Module 25ns 68 lead CQFP/J(G2L) 5962-95595 08HAX
128K x 32 SRAM Module 20ns 68 lead CQFP/J(G2L) 5962-95595 09HAX
128K x 32 SRAM Module 17ns 68 lead CQFP/J(G2L) 5962-95595 10HAX
128K x 32 SRAM Module 15ns 68 lead CQFP/J(G2L) 5962-95595 11HAX
Note 1: Package Not Recommended For New Design
