−40
1.001
1
0.999
0.998
−15 10 35
TA− Free-Air Temperature − C°
0.997
0.996
0.995
60 85
Normalized Input Threshold Voltage −V IT(T
A), VIT(25 C)°
3.3 V
VDD 100 nF VDD
RESET RESET
TPS3823-33-Q1 MSP430C325
MR WDI
I/O
GND GND
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
TPS382x-xx-Q1 Voltage Monitor With Watchdog Timer
1 Features 3 Description
The TPS382x-xx-Q1 family of supervisors provide
1• Qualified for Automotive Applications circuit initialization and timing supervision, primarily
• AEC-Q100 Qualified With the Following Results: for DSP and processor-based systems. During power
– Device Temperature Grade 1: –40°C to 125°C on, RESET asserts when the supply voltage VDD
becomes greater than 1.1 V. Thereafter, the supply
– Device HBM ESD Classification Level 2 voltage supervisor monitors VDD and keeps RESET
– Device CDM ESD Classification Level C4B active low as long as VDD remains below the
• ESD Protection Exceeds 2000 V Per MIL-STD- threshold voltage, VIT−. An internal timer delays the
883, Method 3015; Using Human Body Model return of the output to the inactive state (high) to
(C = 100 pF, R = 1500 Ω)ensure proper system reset. The delay time, td, starts
after VDD has risen above the threshold voltage VIT−.
• Power-On Reset Generator With Fixed Delay When the supply voltage drops below the threshold
Time of 200 ms (TPS3823/4/5/8-xx-Q1) or 25 ms voltage VIT−, the output becomes active (low) again.
(TPS3820-xx-Q1) No external components are required. All the devices
• Manual Reset Input (TPS3820/3/5/8-xx-Q1) of this family have a fixed-sense threshold voltage,
VIT–, set by an internal voltage divider. The TPS382x-
• Reset Output Available in Active-Low xx-Q1 family also offers watchdog time out options of
(TPS3820/3/4/5-xx-Q1), Active-High (TPS3824/5- 200 ms (TPS3820-xx-Q1) and 1.6 s (TPS3823/4/8-
xx-Q1), and Open Drain (TPS3828-xx-Q1) xx-Q1).
• Supply Voltage Supervision Range:
2.5 V, 3 V, 3.3 V, 5 V Device Information(1)
• Watchdog Timer (TPS3820/3/4/8-xx-Q1) PART NUMBER PACKAGE BODY SIZE (NOM)
• Supply Current of 15 μA (Typical) TPS382x-xx-Q1 SOT-23 (5) 2.90 mm × 1.60 mm
• 5-Pin SOT-23 Package (1) For all available packages, see the orderable addendum at
the end of the datasheet.
• Temperature Range: −40°C to 125°C
2 Applications
• Automotive DSPs, Microcontrollers, or
Microprocessors
• Industrial Equipment
• Programmable Controls
• Automotive Systems
• Portable and Battery-Powered Equipment
• Intelligent Instruments
• Wireless Communications Systems
Typical Application Schematic Normalized Input Threshold Voltage vs
Free-Air Temperature
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
Table of Contents
8.3 Feature Description................................................... 9
1 Features.................................................................. 18.4 Device Functional Modes........................................ 10
2 Applications ........................................................... 19 Application and Implementation ........................ 11
3 Description............................................................. 19.1 Application Information............................................ 11
4 Revision History..................................................... 29.2 Typical Applications ................................................ 11
5 Device Comparison Table..................................... 310 Power Supply Recommendations ..................... 12
6 Pin Configuration and Functions......................... 311 Layout................................................................... 13
7 Specifications......................................................... 411.1 Layout Guidelines ................................................. 13
7.1 Absolute Maximum Ratings ...................................... 411.2 Layout Example .................................................... 13
7.2 ESD Ratings.............................................................. 412 Device and Documentation Support................. 14
7.3 Recommended Operating Conditions....................... 412.1 Device Support...................................................... 14
7.4 Thermal Information.................................................. 412.2 Documentation Support ........................................ 14
7.5 Electrical Characteristics........................................... 512.3 Community Resources.......................................... 14
7.6 Timing Requirements................................................ 612.4 Trademarks........................................................... 14
7.7 Switching Characteristics.......................................... 612.5 Electrostatic Discharge Caution............................ 15
7.8 Typical Characteristics.............................................. 712.6 Glossary................................................................ 15
8 Detailed Description.............................................. 913 Mechanical, Packaging, and Orderable
8.1 Overview................................................................... 9Information........................................................... 15
8.2 Functional Block Diagram......................................... 9
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (June 2008) to Revision C Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Added AEC-Q100 Qualified information and Temperature Range to Features .................................................................... 1
• Added -Q1 to all applicable part numbers ............................................................................................................................. 1
• Added FIXED DELAY TIME column to table ........................................................................................................................ 3
2Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
2
GND
34
RESET MR
15
RESET VDD
2
GND
34
MR WDI
15
RESET VDD
2
GND
34
RESET WDI
15
RESET VDD
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
5 Device Comparison Table
FIXED DELAY
DEVICE RESET RESET WDI MR TIME
TPS3820-xx-Q1 Push-pull X X 25 ms
TPS3823-xx-Q1 Push-pull X X 200 ms
TPS3824-xx-Q1 Push-pull X 200 ms
TPS3825-xx-Q1 Push-pull Push-pull X 200 ms
TPS3828-xx-Q1 Open-drain X X 200 ms
6 Pin Configuration and Functions
TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3828-xx-Q1: DBV TPS3824-xx-Q1: DBV PACKAGE
PACKAGE 5-Pin SOT-23
5-Pin SOT-23 Top View
Top View
TPS3825-xx-Q1: DBV PACKAGE
5-Pin SOT-23
Top View
Pin Functions
PIN
TPS3820‑‑xx‑‑Q1, I/O DESCRIPTION
NAME TPS3823‑‑xx‑‑Q1, TPS3824‑‑xx‑‑Q1 TPS3825‑‑xx‑‑Q1
TPS3828‑‑xx‑‑Q1
GND 2 2 2 — Ground connection
Manual-reset input. Pull low to force a reset. RESET
remains low as long as MR is low and for the time-out
MR 3 — 4 I period after MR goes high. Leave unconnected or
connect to VDD when unused.
Active-high reset output. Either push-pull or open-drain
RESET — 3 3 O output stage.
Active-low reset output. Either push-pull or open-drain
RESET 1 1 1 O output stage.
Supply voltage. Powers the device and monitors its own
VDD 5 5 5 I voltage.
Watchdog timer input. If WDI remains high or low longer
than the time-out period, then reset is triggered. The
timer clears when reset is asserted or when WDI sees a
WDI 4 4 — I rising edge or a falling edge. If unused, the WDI
connection must be high impedance to prevent it from
causing a reset event.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VDD –0.3 6
Voltage V
RESET, RESET, MR, WDI –0.3 (VDD + 0.3)
Maximum low output, IOL –5 5
Current Maximum high output, IOH –5 5 mA
Output range (VO< 0 or VO> VDD), IOK –10 10
Continuous total power dissipation See Thermal Information
Operating free-air, TA–40 125
Temperature °C
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
7.2 ESD Ratings VALUE UNIT
Human-body model (HBM), per AEC Q100-002(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per AEC Q100-011 ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted). MIN NOM MAX UNIT
VDD Supply voltage 1.1 5.5 V
VI Input voltage 0 VDD + 0.3 V
VIH High-level input voltage at MR and WDI 0.7 × VDD V
VIL Low-level input voltage 0.3 × VDD V
Δt/ΔV Input transition rise and fall rate at MR or WDI 100 ns/V
TAOperating free-air temperature range –40 125 °C
7.4 Thermal Information TPS382x-xx-Q1
THERMAL METRIC(1) DBV (SOT-23) UNIT
5 PINS
RθJA Junction-to-ambient thermal resistance 209.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 72.8 °C/W
RθJB Junction-to-board thermal resistance 36.7 °C/W
ψJT Junction-to-top characterization parameter 2.1 °C/W
ψJB Junction-to-board characterization parameter 35.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
7.5 Electrical Characteristics
over operating junction temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS382x-25-Q1 VDD = VIT−+ 0.2 V, IOH = –20 μA0.8 × VDD
TPS382x-30-Q1
RESET VDD = VIT−+ 0.2 V, IOH = –30 μA
TPS382x-33-Q1
TPS382x-50-Q1 VDD = VIT−+ 0.2 V IOH = –120 μA VDD −1.5 V
TPS3824-25-Q1 VDD ≥1.8 V, IOH = –100 μA
TPS3825-25-Q1
High-level output
VOH V
voltage TPS3824-30-Q1
TPS3825-30-Q1
RESET 0.8 × VDD
TPS3824-33-Q1 VDD ≥1.8 V, IOH = –150 μA
TPS3825-33-Q1
TPS3824-50-Q1
TPS3825-50-Q1
TPS3824-25-Q1 VDD = VIT−+ 0.2 V, IOL = 1 mA
TPS3825-25-Q1
TPS3824-30-Q1
TPS3825-30-Q1
RESET VDD = VIT−+ 0.2 V, IOL = 1.2 mA 0.4
TPS3824-33-Q1
TPS3825-33-Q1
Low-level output
VOL V
TPS3824-50-Q1
voltage VDD = VIT−+ 0.2 V, IOL = 3 mA
TPS3825-50-Q1
TPS382x-25-Q1 VDD = VIT−– 0.2 V, IOL = 1 mA
TPS382x-30-Q1
RESET VDD = VIT−– 0.2 V, IOL = 1.2 mA 0.45
TPS382x-33-Q1
TPS382x-50-Q1 VDD = VIT−– 0.2 V, IOL = 3 mA
Power-up reset voltage(1) VDD ≥1.1 V, IOL = 20 μA 0.4 V
TPS382x-25-Q1 2.21 2.25 2.3
TPS382x-30-Q1 2.59 2.63 2.69
TA= 0°C to 85°C
TPS382x-33-Q1 2.88 2.93 3
TPS382x-50-Q1 4.49 4.55 4.64
Negative-going input
VIT−V
threshold voltage (2) TPS382x-25-Q1 2.19 2.25 2.3
TPS382x-30-Q1 2.55 2.63 2.69
TA= –40°C to 125°C
TPS382x-33-Q1 2.84 2.93 3
TPS382x-50-Q1 4.44 4.55 4.64
TPS382x-25-Q1
TPS382x-30-Q1 30
Vhys Hysteresis at VDD input mV
TPS382x-33-Q1
TPS382x-50-Q1 50
IIH(AV) Average high-level input current WDI = VDD, time average (DC = 88%) 120
WDI µA
IIL(AV) Average low-level input current WDI = 0.3 V, VDD = 5.5 V time average (DC = 12%) –15
WDI WDI = VDD 140 190
IIH High-level input current µA
MR MR = VDD × 0.7, VDD = 5.5 V –40 –60
WDI WDI = 0.3 V, VDD = 5.5 V 140 190
IIL Low-level input current µA
MR MR = 0.3 V, VDD = 5.5 V –110 –160
TPS382x-25-Q1
TPS382x-30-Q1 –400
Output short-circuit
IOS RESET VDD = VIT, max + 0.2 V, VO= 0 V µA
current(3) TPS382x-33-Q1
TPS382x-50-Q1 –800
IDD Supply current WDI, MR, and outputs unconnected 15 25 µA
Internal pullup resistor at MR 52 kΩ
CiInput capacitance at MR, WDI VI= 0 V to 5.5 V 5 pF
(1) The lowest supply voltage at which RESET becomes active. tr, VDD ≥15 μs/V.
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed near the supply terminals.
(3) The RESET short-circuit current is the maximum pullup current when RESET is driven low by a microprocessor bidirectional reset pin.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
7.6 Timing Requirements
At RL= 1 MΩ, CL= 50 pF, and TJ= 25°C, unless otherwise noted. MIN TYP MAX UNIT
at VDD VDD = VIT−+ 0.2 V, VDD = VIT– – 0.2 V 6 μs
twPulse width at MR VDD ≥VIT−+ 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD 1μs
at WDI VDD ≥VIT−+ 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD 100 ns
7.7 Switching Characteristics
At RL= 1 MΩ, CL= 50 pF, and TA= 25°C, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS3820-xx-Q1 112 200 300 ms
VDD ≥VIT−+ 0.2 V
ttout Watchdog time out See Figure 1
TPS3823/4/8-xx-Q1 0.9 1.6 2.5 s
TPS3820-xx-Q1 15 25 37
VDD ≥VIT−+ 0.2 V
tdDelay time ms
See Figure 1
TPS3823/4/5/8-xx-Q1 120 200 300
VDD ≥VIT−+ 0.2 V,
MR to RESET delay VIL = 0.3 × VDD, 0.1
(TPS3820/3/5/8-xx-Q1)
Propagation (delay) time, VIH = 0.7 × VDD
tPHL µs
high-to-low-level output VIL = VIT– – 0.2 V,
VDD to RESET delay 25
VIH = VIT– + 0.2 V
VDD ≥VIT−+ 0.2 V,
MR to RESET delay VIL = 0.3 × VDD, 0.1
(TPS3824/5-xx-Q1)
Propagation (delay) time, VIH = 0.7 × VDD
tPLH µs
low-to-high-level output VIL = VIT– – 0.2 V,
VDD to RESET delay 25
(TPS3824/5-xx-Q1) VIH = VIT– + 0.2 V
Figure 1. Delay and Time Out Timing Diagram
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Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
0 −50
IOH − High-Level Output Current − Aµ
VDD = 3.2 V
WDI = Open
MR = Open
VOH − High-Level Output Voltage − V
−40 C°
85 C°
−100 −150 −200 −250
3
2.5
2
1.5
1
0.5
0
3.5
0
IOH − High-Level Output Current − Aµ
VDD = 5.5 V
WDI = Open
MR = Open
VOH − High-Level Output Voltage − V
−40 C°
85 C°
−100 −200 −300 −400
6
5
4
3
2
1
0
−500 −600 −700
−50
−150
V −
IInput Voltage at MR − V
−200
50
0
85 C°
−100
−40 C°
− Input Current −
IIAµ
VDD = 5.5 V
WDI = Open
−1 0 1 2 3 4 65
0
3
2.5
2
1.5
1
IOL − Low-Level Output Current − mA
1
0.5
0
VDD = 2.66 V
WDI = Open
MR = Open
VOL− Low-Level Output Voltage − V
−40 C°
85 C°
2 3 4 5 6 7 8 9 10
−40
1.001
1
0.999
0.998
−15 10 35
TA− Free-Air Temperature − C°
0.997
0.996
0.995
60 85
Normalized Input Threshold Voltage −V IT(T
A), VIT(25 C)°
19 MR = Open
17 WDI = Open
TA = 25°C
15
13
11
9
7
5
3
1
í1
í0.5
0.5 1.5 2.5 3.5
4.5
5.5
6.5
TPS382x-33-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
7.8 Typical Characteristics
Figure 3. Supply Current vs Supply Voltage
Figure 2. Normalized Input Threshold Voltage vs Free-Air
Temperature at VDD
Figure 4. Input Current vs Input Voltage at MR Figure 5. Low-Level Output Voltage vs Low-Level Output
Current
Figure 6. High-Level Output Voltage vs High-Level Output Figure 7. High-Level Output Voltage vs High-Level Output
Current Current
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
0
6
200 400 600 800
4
2
0
− Minimum Pulse Duration at V
1000
8
twsµ
VDD − Threshold Overdrive − mV
10
WDI = Open
MR = Open
DD−
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
Typical Characteristics (continued)
Figure 8. Minimum Pulse Duration at VDD vs VDD Threshold Overdrive
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50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
_
+
RESET(1)
RESET
MR(2)
WDI(3)
Auto-Reset
Oscillator
Transition
Detector
Watchdog
Timer Logic
RESET
Logic
VREF
VDD
52 kW
40 kW
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
8 Detailed Description
8.1 Overview
The TPS382x-xx-Q1 family of supervisors provide circuit initialization and timing supervision. Optional
configurations include devices with active-high and active-low output signals (TPS3824/5-xx-Q1), devices with a
watchdog timer (TPS3820/3/4/8-xx-Q1), and devices with manual reset (MR) pins (TPS3820/3/5/8-xx-Q1).
RESET asserts when the supply voltage, VDD, rises above 1.1 V. For devices with active-low output logic, the
device monitors VDD and keeps RESET low as long as VDD remains below the negative threshold voltage, VIT−.
For devices with active-high output logic, RESET remains high as long as VDD remains below VIT−. An internal
timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td,
starts after VDD rises above the positive threshold voltage (VIT−+ VHYS). When the supply voltage drops below
VIT−, the output becomes active (low) again. All the devices of this family have a fixed-sense threshold voltage,
VIT–, set by an internal voltage divider, so no external components are required.
The TPS382x-xx-Q1 family is designed to monitor supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The devices are
available in a 5-pin SOT-23 package and are characterized for operation over a temperature range of −40°C to
125°C, and are qualified in accordance with AEC-Q100 stress test qualification for integrated circuits.
8.2 Functional Block Diagram
(1) TPS3824/5-xx-Q1
(2) TPS3820/3/5/8-xx-Q1
(3) TPS3820/3/4/8-xx-Q1
8.3 Feature Description
8.3.1 Manual Reset (MR)
The MR input allows an external logic signal from processors, logic circuits, and/or discrete sensors to force a
reset signal regardless of VDD with respect to VIT– or the state of the watchdog timer. A low level at MR causes
the reset signals to become active.
8.3.2 Active High or Active Low Output
All TPS382x-xx-Q1 devices have an active-low logic output (RESET), while the TPS3824/5-xx-Q1 devices also
include an active-high logic output (RESET).
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
Feature Description (continued)
8.3.3 Push-Pull or Open-Drain Output
All TPS382x-xx-Q1 devices, except for TPS3828-xx-Q1, have push-pull outputs. TPS3828-xx-Q1 devices have
an open-drain output.
8.3.4 Watchdog Timer (WDI)
TPS3820/3/4/8-xx-Q1 devices have a watchdog timer that must be periodically triggered by either a positive or
negative transition at WDI to avoid a reset signal being issued. When the supervising system fails to retrigger the
watchdog circuit within the time-out interval, ttout, RESET becomes active for the time period td. This event also
reinitializes the watchdog timer.
The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it
is in a high-impedance state the TPS3820/3/4/8-xx-Q1 will generate its own WDI pulse to ensure that RESET
does not assert. If this behavior is not desired place a 1-kΩresistor from WDI to ground. This resistor will help
ensure that the TPS3820/3/4/8-xx-Q1 detects that WDI is not in a high-impedance state.
In applications where the input to the WDI pin is active (transitioning high and low) when the TPS3820/3/4/8-xx-
Q1 is asserting RESET, RESET will be stuck at a logic low after the input voltage returns above VIT–. If the
application requires that input to WDI be active when the reset signal is asserted, then use a FET to decouple
the WDI signal. An external FET decouples the WDI signal by disconnecting the WDI input when RESET is
asserted. For more details on this, see Decoupling WDI During Reset Event for more details.
8.4 Device Functional Modes
The device functions according to the inputs and outputs in Table 1.
Table 1. Function Table
INPUTS OUTPUTS
MR (1) VDD > VIT RESET RESET(2)
L 0 L H
L 1 L H
H 0 L H
H 1 H L
(1) TPS3820/3/5/8-xx-Q1
(2) TPS3824/5-xx-Q1
10 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
3.3 V
VDD 100 nF VDD
RESET RESET
TPS3823-33-Q1 MSP430C325
MR WDI
I/O
GND GND
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS382x-xx-Q1 family of devices are very small supervisory circuits that monitor fixed supply voltages of
2.5 V, 3 V, 3.3 V, and 5 V. The TPS382x-xx-Q1 family operates from 1.1 V to 5.5 V. Orderable options include
versions with either push-pull or open-drain outputs, versions that use active-high or active-low logic for output
signals, versions with a manual reset pin, and versions with a watchdog timer. See the Device Comparison Table
for an overview of device options.
9.2 Typical Applications
9.2.1 Supply Rail Monitoring with Watchdog Time-out and 200-ms Delay
The TPS3823-xx-Q1 can be used to monitor the supply rail for devices such as microcontrollers. The
downstream device is enabled by the TPS3823-xx-Q1 once the voltage on the supply pin (VDD) is above the
internal threshold voltage (VIT– + VHYS). The downstream device is disabled by the TPS3823-xx-Q1 when VDD
falls below the threshold voltage minus the hysteresis voltage (VIT–). The TPS3823-xx-Q1 also issues a reset
signal if the WDI input is not periodically triggered by a positive or negative transition at WDI. When the
supervising system fails to retrigger the watchdog circuit within the time-out interval, ttout, RESET becomes active
for the time period td.
Some applications require a shorter reset signal than the 200 ms that most of the TPS382x-xx-Q1 family provide.
In these cases, the TPS3820-xx-Q1is a good choice because it has a delay time of only 25 ms. If an open-drain
output is needed, replace the TPS3823-xx-Q1 with the TPS3828-xx-Q1 (if the WDI input must be active while
RESET is low, see Decoupling WDI During Reset Event). Figure 9 shows the TPS3823-33-Q1 in a typical
application.
Figure 9. Supply Rail Monitoring With Watchdog Time-out
9.2.1.1 Design Requirements
The TPS3823-33-Q1 must drive the enable pin of a MSP430C325 using a logic-high signal to signify that the
supply voltage is above the minimum operating voltage of the device and monitor the I/O pin to determine if the
microcontroller is operating correctly.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
3.3 V
VDD VDD
RESET
TPS3820-33-Q1
Microprocessor
MR WDI I/O
GND GND
RESET
0
6
200 400 600 800
4
2
0
− Minimum Pulse Duration at V
1000
8
twsµ
VDD − Threshold Overdrive − mV
10
WDI = Open
MR = Open
DD−
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
Typical Applications (continued)
9.2.1.2 Detailed Design Procedure
Determine which version of the TPS382x-xx-Q1 family best suits the functional performance required.
If the input supply is noisy, include an input capacitor to help avoid unwanted changes to the reset signal.
9.2.1.3 Application Curve
Figure 10. Minimum Pulse Duration at VDD vs VDD Threshold Overdrive
9.2.2 Decoupling WDI During Reset Event
If the application requires that the input to WDI is active when the reset signal is asserted, Figure 11 shows how
to decouple WDI from the active signal using an N-channel FET. The N-channel FET is placed in series with the
WDI pin, with the gate of the FET connected to the RESET output.
Figure 11. WDI Example
10 Power Supply Recommendations
These devices are designed to operate from an input supply with a voltage range from 1.1 V to 5.5 V. Though
not required, it is good analog design practice to place a 0.1-μF ceramic capacitor close to the VDD pin if the
input supply is noisy.
12 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
WDI
Signal
Pullup
Voltage
1
2
34
MR
Signal
CVDD
TPS3828-xx-Q1
RESET
Flag
5
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
11 Layout
11.1 Layout Guidelines
Follow these guidelines to lay out the printed-circuit-board (PCB) that is used for the TPS382x-xx-Q1 family of
devices.
• Place the VDD decoupling capacitor (CVDD) close to the device.
• Avoid using long traces for the VDD supply node. The VDD capacitor (CVDD), along with parasitic inductance
from the supply to the capacitor, can form an LC tank and create ringing with peak voltages above the
maximum VDD voltage.
11.2 Layout Example
Figure 12. Example Layout (DBV Package)
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
www.ti.com
12 Device and Documentation Support
12.1 Device Support
12.1.1 Development Support
12.1.1.1 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS382xx-Q1 is available through the product folders under
Tools & Software.
12.2 Documentation Support
12.2.1 Related Documentation
•Disabling the Watchdog Timer for TI's Family of Supervisors,SLVA145
12.2.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
TPS3820-33-Q1 Click here Click here Click here Click here Click here
TPS3820-50-Q1 Click here Click here Click here Click here Click here
TPS3823-25-Q1 Click here Click here Click here Click here Click here
TPS3823-30-Q1 Click here Click here Click here Click here Click here
TPS3823-33-Q1 Click here Click here Click here Click here Click here
TPS3823-50-Q1 Click here Click here Click here Click here Click here
TPS3824-30-Q1 Click here Click here Click here Click here Click here
TPS3824-33-Q1 Click here Click here Click here Click here Click here
TPS3824-50-Q1 Click here Click here Click here Click here Click here
TPS3825-33-Q1 Click here Click here Click here Click here Click here
TPS3825-50-Q1 Click here Click here Click here Click here Click here
TPS3828-33-Q1 Click here Click here Click here Click here Click here
TPS3828-50-Q1 Click here Click here Click here Click here Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
14 Submit Documentation Feedback Copyright © 2002–2015, Texas Instruments Incorporated
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
TPS3820-33-Q1
,
TPS3820-50-Q1
,
TPS3823-25-Q1
TPS3823-30-Q1
,
TPS3823-33-Q1
,
TPS3823-50-Q1
,
TPS3824-30-Q1
,
TPS3824-33-Q1
TPS3824-50-Q1
,
TPS3825-33-Q1
,
TPS3825-50-Q1
,
TPS3828-33-Q1
,
TPS3828-50-Q1
www.ti.com
SGLS143C –DECEMBER 2002–REVISED DECEMBER 2015
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2002–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TPS3820-33-Q1 TPS3820-50-Q1 TPS3823-25-Q1 TPS3823-30-Q1 TPS3823-33-Q1 TPS3823-
50-Q1 TPS3824-30-Q1 TPS3824-33-Q1 TPS3824-50-Q1 TPS3825-33-Q1 TPS3825-50-Q1 TPS3828-33-Q1
TPS3828-50-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 4-Mar-2016
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
2T25-50QFRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDFQ
2T28-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDIQ
2U3820-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDDQ
2U3823-25QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAPQ
2U3823-30QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAQQ
2U3823-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PARQ
2U3823-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PASQ
2U3824-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAVQ
2U3824-50QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAWQ
2U3825-33QDBVRG4Q1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDGQ
TPS3820-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDEQ
TPS3820-50DBVRQ1G4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PKG4
TPS3820-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDDQ
TPS3823-25QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAPQ
TPS3823-30QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAQQ
TPS3823-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PARQ
TPS3823-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PASQ
PACKAGE OPTION ADDENDUM
www.ti.com 4-Mar-2016
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS3824-25QDBVRQ1 OBSOLETE SOT-23 DBV 5 TBD Call TI Call TI -40 to 125
TPS3824-30QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAUQ
TPS3824-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAVQ
TPS3824-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PAWQ
TPS3825-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDGQ
TPS3825-50QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDFQ
TPS3828-33QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDIQ
TPS3828-50QDBVRG4Q ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 PDHQ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Mar-2016
Addendum-Page 3
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS3820-33-Q1, TPS3820-50-Q1, TPS3823-25-Q1, TPS3823-30-Q1, TPS3823-33-Q1, TPS3823-50-Q1, TPS3824-25-Q1, TPS3824-30-Q1,
TPS3824-33-Q1, TPS3824-50-Q1, TPS3825-33-Q1, TPS3825-50-Q1, TPS3828-33-Q1, TPS3828-50-Q1 :
•Catalog: TPS3820-33, TPS3820-50, TPS3823-25, TPS3823-30, TPS3823-33, TPS3823-50, TPS3824-25, TPS3824-30, TPS3824-33, TPS3824-50, TPS3825-33, TPS3825-50,
TPS3828-33, TPS3828-50
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
2T25-50QFRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2T28-33QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3820-50QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3823-25QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3823-30QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3823-33QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3823-50QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3824-33QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3824-50QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
2U3825-33QDBVRG4Q1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3820-33QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3820-50DBVRQ1G4 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3820-50QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3823-25QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3823-30QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3823-33QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3823-50QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3824-30QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Oct-2015
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS3824-33QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3824-50QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3825-33QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3825-50QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3828-33QDBVRQ1 SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
TPS3828-50QDBVRG4Q SOT-23 DBV 5 3000 180.0 9.0 3.15 3.2 1.4 4.0 8.0 Q3
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
2T25-50QFRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2T28-33QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3820-50QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3823-25QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3823-30QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3823-33QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3823-50QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3824-33QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3824-50QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
2U3825-33QDBVRG4Q1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3820-33QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Oct-2015
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS3820-50DBVRQ1G4 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3820-50QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3823-25QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3823-30QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3823-33QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3823-50QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3824-30QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3824-33QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3824-50QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3825-33QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3825-50QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3828-33QDBVRQ1 SOT-23 DBV 5 3000 182.0 182.0 20.0
TPS3828-50QDBVRG4Q SOT-23 DBV 5 3000 182.0 182.0 20.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Oct-2015
Pack Materials-Page 3
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TPS3828-33QDBVRQ1 2T28-33QDBVRG4Q1