2003-2013 Microchip Technology Inc. DS30491D-page 479
PIC18F6585/8585/6680/8680
Master Mode.....................................................213
Reception..................................................219
Repeated Start Condition
Timing...............................................218
Transmission ............................................219
Master Mode Start Condition............................217
Module Op era tion . ...... ..... ..... ..... ...... ..... ..... ...... .2 02
Multi-Master Communication,
Bus Collisio n and
Arbitration .................................................223
Multi-Master Mode ............................................223
Registers...........................................................198
Slave Mode.......................................................202
Slave Mode, Addressing...................................202
Slave Mode, Reception.....................................203
Slave Mode, Transmission ...............................203
Sleep Operation................................................223
Stop Condition Timing ......................................222
I2C Mode. See I2C.
Overview...................................................................189
SPI Mode ............ ..... ..... ...... ..... ..... ..... ...... ..... ..... ...... .1 89
Associated Registers........................................197
Bus Mode Com pa tibil ity... ..... ..... ...... ..... ..... ...... .1 97
Effects of a Reset .............................................197
Enabling SPI I/O ...............................................193
Master Mode.....................................................194
Operation..........................................................192
Slave Mode.......................................................195
Slave Select
Synchronization ........................................195
Sleep Operation................................................197
SPI Clock.... ..... ..... ...... ..... ..... ..... ...... ..... ..... ...... .1 94
Typical Con ne ctio n ..... ..... ..... ..... ...... ..... ..... ...... .1 93
SPI Mode. See SPI.
SSPBUF Register .....................................................194
SSPSR Register .......................................................194
MSSP Module
SPI Master /Sla ve Con ne ctio n.. ..... ..... ...... ..... ..... ...... .1 93
MULLW.............................................................................392
MULWF.............................................................................392
N
NEGF................................................................................393
NOP ..................................................................................393
Normal Ope rat ion Mo de... ..... ...... ..... ..... ..... ...... ..... ..... ...... .3 28
O
Opcode Field Descriptions................................................366
OPTION_REG Register
PSA Bit......................................................................157
T0CS Bit....................................................................157
T0PS2:T0PS0 Bits....................................................157
T0SE Bit....................................................................157
Oscillator Configuration.......................................................23
EC...............................................................................23
ECIO ...........................................................................23
ECIO+PLL...................................................................23
ECIO+SPLL ................................................................ 23
HS...............................................................................23
HS+PLL ......................................................................23
HS+SPLL....................................................................23
LP................................................................................23
RC...............................................................................23
RCIO...........................................................................23
XT ............................................................................... 23
Oscillator Selection........................................................... 345
Oscillator Start-up Timer (OST).................................. 34, 345
Oscillator Switching Feature
System Clock Swi tch Bit.................. ..... ...... ..... ..... ..... . 27
Oscillator, Timer1.............................................. 159, 161, 166
Oscillator, Timer3.............................................................. 164
Oscillator, WDT................................................................. 355
P
Packaging......................................................................... 465
Details....................................................................... 466
Marking..................................................................... 465
Parallel Slave Port (PSP).......................................... 133, 152
Associated Registers................................................ 154
RE0/RD/AD8 Pin...................................................... 152
RE1/WR/AD9 Pin .. ..... ..... ..... ...... ..... ..... ...... ..... ..... .... 152
RE2/CS/AD10 Pin .................................................... 152
Select (PSPMODE Bit)..................................... 133, 152
Parallel Slave Port Requirements
(PIC18FXX8X).......................................................... 436
Phase Locked Loop (PLL).................................................. 25
PICkit 1 Flash Starter Kit .................................................. 411
PICSTART Plus Development
Programmer.............................................................. 410
PIE Regist ers. ..... ..... ...... ..... ..... ..... ...... ..... ..... ...... ..... ......... 117
Pin Functions
AVDD........................................................................... 21
AVSS........................................................................... 21
OSC1/CLKI................................................................. 12
OSC2/CLKO/RA6....................................................... 12
RA0/AN0..................................................................... 13
RA1/AN1..................................................................... 13
RA2/AN2/VREF- .......................................................... 13
RA3/AN3/VREF+ ......................................................... 13
RA4/T0CKI ................................................................. 13
RA5/AN4/LVDIN......................................................... 13
RA6............................................................................. 13
RB0/INT0.................................................................... 14
RB1/INT1.................................................................... 14
RB2/INT2.................................................................... 14
RB3/INT3/CCP2 ......................................................... 14
RB4/KBI0.................................................................... 14
RB5/KBI1/PGM........................................................... 14
RB6/KBI2/PGC........................................................... 14
RB7/KBI3/PGD........................................................... 14
RC0/T1OSO/T13CKI.................................................. 15
RC1/T1OSI/CCP2 ...................................................... 15
RC2/CCP1/P1A.......................................................... 15
RC3/SCK/SCL............................................................ 15
RC4/SDI/SDA............................................................. 15
RC5/SDO.................................................................... 15
RC6/TX/CK................................................................. 15
RC7/RX/DT................................................................. 15
RD0/PSP0/AD0 .......................................................... 16
RD1/PSP1/AD1 .......................................................... 16
RD2/PSP2/AD2 .......................................................... 16
RD3/PSP3/AD3 .......................................................... 16
RD4/PSP4/AD4 .......................................................... 16
RD5/PSP5/AD5 .......................................................... 16
RD6/PSP6/AD6 .......................................................... 16
RD7/PSP7/AD7 .......................................................... 16
RE0/RD/AD8 .............................................................. 17
RE1/WR/AD9.............................................................. 17
18F8680.book Page 479 Tues day, January 29, 2013 1:32 PM