MCD10074 Rev. 1.2, 15-Apr-10 Page 7 of 17 www.power-one.com
FNP1500/1800 Front-Ends
& FNR-3 Power Shelf Data Sheet
Output Connector Pinning and Signal Specificatio n
Output Connector
Description Pin
Location Type Low level
High level V max
I max
Overtemperature /
Fan Fail U1 OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
< 0.4 V @ 20 mA
Pull up
15 V
20 mA
AC Fail /
Power down warning U2 OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
< 0.4 V @ 20 mA
Pull up
15 V
20 mA
Power Supply Present U3 Resistor (1 k) connected to logic GND Open
Pull up
10 V
10 mA
DC Fail /
Output voltage fault U4 OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
< 0.4 V @ 20 mA
Pull up
15 V
20 mA
Internal ground U5
Internal ground (Vo1– line before the output filter).
Do not connect the internal grounds in
systems with several units.
ADDR0, I2C address
bus T1 DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR1, I2C address
bus T2 DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR2, I2C address
bus T3 DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR3, I2C address
bus T4 DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR4, I2C address
bus T5 DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
DATA, I2C data line S1 I2C compatible signal
referenced to logic GND 5 V or 3.3 V logic
CLOCK, I2C clock line S2 I2C compatible signal
referenced to logic GND 5 V or 3.3 V logic
Vo2 + output S3 Auxiliary power pin, insulated from main output
Vo2 – output S4 Auxiliary ground pin, insulated from main output
Logic ground S5
Internally connected over 10 to Auxiliary GND. Wire
separately form Auxiliary - and main output GND to
minimize noise on signals and I2C.
Leave open if not used.
Output inhibit R1 PS active when pulled low (DC-DC stage off when left
open) Referenced to logic GND
< 0.8 V
> 2.0 V
10 V
3.5 mA
V sense + R2 Open or connected to Vo1+ at the load
(Internally connected to Vo1+ over 100 )
dU < 3 Vpp
30 mA
V sense - R3 Open or connected to Vo1- at the load
(Internally connected to Vo1- over 100 )
dU < 3 Vpp
30 mA
12V models
Output margin
48V models
R4
Open or connected over resistor to internal ground.
Do not connect the margin pins in
systems with several units.
3 VDC
R4
Open or connected to internal ground
(+8 % Vo1) or V sense+ (-8 % Vo1)
Do not connect the margin pins in
systems with several units.
60 VDC
12V models
Synch. startup
48V models
R5 Open or connected to synch startup circuit,
referenced to Vo1 - at the output connector
12V
3mA
R5 Open or connected to synch startup circuit,
referenced to Vo1 - at the output connector
12V
2mA
Vo1 + output
12V models
P2, P4, P6, P8,
P10, P12 Main output + pins
Vo1 – output
12V models
P1, P3, P5,
P7, P9, P11 Main output – pins
Vo1 + output
48V models P2, P4, P6 Main output + pins
Vo1 – output
48V models P1, P3, P5 Main output – pins