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LM2662/LM2663 Switched Capacitor Voltage Converter
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1FEATURES DESCRIPTION
The LM2662/LM2663 CMOS charge-pump voltage
2 Inverts or Doubles Input Supply Voltage converter inverts a positive voltage in the range of
8-Pin SOIC Package 1.5V to 5.5V to the corresponding negative voltage.
3.5ΩTypical Output Resistance The LM2662/LM2663 uses two low cost capacitors to
provide 200 mA of output current without the cost,
86% Typical Conversion Efficiency at 200 mA size, and EMI related to inductor based converters.
(LM2662) Selectable Oscillator Frequency: 20 With an operating current of only 300 μA and
kHz/150 kHz operating efficiency greater than 90% at most loads,
(LM2663) Low Current Shutdown Mode the LM2662/LM2663 provides ideal performance for
battery powered systems. The LM2662/LM2663 may
also be used as a positive voltage doubler.
APPLICATIONS
Laptop computers The oscillator frequency can be lowered by adding an
external capacitor to the OSC pin. Also, the OSC pin
Cellular phones may be used to drive the LM2662/LM2663 with an
Medical instruments external clock. For LM2662, a frequency control (FC)
Operational amplifier power supplies pin selects the oscillator frequency of 20 kHz or 150
kHz. For LM2663, an external shutdown (SD) pin
Interface power supplies replaces the FC pin. The SD pin can be used to
Handheld instruments disable the device and reduce the quiescent current
to 10 μA. The oscillator frequency for LM2663 is 150
kHz.
Basic Application Circuits
Voltage Inverter Positive Voltage Doubler
Splitting VIN in Half
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Supply Voltage (V+ to GND, or GND to OUT) 6V
LV (OUT 0.3V) to (GND + 3V)
FC, OSC, SD The least negative of (OUT 0.3V)
or (V+ 6V) to (V+ + 0.3V)
V+ and OUT Continuous Output Current 250 mA
Output Short-Circuit Duration to GND(3) 1 sec.
Power Dissipation (TA= 25°C)(4) 735 mW
TJMax(4) 150°C
θJA(4) 170°C/W
Operating Ambient Temperature
Range 40°C to +85°C
Operating Junction Temperature
Range 40°C to +105°C
Storage Temperature Range 65°C to +150°C
Lead Temperature (Soldering, 10 seconds) 300°C
ESD Rating 2 kV
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be
avoided. Also, for temperatures above 85°C, OUT must not be shorted to GND or V+, or device may be damaged.
(4) The maximum allowable power dissipation is calculated by using PDMax = (TJMax TA)/θJA, where TJMax is the maximum junction
temperature, TAis the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package.
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Electrical Characteristics
Limits in standard typeface are for TJ= 25°C, and limits in boldface type apply over the full Operating Junction Temperature
Range. Unless otherwise specified: V+ = 5V, FC = Open, C1= C2= 47 μF.(1)
Symbol Parameter Condition Min Typ Max Units
V+ Supply Voltage RL= 1k Inverter, LV = Open 3.5 5.5
Inverter, LV = GND 1.5 5.5 V
Doubler, LV = OUT 2.5 5.5
IQSupply Current No Load FC = V+ (LM2662) 1.3 4
LV = Open SD = Ground (LM2663) mA
FC = Open 0.3 0.8
ISD Shutdown Supply Current (LM2663) 10 μA
VSD Shutdown Pin Input Voltage (LM2663) Shutdown Mode 2.0 (2) V
Normal Operation 0.3
ILOutput Current 200 mA
ROUT Output Resistance(3) IL= 200 mA 3.5 7Ω
fOSC Oscillator Frequency(4) OSC = Open FC = Open 720 kHz
FC = V+ 55 150
fSW Switching Frequency(5) OSC = Open FC = Open 3.5 10 kHz
FC = V+ 27.5 75
IOSC OSC Input Current FC = Open ±2 μA
FC = V+ ±10
PEFF Power Efficiency RL(500) between V+and OUT 90 96 %
IL= 200 mA to GND 86
VOEFF Voltage Conversion Efficiency No Load 99 99.96 %
(1) In the test circuit, capacitors C1and C2are 47 μF, 0.2Ωmaximum ESR capacitors. Capacitors with higher ESR will increase output
resistance, reduce output voltage and efficiency.
(2) In doubling mode, when Vout > 5V, minimum input high for shutdown equals Vout 3V.
(3) Specified output resistance includes internal switch resistance and capacitor ESR.
(4) For LM2663, the oscillator frequency is 150 kHz.
(5) The output switches operate at one half of the oscillator frequency, fOSC = 2fSW.
Test Circuits
Figure 1. LM2662 and LM2663 Test Circuits
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Typical Performance Characteristics
(Circuit of Figure 1)
Supply Current vs Supply Current vs
Supply Voltage Oscillator Frequency
Figure 2. Figure 3.
Output Source Resistance Output Source Resistance
vs vs
Supply Voltage Temperature
Figure 4. Figure 5.
Output Source Resistance Efficiency
vs vs
Temperature Load Current
Figure 6. Figure 7.
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Typical Performance Characteristics (continued)
(Circuit of Figure 1)Output Voltage Drop Efficiency
vs vs
Load Current Oscillator Frequency
Figure 8. Figure 9.
Output Voltage Oscillator Frequency
vs vs
Oscillator Frequency External Capacitance
Figure 10. Figure 11.
Oscillator Frequency Oscillator Frequency
vs vs
Supply Voltage Supply Voltage
Figure 12. Figure 13.
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Typical Performance Characteristics (continued)
(Circuit of Figure 1)Oscillator Frequency Oscillator Frequency
vs vs
Temperatur Temperature
Figure 14. Figure 15.
Shutdown Supply Current
vs
Temperature (LM2663 Only)
Figure 16.
CONNECTION DIAGRAMS
8-Pin SOIC Package
Figure 17. D Package Top View
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Pin Descriptions
Pin Name Function
Voltage Inverter Voltage Doubler
1 FC Frequency control for internal oscillator: Same as inverter.
(LM2662) FC = open, fOSC = 20 kHz (typ);
FC = V+, fOSC = 150 kHz (typ);
FC has no effect when OSC pin is driven externally.
1 SD Shutdown control pin, tie this pin to the ground in normal Same as inverter.
(LM2663) operation.
2 CAP+ Connect this pin to the positive terminal of charge-pump Same as inverter.
capacitor.
3 GND Power supply ground input. Power supply positive voltage input.
4 CAPConnect this pin to the negative terminal of charge-pump Same as inverter.
capacitor.
5 OUT Negative voltage output. Power supply ground input.
6 LV Low-voltage operation input. Tie LV to GND when input LV must be tied to OUT.
voltage is less than 3.5V. Above 3.5V, LV can be
connected to GND or left open. When driving OSC with
an external clock, LV must be connected to GND.
7 OSC Oscillator control input. OSC is connected to an internal Same as inverter except that OSC cannot be driven by
15 pF capacitor. An external capacitor can be connected an external clock.
to slow the oscillator. Also, an external clock can be used
to drive OSC.
8 V+ Power supply positive voltage input. Positive voltage output.
Circuit Description
The LM2662/LM2663 contains four large CMOS switches which are switched in a sequence to invert the input
supply voltage. Energy transfer and storage are provided by external capacitors. Figure 18 illustrates the voltage
conversion scheme. When S1and S3are closed, C1charges to the supply voltage V+. During this time interval
switches S2and S4are open. In the second time interval, S1and S3are open and S2and S4are closed, C1is
charging C2. After a number of cycles, the voltage across C2will be pumped to V+. Since the anode of C2is
connected to ground, the output at the cathode of C2equals (V+) assuming no load on C2, no loss in the
switches, and no ESR in the capacitors. In reality, the charge transfer efficiency depends on the switching
frequency, the on-resistance of the switches, and the ESR of the capacitors.
Figure 18. Voltage Inverting Principle
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APPLICATION INFORMATION
SIMPLE NEGATIVE VOLTAGE CONVERTER
The main application of LM2662/LM2663 is to generate a negative supply voltage. The voltage inverter circuit
uses only two external capacitors as shown in the Basic Application Circuits. The range of the input supply
voltage is 1.5V to 5.5V. For a supply voltage less than 3.5V, the LV pin must be connected to ground to bypass
the internal regulator circuitry. This gives the best performance in low voltage applications. If the supply voltage is
greater than 3.5V, LV may be connected to ground or left open. The choice of leaving LV open simplifies the
direct substitution of the LM2662/LM2663 for the LMC7660 Switched Capacitor Voltage Converter.
The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor.
The voltage source equals (V+). The output resistance Rout is a function of the ON resistance of the internal
MOS switches, the oscillator frequency, and the capacitance and ESR of C1and C2. Since the switching current
charging and discharging C1is approximately twice as the output current, the effect of the ESR of the pumping
capacitor C1is multiplied by four in the output resistance. The output capacitor C2is charging and discharging at
a current approximately equal to the output current, therefore, its ESR only counts once in the output resistance.
A good approximation is:
(1)
where RSW is the sum of the ON resistance of the internal MOS switches shown in Figure 18.
High value, low ESR capacitors will reduce the output resistance. Instead of increasing the capacitance, the
oscillator frequency can be increased to reduce the 2/(fosc × C1) term. Once this term is trivial compared with RSW
and ESRs, further increasing in oscillator frequency and capacitance will become ineffective.
The peak-to-peak output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR
of the output capacitor C2:
(2)
Again, using a low ESR capacitor will result in lower ripple.
POSITIVE VOLTAGE DOUBLER
The LM2662/LM2663 can operate as a positive voltage doubler (as shown in the Basic Application Circuits). The
doubling function is achieved by reversing some of the connections to the device. The input voltage is applied to
the GND pin with an allowable voltage from 2.5V to 5.5V. The V+ pin is used as the output. The LV pin and OUT
pin must be connected to ground. The OSC pin can not be driven by an external clock in this operation mode.
The unloaded output voltage is twice of the input voltage and is not reduced by the diode D1's forward drop.
The Schottky diode D1is only needed for start-up. The internal oscillator circuit uses the V+ pin and the LV pin
(connected to ground in the voltage doubler circuit) as its power rails. Voltage across V+ and LV must be larger
than 1.5V to insure the operation of the oscillator. During start-up, D1is used to charge up the voltage at V+ pin
to start the oscillator; also, it protects the device from turning-on its own parasitic diode and potentially latching-
up. Therefore, the Schottky diode D1should have enough current carrying capability to charge the output
capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A
Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a
smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size.
SPLIT V+ IN HALF
Another interesting application shown in the Basic Application Circuits is using the LM2662/LM2663 as a
precision voltage divider. Since the off-voltage across each switch equals VIN/2, the input voltage can be raised
to +11V.
CHANGING OSCILLATOR FREQUENCY
For the LM2662, the internal oscillator frequency can be selected using the Frequency Control (FC) pin. When
FC is open, the oscillator frequency is 20 kHz; when FC is connected to V+, the frequency increases to 150 kHz.
A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple, but
increases the typical supply current from 0.3 mA to 1.3 mA.
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The oscillator frequency can be lowered by adding an external capacitor between OSC and GND (See typical
performance characteristics). Also, in the inverter mode, an external clock that swings within 100 mV of V+ and
GND can be used to drive OSC. Any CMOS logic gate is suitable for driving OSC. LV must be grounded when
driving OSC. The maximum external clock frequency is limited to 150 kHz.
The switching frequency of the converter (also called the charge pump frequency) is half of the oscillator
frequency.
NOTE: OSC cannot be driven by an external clock in the voltage-doubling mode.
Table 1. LM2662 Oscillator Frequency Selection
FC OSC Oscillator
Open Open 20 kHz
V+ Open 150 kHz
Open or V+ External Capacitor See Typical Performance Characteristics
N/A External Clock (inverter mode only) External Clock Frequency
Table 2. LM2663 Oscillator Frequency Selection
OSC Oscillator
Open 150 kHz
External Capacitor See Typical Performance Characteristics
External Clock (inverter mode only) External Clock Frequency
SHUTDOWN MODE
For the LM2663, a shutdown (SD) pin is available to disable the device and reduce the quiescent current to 10
μA. Applying a voltage greater than 2V to the SD pin will bring the device into shutdown mode. While in normal
operating mode, the SD pin is connected to ground.
CAPACITOR SELECTION
As discussed in the Simple Negative Voltage Converter section, the output resistance and ripple voltage are
dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load
current times the output resistance, and the power efficiency is
(3)
Where IQ(V+) is the quiescent power loss of the IC device, and IL2ROUT is the conversion loss associated with the
switch on-resistance, the two external capacitors and their ESRs.
Low ESR capacitors (Table 3) are recommended for both capacitors to maximize efficiency, reduce the output
voltage drop and voltage ripple. For convenience, C1and C2are usually chosen to be the same.
The output resistance varies with the oscillator frequency and the capacitors. In Figure 19, the output resistance
vs. oscillator frequency curves are drawn for four difference capacitor values. At very low frequency range,
capacitance plays the most important role in determining the output resistance. Once the frequency is increased
to some point (such as 100 kHz for the 47 μF capacitors), the output resistance is dominated by the ON
resistance of the internal switches and the ESRs of the external capacitors. A low value, smaller size capacitor
usually has a higher ESR compared with a bigger size capacitor of the same type. Ceramic capacitors can be
chosen for their lower ESR. As shown in Figure 19, in higher frequency range, the output resistance using the 10
μF ceramic capacitors is close to these using higher value tantalum capacitors.
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Figure 19. Output Source Resistance vs Oscillator Frequency
Table 3. Low ESR Capacitor Manufacturers
Manufacturer Phone Capacitor Type
Nichicon Corp. (708)-843-7500 PL, PF series, through-hole aluminum electrolytic
AVX Corp. (803)-448-9411 TPS series, surface-mount tantalum
Sprague (207)-324-4140 593D, 594D, 595D series, surface-mount tantalum
Sanyo (619)-661-6835 OS-CON series, through-hole aluminum electrolytic
Murata (800)-831-9172 Ceramic chip capacitors
Taiyo Yuden (800)-348-2496 Ceramic chip capacitors
Tokin (408)-432-8020 Ceramic chip capacitors
Other Applications
PARALLELING DEVICES
Any number of LM2662s (or LM2663s) can be paralleled to reduce the output resistance. Each device must have
its own pumping capacitor C1, while only one output capacitor Cout is needed as shown in Figure 20. The
composite output resistance is:
(4)
Figure 20. Lowering Output Resistance by Paralleling Devices
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CASCADING DEVICES
Cascading the LM2662s (or LM2663s) is an easy way to produce a greater negative voltage (as shown in
Figure 21). If n is the integer representing the number of devices cascaded, the unloaded output voltage Vout is
(nVin). The effective output resistance is equal to the weighted sum of each individual device:
(5)
A three-stage cascade circuit shown in Figure 22 generates 3Vin, from Vin.
Cascading is also possible when devices are operating in doubling mode. In Figure 23, two devices are
cascaded to generate 3Vin.
An example of using the circuit in Figure 22 or Figure 23 is generating +15V or 15V from a +5V input.
Note that, the number of n is practically limited since the increasing of n significantly reduces the efficiency and
increases the output resistance and output voltage ripple.
Figure 21. Increasing Output Voltage by Cascading Devices
Figure 22. Generating 3Vin from +Vin
Figure 23. Generating +3Vin from +Vin
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REGULATING Vout
It is possible to regulate the output of the LM2662/LM2663 by use of a low dropout regulator (such as LP2986).
The whole converter is depicted in Figure 24. This converter can give a regulated output from 1.5V to 5.5V by
choosing the proper resistor ratio:
(6)
where, Vref = 1.23V
The error flag on pin 7 of the LP2986 goes low when the regulated output at pin 5 drops by about 5% below
nominal. The LP2986 can be shutdown by taking pin 8 low. The less than 1 μA quiescent current in the
shutdown mode is favorable for battery powered applications.
Figure 24. Combining LM2662/LM2663 with LP2986 to Make a Negative Adjustable Regulator
Also, as shown in Figure 25 by operating the LM2662/LM2663 in voltage doubling mode and adding a low
dropout regulator (such as LP2986) at the output, we can get +5V output from an input as low as +3.3V.
Figure 25. Generating +5V from +3.3V Input Voltage
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REVISION HISTORY
Changes from Revision C (May 2013) to Revision D Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM2662M NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM26
62M
LM2662M/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM26
62M
LM2662MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM26
62M
LM2663M NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM26
63M
LM2663M/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM26
63M
LM2663MX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM26
63M
LM2663MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM26
63M
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM2662MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM2663MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM2663MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2662MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM2663MX SOIC D 8 2500 367.0 367.0 35.0
LM2663MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
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