DRC
DGS
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FEATURES
APPLICATIONS
DESCRIPTION
VBAT
LBI
EN
ADEN
VOUT
LBO
FB
COMP
SW
GND
CIN
10 Fm
L1
10 Hm
R3
COUT
22 Fm
CC1
10 pF
CC2
10 nF
RC
100 kW
6
9
1
8
4
2
3
10
5
7
OFF ON
OFF ON
VOUT = 3.3 V
Low Battery
Warning
TPS61016
R1
R2
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS
The converter output voltage can be adjusted from1.5 V to a maximum of 3.3 V, by an external resistor•Integrated Synchronous Rectifier for Highest
divider or, is fixed internally on the chip. The devicesPower Conversion Efficiency (>95%)
provide an output current of 200 mA with a supply•Start-Up Into Full Load With Supply Voltages
voltage of only 0.9 V. The converter starts up into aas Low as 0.9 V, Operating Down to 0.8 V
full load with a supply voltage of only 0.9 V and staysin operation with supply voltages down to 0.8 V.•200-mA Output Current From 0.9-V Supply•Powersave-Mode for Improved Efficiency at
The converter is based on a fixed frequency, currentmode, pulse-width-modulation (PWM) controller thatLow Output Currents
goes automatically into power save mode at light•Autodischarge Allows to Discharge Output
load. It uses a built-in synchronous rectifier, so, noCapacitor During Shutdown
external Schottky diode is required and the system•Device Quiescent Current Less Than 50 µA
efficiency is improved. The current through the switchis limited to a maximum value of 1300 mA. The•Ease-of-Use Through Isolation of Load From
converter can be disabled to minimize battery drain.Battery During Shutdown of Converter
During shutdown, the load is completely isolated from•Integrated Antiringing Switch Across Inductor
the battery.•Integrated Low Battery Comparator
An autodischarge function allows discharging the•Micro-Small 10-Pin MSOP or 3 mm x 3 mm
output capacitor during shutdown mode. This isQFN Package
especially useful when a microcontroller or memory issupplied, where residual voltage across the output•EVM Available (TPS6101xEVM-157)
capacitor can cause malfunction of the applications.When programming the ADEN-pin, the autodischargefunction can be disabled. A low-EMI mode is im-•All Single- or Dual-Cell Battery Operated Prod-
plemented to reduce interference and radiated elec-ucts Like Internet Audio Players, Pager, Port-
tromagnetic energy when the converter enters theable Medical Diagnostic Equipment, Remote
discontinuous conduction mode. The device is pack-Control, Wireless Headsets
aged in the micro-small space saving 10-pin MSOPpackage. The TPS61010 is also available in a 3 mmx 3 mm 10-pin QFN package.The TPS6101x devices are boost converters intendedfor systems that are typically operated from a single-or dual-cell nickel-cadmium (NiCd), nickel-metal hy-dride (NiMH), or alkaline battery.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OUTPUT VOLTAGE OPTIONS
T
A
OUTPUT VOLTAGE PART NUMBER
(1)
MARKING DGS PACKAGE PACKAGE
(2)
Adjustable from 1.5 V to 3.3 V TPS61010DGS AIP1.5 V TPS61011DGS AIQ1.8 V TPS61012DGS AIR2.5 V TPS61013DGS AIS 10-Pin MSOP-40 °C to 85 °C
2.8 V TPS61014DGS AIT3.0 V TPS61015DGS AIU3.3 V TPS61016DGS AIVAdjustable from 1.5 V to 3.3 V TPS61010DRC AYA 10-Pin QFN
(1) The DGS package and the DRC package are available taped and reeled. Add a R suffix to device type (e.g. TPS61010DGSR orTPS61010DRCR) to order quantities of 3000 devices per reel. The DRC package is also available in mini-reels. Add a T suffix to thedevice type (e.g. TPS61010DRCT) to order quantities of 250 devices per reel.(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIWeb site at www.ti.com .
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
Input voltage range: VBAT, VOUT, EN, LBI, FB, ADEN -0.3 V to 3.6 VSW -0.3 V to 7 VVoltage range: LBO, COMP -0.3 V to 3.6 VOperating free-air temperature range, T
A
-40 °C to 85 °CMaximum junction temperature, T
J
150 °CStorage temperature range, T
stg
-65 °C to 150 °CLead temperature 1,6 mm (1/16 inch) from case for 10s 260 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
T
A
<25 °C DERATING FACTOR T
A
= 70 °C T
A
= 85 °CPACKAGE
POWER RATING ABOVE T
A
= 25 °C POWER RATING POWER RATING
DGS 424 mW 3.4 mW/ °C 271 mW 220 mW
MIN NOM MAX UNIT
Supply voltage at VBAT, V
I
0.8 VOUT VMaximum output current at VIN = 1.2 V, I
O
100 mAMaximum output current at VIN = 2.4 V, I
O
200 mAInductor, L1 10 33 µHInput capacitor, C
I
10 µFOutput capacitor, C
o
10 22 47 µFOperating virtual junction temperature, T
J
-40 125 °C
2
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ELECTRICAL CHARACTERISTICS
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
R
L
= 33 Ω0.85 0.9Minimum input voltage forstart-upV
I
R
L
= 3 k Ω, T
A
= 25 °C 0.8 VInput voltage once started I
O
= 100 mA 0.8Programmable output
TPS61010, I
OUT
= 100 mA 1.5 3.3 Vvoltage range
TPS61011, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 1.45 1.5 1.55
VTPS61012, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 1.74 1.8 1.86TPS61013, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 2.42 2.5 2.58 VTPS61013, 1.6 V < V
I
< V
O
, I
O
= 0 to 200 mA 2.42 2.5 2.58 VV
O
TPS61014, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 2.72 2.8 2.88 VOutput voltage
TPS61014, 1.6 V < V
I
< V
O
, I
O
= 0 to 200 mA 2.72 2.8 2.88 VTPS61015, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 2.9 3.0 3.1 VTPS61015, 1.6 V < V
I
< V
O
, I
O
= 0 to 200 mA 2.9 3.0 3.1 VTPS61016, 0.8 V < V
I
< V
O
, I
O
= 0 to 100 mA 3.2 3.3 3.4 VTPS61016, 1.6 V < V
I
< V
O
, I
O
= 0 to 200 mA 3.2 3.3 3.4 VV
I
> 0.8 V 100Maximum continuous outputI
O
mAcurrent
V
I
> 1.8 V 250TPS61011, once started 0.39 0.48TPS61012, once started 0.54 0.56TPS61013, once started 0.85 0.93I
(SW)
Switch current limit ATPS61014, once started 0.95 1.01TPS61015, once started 1 1.06TPS61016, once started 1.07 1.13V
(FB)
Feedback voltage 480 500 520 mVf Oscillator frequency 420 500 780 kHzD Maximum duty cycle 85%NMOS switch on-resistance 0.37 0.51r
DS(on)
V
O
= 1.5 V ΩPMOS switch on-resistance 0.45 0.54NMOS switch on-resistance 0.2 0.37r
DS(on)
V
O
= 3.3 V ΩPMOS switch on-resistance 0.3 0.45Line regulation
(1)
V
I
= 1.2 V to 1.4 V, I
O
= 100 mA 0.3
%/VLoad regulation
(1)
V
I
= 1.2 V; I
O
= 50 mA to 100 mA 0.1Autodischarge switch
300 400 Ωresistance
Residual output voltage
ADEN = VBAT; EN = GND 0.4 Vafter autodischargeV
IL
LBI voltage threshold
(2)
V
(LBI)
voltage decreasing 480 500 520 mVLBI input hysteresis 10 mvLBI input current 0.01 0.03V
OL
LBO output low voltage V
(LBI)
= 0 V, V
O
= 3.3 V, I
(OL)
= 10 µA 0.04 0.2 VLBO output leakage current V
(LBI)
= 650 mV, V
(LBO)
= V
O
0.03 µAFB input bias currentI
(FB)
V
(FB)
= 500 mV 0.01 0.03(TPS61010 only)EN and ADEN input lowV
IL
0.8 V < V
BAT
< 3.3 V 0.2 ×VBAT Vvoltage
(1) Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominaloutput voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supplyvoltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change.(2) For proper operation the voltage at LBI may not exceed the voltage at V
BAT
.
3
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FUNCTIONAL BLOCK DIAGRAMS
fixed output voltage versions TPS61011 to TPS61016
_
+
UVLO
Control Logic
Oscillator
Gate Drive
Current Sense,
Current Limit, Slope
Compensation
_
+
Antiringing
Comparator
and Switch
_
+Bandgap
Reference
Bias
Control
ADEN
Error
Amplifier
_
+
COUT
VOUT
FB
COMP
GND
SW
L1
CIN
VBAT
EN
ADEN
LBI
LBO
ADEN
VREF
Error
Comparator
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
ELECTRICAL CHARACTERISTICS (continued)over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
EN and ADEN input highV
IH
0.8 V < V
BAT
< 3.3 V 0.8 ×VBAT Vvoltage
EN and ADEN input current EN and ADEN = GND or VBAT 0.01 0.03 µAVBAT/SW 31 46Quiescent current into pinsI
q
I
L
= 0 mA, V
EN
= V
I
µAVBAT/SW and VOUT
V
O
5 8Shutdown current fromI
off
V
EN
= 0 V, ADEN = VBAT, T
A
= 25 °C 1 3 µApower source
4
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adjustable output voltage version TPS61010
_
+
UVLO
Control Logic
Oscillator
Gate Drive
Current Sense,
Current Limit, Slope
Compensation
_
+
Antiringing
Comparator
and Switch
_
+Bandgap
Reference
Bias
Control
ADEN
Error
Amplifier
_
+
COUT
VOUT
FB
COMP
GND
SW
L1
CIN
VBAT
EN
ADEN
LBI
LBO
ADEN
VREF
Error
Comparator
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
FUNCTIONAL BLOCK DIAGRAMS (continued)
5
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DGS
(TOP VIEW) DRC
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
EN
COMP
FB
GND
VOUT
LBO
LBI
ADEN
SW
VBAT
FB
GND
VOUT VBAT
LBI
COMP
SW
ADEN
EN LBO
DETAILED DESCRIPTION
Controller Circuit
Synchronous Rectifier
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
Terminal Functions
Terminal
I/O DescriptionDRG DRCName
No. No.
Autodischarge input. The autodischarge function is enabled if this pin is connected to VBAT, it is disabledADEN 8 8 I
if ADEN is tied to GND.COMP 2 2 I Compensation of error amplifier. Connect an R/C/C network to set frequency response of control loop.1 I Chip-enable input. The converter is switched on if this pin is set high, it is switched off if this pin isEN 1
connected to GND.Feedback input for adjustable output voltage version TPS61010. Output voltage is programmedFB 3 3 I depending on the output voltage divider connected there. For the fixed output voltage versions, leaveFB-pin unconnected.GND 4 4 Ground
Low-battery detector input. A low battery warning is generated at LBO when the voltage on LBI dropsLBI 9 9 I below the threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is notused. Do not leave this pin floating.Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below theLBO 10 10 O
threshold of 500 mV. A pullup resistor must be connected between LBO and VOUT.SW 7 7 I Switch input pin. The inductor is connected to this pin.VOUT 5 5 O Output voltage. Internal resistor divider sets regulated output voltage in fixed output voltage versions.VBAT 6 6 I Supply pin
The device is based on a current-mode control topology using a constant frequency pulse-width modulator toregulate the output voltage. The controller limits the current through the power switch on a pulse by pulse basis.The current-sensing circuit is integrated in the device, therefore, no additional components are required. Due tothe nature of the boost converter topology used here, the peak switch current is the same as the peak inductorcurrent, which will be limited by the integrated current limiting circuits under normal operating conditions.
The control loop must be externally compensated with an R-C-C network connected to the COMP-pin.
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. Thereis no additional Schottky diode required. Because the device uses a integrated low r
DS(on)
PMOS switch forrectification, the power conversion efficiency reaches 95%.
A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventionalsynchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown andallows current flowing from the battery to the output. This device, however, uses a special circuit to disconnectthe backgate diode of the high-side PMOS and so, disconnects the output circuitry from the source when theregulator is not enabled (EN = low).
The benefit of this feature for the system design engineer, is that the battery is not depleted during shutdown ofthe converter. So, no additional effort has to be made by the system designer to ensure disconnection of thebattery from the output of the converter. Therefore, design performance will be increased without additional costsand board space.
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Power-Save Mode
Device Enable
Under-Voltage Lockout
Autodischarge
Low-Battery Detector Circuit (LBI and LBO)
Antiringing Switch
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
DETAILED DESCRIPTION (continued)
The TPS61010 is designed for high efficiency over a wide output current range. Even at light loads, the efficiencystays high because the switching losses of the converter are minimized by effectively reducing the switchingfrequency. The controller enters a powersave-mode if certain conditions are met. In this mode, the controller onlyswitches on the transistor if the output voltage trips below a set threshold voltage. It ramps up the output voltagewith one or several pulses, and goes again into powersave-mode once the output voltage exceeds a setthreshold voltage.
The device is shut down when EN is set to GND. In this mode, the regulator stops switching, all internal controlcircuitry including the low-battery comparator, is switched off, and the load is disconnected from the input (asdescribed above in the synchronous rectifier section). This also means that the output voltage may drop belowthe input voltage during shutdown.
The device is put into operation when EN is set high. During start-up of the converter, the duty cycle is limited inorder to avoid high peak currents drawn from the battery. The limit is set internally by the current limit circuit andis proportional to the voltage on the COMP-pin.
An under-voltage lockout function prevents the device from starting up if the supply voltage on VBAT is lowerthan approximately 0.7 V. This under-voltage lockout function is implemented in order to prevent themalfunctioning of the converter. When in operation and the battery is being discharged, the device willautomatically enter the shutdown mode if the voltage on VBAT drops below approximately 0.7 V.
The autodischarge function is useful for applications where the supply voltage of a µC, µP, or memory has to beremoved during shutdown in order to ensure a defined state of the system.
The autodischarge function is enabled when the ADEN is set high, and is disabled when the ADEN is set toGND. When the autodischarge function is enabled, the output capacitor will be discharged after the device isshut down by setting EN to GND. The capacitors connected to the output are discharged by an integrated switchof 300 Ω, hence the discharge time depends on the total output capacitance. The residual voltage on VOUT isless than 0.4 V after autodischarge.
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flagwhen the battery voltage drops below a user-set threshold voltage. The function is active only when the device isenabled. When the device is disabled, the LBO-pin is high impedance. The LBO-pin goes active low when thevoltage on the LBI-pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to theinternal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with aresistive divider connected to the LBI-pin. The resistive divider scales down the battery voltage to a voltage levelof 500 mV, which is then compared to the LBI threshold voltage. The LBI-pin has a built-in hysteresis of 10 mV.See the application section for more details about the programming of the LBI-threshold.
If the low-battery detection circuit is not used, the LBI-pin should be connected to GND (or to VBAT) and theLBO-pin can be left unconnected. Do not let the LBI-pin float.
The device integrates a circuit that removes the ringing that typically appears on the SW-node when theconverter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero andthe integrated PMOS switch turns off to prevent a reverse current from the output capacitors back to the battery.Due to remaining energy that is stored in parasitic components of the semiconductors and the inductor, a ringingon the SW pin is induced. The integrated antiringing switch clamps this voltage internally to V
BAT
and therefore,dampens this ringing.
7
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Adjustable Output Voltage
Parameter Measurement Information
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
SW
GND
CIN
10 µF
L1
10 µH
R3 COUT
22 µF
CC1
10 pF CC2
10 nF
RC
100 kΩ
6
9
8
1
4
2
3
10
5
7
OFF ON
VOUT = 3.3 V
Low Battery Warning
TPS61016
R1
R2
List of Components:
IC1: Only Fixed Output Versions
(Unless Otherwise Noted)
L1: SUMIDA CDRH6D38 – 100
CIN:X7R/X5R Ceramic
COUT : X7R/X5R Ceramic
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
DETAILED DESCRIPTION (continued)
The devices with fixed output voltages are trimmed to operate with an output voltage accuracy of ±3%.
The accuracy of the adjustable version is determined by the accuracy of the internal voltage reference, thecontroller topology, and the accuracy of the external resistor. The reference voltage has an accuracy of ±4% overline, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending onload current. This adds an offset to the output voltage that is equivalent to 1% of V
O
. The tolerance of theresistors in the feedback divider determine the total system accuracy.
Figure 1. Circuit Used for Typical Characteristics Measurements
8
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Typical Characteristics
Table of Graphs
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
FIGURE
vs Input voltage for V
O
= 2.5 V, 3.3 V 3Maximum output current
vs Input voltage for V
O
= 1.5 V, 1.8 V 4vs Output current for V
I
= 1.2 VV
O
= 1.5 V, L1 = Sumida CDR74 - 10 µH 5vs Output current for V
I
= 1.2 VV
O
= 2.5 V, L1 = Sumida CDR74 - 10 µH 6vs Output current for VIN = 1.2 VV
O
= 3.3 V, L1 = Sumida CDR74 - 10 µH 7vs Output current for V
I
= 2.4 VV
O
= 3.3 V, L1 = Sumida CDR74 - 10 µH 8vs Input voltage for I
O
= 10 mA, I
O
= 100 mA, I
O
= 200 mAV
O
= 3.3 V, L1 = 9Sumida CDR74 - 10 µHTPS61016, VBAT = 1.2 V, I
O
= 100 mASumida CDRH6D38 - 10 µHSumida CDRH5D18 - 10 µHSumida CDRH74 - 10 µHSumida CDRH74B - 10 µHEfficiency
Coilcraft DS 1608C - 10 µHCoilcraft DO 1608C - 10 µHCoilcraft DO 3308P - 10 µH 10Coilcraft DS 3316 - 10 µHCoiltronics UP1B - 10 µHCoiltronics UP2B - 10 µHMurata LQS66C - 10 µHMurata LQN6C - 10 µHTDK SLF 7045 - 10 µHTDK SLF 7032 - 10 µHvs Output current TPS61011 11Output voltage vs Output current TPS61013 12vs Output current TPS61016 13Minimum supply start-up voltage vs Load resistance 14No-load supply current vs Input voltage 15Shutdown supply current vs Input voltage 16Switch current limit vs Output voltage 17Output voltage (ripple) in continuous modeInductor current 18Output voltage (ripple) in discontinuous modeInductor current 19Load transient response for output current step of 50 mA to 100 mA 20Waveforms
Line transient response for supply voltage step from 1.08 V to 1.32 V at 21I
O
= 100 mAConverter start-up time after enable 22
9
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TYPICAL CHARACTERISTICS
IO − Output Current − mA
40
50
60
70
80
90
100
0.1 1 10 100 1000
Efficiency − %
VBAT = 1.2 V,
VO = 1.5 V
IO − Output Current − mA
40
50
60
70
80
90
100
0.1 1 10 100 1000
Efficiency − %
VBAT = 1.2 V,
VO = 2.5 V
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
MAXIMUM OUTPUT CURRENT MAXIMUM OUTPUT CURRENTvs vsINPUT VOLTAGE INPUT VOLTAGE
Figure 2. Figure 3.
EFFICIENCY EFFICIENCYvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 4. Figure 5.
10
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IO − Output Current − mA
40
50
60
70
80
90
100
0.1 1 10 100 1000
Efficiency − %
VBAT = 1.2 V,
VO = 3.3 V
IO − Output Current − mA
40
50
60
70
80
90
100
0.1 1 10 100 1000
Efficiency − %
VBAT = 2.4 V,
VO = 3.3 V
40
50
60
70
80
90
100
0.5 1 1.5 2 2.5 3 3.5
VO = 3.3 V
IO = 10 mA
IO = 100 mA
IO = 200 mA
Efficiency − %
VI − Input Voltage − V
83
84
85
86
87
88
89
90
91
Sumida CDRH6D38
CDRH5D18
CDRH74
CDR74B
Coilcraft DS1608C
DO1608C
DO3308P
DS3316
Coiltronics UP1B
UP2B
Murata LQS66C
LQN6C
TDK SLF7045
SLF7032
Efficiency − %
Inductor Type
VBAT = 1.2 V,
VO = 3.3 V,
IO = 100 mA
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
TYPICAL CHARACTERISTICS (continued)
EFFICIENCY EFFICIENCYvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 6. Figure 7.
EFFICIENCY EFFICIENCYvs vsINPUT VOLTAGE INDUCTOR TYPE
Figure 8. Figure 9.
11
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2.25
2.50
2.75
0.1 1 10 100 1 A
− Output Voltage − V
IO − Output Current − mA
VBAT = 1.2 V
VO
1.25
1.50
1.75
0.1 1 10 100 1 A
− Output Voltage − V
IO − Output Current − mA
VBAT = 1.2 V
VO
3
3.25
3.50
0.1 1 10 100 1 A
− Output Voltage − V
IO − Output Current − mA
VBAT = 1.2 V
VO
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 10. Figure 11.
OUTPUT VOLTAGE MINIMUM START-UP SUPPLY VOLTAGEvs vsOUTPUT CURRENT LOAD RESISTANCE
Figure 12. Figure 13.
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0
10
20
30
40
50
60
0.5 1 1.5 2 2.5 3 3.5
TA = 25°C
TA = −40°C
TA = 85°C
VI − Input Voltage − V
− No-Load Supply Current −ICC Aµ
0
1
2
3
4
5
6
0.5 1 1.5 2 2.5 3 3.5
TA = 85°C
TA = 25°C
TA = −40°C
− Shutdown Supply Current −
ICC Aµ
VI − Input Voltage − V
Output Voltage
20 mV/div, AC
Inductor Current
50 mA/div, AC
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
t − Time − µs
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
TYPICAL CHARACTERISTICS (continued)
NO-LOAD SUPPLY CURRENT SHUTDOWN SUPPLY CURRENTvs vsINPUT VOLTAGE INPUT VOLTAGE
Figure 14. Figure 15.
SWITCH CURRENT LIMIT OUTPUT VOLTAGE RIPPLE IN CONTINUOUS MODEvsOUTPUT VOLTAGE
Figure 16. Figure 17.
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0 1 2 3 4 5 6 7 8 9 10
Output Voltage
50 mV/div, AC
Output Current
50 mA/div, AC
t − Time − ms
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output Voltage
50 mV/div, AC
Inductor Current
50 mA/div, AC
t − Time − ms
0 1 2 3 4 5 6 7 8 9 10
Input Voltage
100 mV/div, AC
Output Voltage
50 mA/div, AC
t − Time − ms
Enable,
2 V/div,DC
V(SW),
2 V/div,DC
Output Voltage,
1 V/div,DC Input Current,
200 mA/div,DC
0 1 2 3 4 5 6 7 8 9 10
t − Time − ms
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE RIPPLE IN DISCONTINUOUS MODE LOAD TRANSIENT RESPONSE
Figure 18. Figure 19.
LINE TRANSIENT RESPONSE CONVERTER START-UP TIME AFTER ENABLE
Figure 20. Figure 21.
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DESIGN PROCEDURE
Programming the TPS61010 Adjustable Output Voltage Device
R3 R4 VO
VFB–1500 kVO
500 mV–1
(1)
VBAT
LBI
EN
ADEN
VOUT
LBO
FB
COMP
SW
GND
CIN
10 µF
10 V
L1
10 µH
R5 COUT
22 µF
10 V
CC1
10 pF CC2
10 nF
RC
6
9
1
8
4
2
3
10
5
7
VOUT = 3.3 V
Low Battery Warning
TPS61016
1 Cell
NiMH,
NiCd or
Alkaline
R1
R2
R3
100 kΩ
R4
programming the low battery comparator threshold voltage
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
The TPS6101x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMHbattery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered bytwo-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, single- ordual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6101xis used.
The output voltage of the TPS61010 can be adjusted with an external resistor divider. The typical value of thevoltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode.The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should beabout 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and thevoltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the rangeof 500 k Ωin order to set the divider current at 1 µA. From that, the value of resistor R3, depending on theneeded output voltage (V
O
), can be calculated using Equation 1 .
If, as an example, an output voltage of 2.5 V is needed, a 2-M Ωresistor should be chosen for R3.
Figure 22. Typical Application Circuit for Adjustable Output Voltage Option
The output voltage of the adjustable output voltage version changes with the output current. Due todevice-internal ground shift, which is caused by the high switch current, the internal reference voltage and thevoltage on the FB pin increases with increasing output current. Since the output voltage follows the voltage onthe FB pin, the output voltage rises as well with a rate of 1 mV per 1-mA output current increase. Additionally,when the converter goes into pulse-skip mode at output currents around 5 mA and lower, the output voltagedrops due to the hysteresis of the controller. This hysteresis is about 15 mV, measured on the FB pin.
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. Thetypical current into the LBI pin is 0.01 µA, the voltage across R2 is equal to the reference voltage that isgenerated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in therange of 500 k Ω. From that, the value of resistor R1, depending on the desired minimum battery voltage V
BAT
,can be calculated using Equation 2 .
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R1 R2 VBAT
VREF–1500 kVBAT
500 mV–1
(2)
inductor selection
ILIOUT VO
VBAT 0.8
(3)
LVBAT VOUT VBAT
ILƒVOUT
(4)
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a batteryvoltage of 1 V, a resistor in the range of 500 k Ωshould be chosen for R1. The output of the low batterycomparator is a simple open-drain output that goes active low if the battery voltage drops below the programmedthreshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 M Ω, and shouldonly be pulled up to the V
O
. If not used, the LBO pin can be left floating or tied to GND.
A boost converter normally requires two main passive components for storing energy during the conversion. Aboost inductor is required and a storage capacitor at the output. To select the boost inductor, it is recommendedto keep the possible peak inductor current below the current limit threshold of the power switch in the chosenconfiguration. For example, the current limit threshold of the TPS61010's switch is 1100 mA at an output voltageof 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input(V
BAT
), and the output voltage (V
O
). Estimation of the maximum average inductor current can be done usingEquation 3 .
For example, for an output current of 100 mA at 3.3 V, at least 515-mA of current flows through the inductor at aminimum input voltage of 0.8 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it isadvisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces themagnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,regulation time at load changes rises. In addition, a larger inductor increases the total system costs.
With those parameters, it is possible to calculate the value for the inductor by using Equation 4 .
Parameter 7 is the switching frequency and ∆I
L
is the ripple current in the inductor, i.e., 20% ×I
L
.
In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculatedcurrents, it is possible to choose a suitable inductor. Care must be taken that load transients and losses in thecircuit can lead to higher currents as estimated in Equation 3 . Also, the losses in the inductor caused bymagnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency.
The following inductor series from different suppliers were tested. All work with the TPS6101x converter withintheir specified parameters:
Table 1. Recommended Inductors
VENDOR RECOMMENDED INDUCTOR SERIES
Sumida Sumida CDR74B
Sumida CDRH74
Sumida CDRH5D18
Sumida CDRH6D38Coilcraft Coilcraft DO 1608CCoilcraft DS 1608CCoilcraft DS 3316Coilcraft DT D03308PCoiltronics Coiltronics UP1BCoiltronics UP2B
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capacitor selection
Cmin IOUT VOUT VBAT
ƒVVOUT
(5)
VESR IOUT RESR
(6)
Compensation of the Control Loop
RC
100 kΩ
CC1
10 pF CC2
10 nF
COMP
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
Table 1. Recommended Inductors (continued)
VENDOR RECOMMENDED INDUCTOR SERIES
Murata Murata LQS66C
Murata LQN6CTDK TDK SLF 7045TDK SLF 7032
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple ofthe converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It ispossible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, byusing Equation 5 .
Parameter f is the switching frequency and ∆V is the maximum allowed ripple.
With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger dueto the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 6 .
An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 m Ω. The totalripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. Inthis example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or usingsmaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. Forexample, a 10 µF ceramic capacitor with an ESR of 50 m Ωis used on the evaluation module (EVM). Tradeoffsmust be made between performance and costs of the converter circuit.
A 10µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or atantalum capacitor with a 100 nF ceramic capacitor in parallel placed close to the IC is recommended.
An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter.Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the outputcapacitor must be compensated. The network shown in Figure 5 satisfies these requirements.
Figure 23. Compensation of Control Loop
Resistor R
C
and capacitor C
C2
depend on the chosen inductance. For a 10 µH inductor, the capacitance of C
C2should be chosen to 10 nF, or in other words, if the inductor is XXµH, the chosen compensation capacitor shouldbe XX nF, the same number value. The value of the compensation resistor is then chosen based on therequirement to have a time constant of 1 ms, for the R/C network R
C
and C
C2
, hence for a 33 nF capacitor, a 33kΩresistor should be chosen for R
C
.
Capacitor C
C1
depends on the ESR and capacitance value of the output capacitor, and on the value chosen forR
C
. Its value is calculated using Equation 7 .
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CC1 COUT ESRCOUT
RC
(7)
Layout Considerations
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO R2
R3
C4 OUTPUT
U1
R4
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
For a selected output capacitor of 22 µF with an ESR of 0.2 Ω, an R
C
of 33 k Ω, the value of C
C1
is in the rangeof 100 pF.
Table 2. Recommended Compensation Components
OUTPUT CAPACITORINDUCTOR[µH] RC[k Ω] CC1[pF] CC2[nF]CAPACITANCE[µF] ESR[ Ω]
33 22 0.2 33 120 3322 22 0.3 47 150 2210 22 0.4 100 100 1010 10 0.1 100 10 10
As for all switching power supplies, the layout is an important step in the design, especially at high peak currentsand high switching frequencies. If the layout is not carefully done, the regulator could show stability problems aswell as EMI problems.
Therefore, use wide and short traces for the main current path as indicated in bold in Figure 24 . The inputcapacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a commonground node as shown in Figure 24 to minimize the effects of ground noise. The compensation circuit and thefeedback divider should be placed as close as possible to the IC. To layout the control ground, it isrecommended to use short traces as well, separated from the power ground traces. Connect both grounds closeto the ground pin of the IC as indicated in the layout diagram in Figure 24 . This avoids ground shift problems,which can occur due to superimposition of power ground current and control ground current.
Figure 24. Layout Diagram
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APPLICATION INFORMATION
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO C5 OUTPUT
U1
R4 C4
List of Components:
U1 TPS6101 (1–6)
C1, C4, C5 10 µF X5R Ceramic,
TDK C3216X5R0J106
L1 10 µH
SUMIDA CDRH5D18–100
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO OUTPUT
U1
R4 C4
List of Components:
U1 TPS6101 (1–6)
C1 10 µF X5R Ceramic,
TDK C3216X5R0J106
C4 22 µF X5R Ceramic,
TDK C3225X5R0J226
L1 10 µH SUMIDA CDRH6D38
IOUT ≥ 250 mA
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
Figure 25. 1,8 mm Maximum Height Power Supply With Single Battery Cell Input Using Low ProfileComponents
Figure 26. 250-mA Power Supply With Two Battery Cell Input
19
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SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO
3.3-V I/O Supply
U1
R4 C4
List of Components:
U1 TPS61016
U2 TPS76915
C1 10 µF X5R Ceramic,
TDK C3216X5R0J106
C4 22 µF X5R Ceramic,
TDK C3225X5R0J226
L1 10 µH SUMIDA CDRH6D38
U2
LDO C6 1.5-V Core Supply
GND
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO
U1
R4 C4
List of Components:
U1 TPS61016
DS1 BAT54S
C1 10 µF X5R Ceramic,
TDK C3216X5R0J106
C4 22 µF X5R Ceramic,
TDK C3225X5R0J226,
C6 1 µF X5R Ceramic,
C7 0.1 µF X5R Ceramic,
L1 10 µH SUMIDA CDRH6D38–100
GND
C7 DS1 C6
6-V/10-mA Aux Output
3.3-V/100-mA Main Output
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
APPLICATION INFORMATION (continued)
Figure 27. Dual Output Voltage Power Supply for DSPs
Figure 28. Power Supply With Auxiliary Positive Output Voltage
20
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SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
Battery
C2
R1
C3
LBO
U1
R4 C4
List of Components:
U1 TPS61016
DS1 BAT54S
C1 10 µF X5R Ceramic,
TDK C3216X5R0J106
C4 22 µF X5R Ceramic,
TDK C3225X5R0J226,
C6 1 µF X5R Ceramic,
C7 0.1 µF X5R Ceramic,
L1 10 µH SUMIDA CDRH6D38–100
GND
DS1 C6
–2.7-V/10-mA Aux Output
3.3-V/100-mA Main Output
C7 GND
SW
VBAT
LBI
ADEN
EN
VOUT
LBO
FB
COMP
GND
L1
R5
R6
C1
C2
R1
C3
LBO C5
OUTPUT
R4 C4
GND
R2
R3
J1
J2
INPUT
TPS6101x
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
APPLICATION INFORMATION (continued)
Figure 29. Power Supply With Auxiliary Negative Output Voltage
Figure 30. TPS6101x EVM Circuit Diagram
21
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TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
APPLICATION INFORMATION (continued)
Figure 31. TPS6101x EVM Component Placement (actual size: 55,9 mm x 40,6 mm)
Figure 32. TPS6101x EVM Top Layer Layout (actual size: 55,9 mm x 40,6 mm)
22
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THERMAL INFORMATION
PD(MAX) TJ(MAX) – TA
RJA 125°C85°C
294°CW136 mW
(8)
TPS61010, TPS61011TPS61012, TPS61013TPS61014, TPS61015, TPS61016
SLVS314D – SEPTEMBER 2000 – REVISED JUNE 2005
APPLICATION INFORMATION (continued)
Figure 33. TPS6101x EVM Bottom Layer Layout (actual size: 55,9 mm x 40,6 mm)
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requiresspecial attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, addedheat sinks and convection surfaces, and the presence of other heat-generating components affect thepower-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are:•Improving the power dissipation capability of the PWB design•Improving the thermal coupling of the component to the PWB•Introducing airflow in the system
The maximum junction temperature (T
J
) of the TPS6101x devices is 125 °C. The thermal resistance of the 10-pinMSOP package (DGS) is R
ΘJA
= 294 °C/W. Specified regulator operation is assured to a maximum ambienttemperature (T
A
) of 85 °C. Therefore, the maximum power dissipation is about 130 mW. More power can bedissipated if the maximum ambient temperature of the application is lower.
23
PACKAGE OPTION ADDENDUM
www.ti.com 27-Jul-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS61010DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61010DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61010DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61010DGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61012DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61012DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61012DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61012DGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS61013DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61013DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61014DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61014DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61014DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61014DGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61015DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61015DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61015DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 27-Jul-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS61015DGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61016DGS ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61016DGSG4 ACTIVE MSOP DGS 10 80 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61016DGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
TPS61016DGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS61010DGSR MSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS61010DGSR MSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPS61016DGSR MSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS61010DGSR MSOP DGS 10 2500 358.0 335.0 35.0
TPS61010DGSR MSOP DGS 10 2500 366.0 364.0 50.0
TPS61016DGSR MSOP DGS 10 2500 364.0 364.0 27.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Aug-2012
Pack Materials-Page 2
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