PRM Regulator TM PRM48AH480x200A00 S C NRTL US High Efficiency Converter Features Product Ratings * 48.0 V input (36.0 V to 75.0 V), non-isolated ZVS buck-boost regulator * 20.0 V to 55.0 V adjustable output range VIN = 36.0 V to 75.0 V POUT = 200 W VOUT = 48.0 V (20.0 V to 55.0 V Trim) IOUT = 4.17 A * 200 W output power in 0.57 in2 footprint * 96.7% typical efficiency, at full load * 1341 W/in3 (82 W/cm3) Power Density * 5.29 MHrs MTBF (MIL-HDBK-217 Plus Parts Count) * Pin selectable operating mode Product Description Adaptive Loop Remote Sense / Slave * Half VI Chip(R) Package The VI Chip(R) PRMTM Regulator is high efficiency converter, operating from a 36.0 to 75.0 Vdc input to generate a regulated 20.0 to 55.0 Vdc output. The ZVS buck-boost topology enables high switching frequency (~1.03 MHz) operation with high conversion e ciency. High switching frequency reduces the size of reactive components enabling power density up to 1341 W/in3. 22.0mm x 16.5mm x 6.73mm Typical Applications * * * * * High Density Power Supply DC-DC rail outputs High Density ATE system DC-DC power Telecom NPU and ASIC core power Communications Systems Non-isolated and isolated power converters The Half VI Chip(R) package is compatible with standard pickand-place and surface mount assembly processes with a planar thermal interface area and superior thermal conductivity. In a Factorized Power ArchitectureTM system, the PRM and downstream VTMTM current multiplier minimize distribution and conversion losses in a high power solution, providing an isolated, regulated output voltage. The PRM48AH480x200A00 has two selectable modes of regulation depending on the application requirements. In Adaptive Loop Operation, the PRM48AH480x200A00 utilizes a unique feed-forward scheme that enables precise regulation of an isolated POL voltage without the need for remote sensing and voltage feedback. In Remote Sense Operation, the internal regulation circuitry is disabled, and an external control loop and current sensor maintain regulation. This a ords flexibility in the design of both voltage and current compensation loops to optimize performance in the end application. PRMTM Regulator Rev 1.5 vicorpower.com Page 1 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Typical Applications PRM ENABLE VAUX SGND RTRIM RAL VTM REF/ REF_EN TRIM ON/OFF CONTROL AL VT SHARE/ CONTROL NODE VC VOUT Adaptive Loop Temperature Feedback +OUT TM VTM Start Up Pulse VC IFB PC +OUT +IN COUT SGND Vin +IN VF: 20 V to 55 V CIN -IN SGND LF CF -OUT -IN -OUT PRIMARY GND SECONDARY SEC_GND ISOLATION BOUNDRY SGND Typical Application: PRM48AH480x200A00 + VTM Adaptive Loop Configuration VREF SGND ENABLE VAUX SGND SGND SGND OUT Voltage Sense and Error Amplifier (Differential) GND VTM REF/ REF_EN TRIM ON/OFF CONTROL REF 3312 IN AL VT SHARE/ CONTROL NODE VC SGND TM Voltage Reference with Soft Start IFB Voltage Sense PRM VTM Start up Pulse V+ +OUT VC PC V- VOUT +IN VIN +IN LF External Current Sense -IN SGND COUT SGND +OUT CIN [1] -IN +IN CF -IN -OUT GND -OUT PRIMARY SECONDARY ISOLATION BOUNDRY SGND Typical Application: PRM48AH480x200A00 + VTM, non-isolated Remote Sense Configuration [1] Non-Isolated Configuration: -Out connected to -IN PRMTM Regulator Rev 1.5 vicorpower.com Page 2 of 42 11/2015 800 927.9474 GND [1] LOAD PRM48AH480x200A00 Pin Configuration 1 SHARE/ CONTROL NODE A TRIM C NC E TOP VIEW 2 B ENABLE D NC F AL 3 VT A IFB C REF/REF_EN E 4 B VAUX D SGND F VC +IN G G +OUT -IN H H -OUT Half VIC Pin Descriptions Pin Number Signal Name F4 SHARE (Adaptive Loop / Slave Operation) CONTROL NODE (Remote Sense Operation) VT (Adaptive Loop Operation) ENABLE VAUX TRIM IFB (Remote Sense Operation) NC SGND NC REF (Adaptive Loop Operation) REF_EN (Remote Sense Operation) AL (Adaptive Loop Operation) VC G1,G2 +IN G3,G4 +OUT H1,H2 -IN H3,H4 -OUT A1 A3 B2 B4 C1 C3 D2 D4 E1 E3 F2 Type BIDIR INPUT INPUT BIDIR OUTPUT INPUT INPUT n/a INPUT n/a Function Parallel sharing control bus for master-slave configuration. Modulator control node input. Driven by external error amplifier in Remote Sense Operation. VTM TM input for temperature compensation. Leave disconnected for Remote Sense Operation. Enables power supply when allowed to float high. 5 V during normal operation. 9 V auxiliary bias voltage. Selects operating mode. Adjusts output voltage in Adaptive Loop Operation. Current sense input for current limit and overcurrent protection in Remote Sense Operation. Leave disconnected for Adaptive Loop Operation. Do not connect this pin. Signal ground, reference for analog controls. Kelvin connected internally to -IN and -OUT. Do not connect this pin. OUTPUT Reference voltage for internal error amplifier in Adaptive Loop Operation. OUTPUT Powers and enables external control circuit voltage reference in Remote Sense Operation. INPUT OUTPUT INPUT POWER OUTPUT POWER INPUT POWER RETURN OUTPUT POWER RETURN Adaptive loop gain control. Sets the magnitude of the Adaptive Loop load line in Adaptive Loop Operation. Leave disconnected for Remote Sense Operation. Bias voltage to power VTM module during start up Positive input power terminal Positive output power terminal Negative input power terminal. Connected internally to -OUT. Negative output power terminal. Connected internally to -IN. PRMTM Regulator Rev 1.5 vicorpower.com Page 3 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Part Ordering Information Device Input Voltage Range Package Type Output Voltage x 10 Temperature Grade Output Power Revision Version PRM 48A H 480 T 200 A 00 PRM = PRM 48A = 36.0 V - 75.0 V H = Half VIC SMD 480 = 48.0 V T = -40 to 125C M = -55 to 125C 200 = 200 W A 00 = AL / RS Standard Models Part Number PRM48AH480T200A00 PRM48AH480M200A00 VIN Package Type VOUT Temperature 36.0 V - 75.0 V Half VIC SMD 48.0 V (20.0 V to 55.0 V) -55 to 125C -40 to 125C Power Version 200 W AL / RS (Pin Selectable) Absolute Maximum Ratings The ABSOLUTE MAXIMUM ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to device. Electrical specifications do not apply when operating beyond rated operating conditions. Operating beyond rated operating conditions for extended period of time may affect device reliability. All voltages are specified relative to SGND unless otherwise noted. Positive pin current represents current flowing out of the pin. Parameter Comments Min -0.3 SHARE / CONTROL NODE -0.3 ENABLE +IN to -IN Continuous, non-operating -1 100 ms, non-Operating -0.5 VAUX SGND IFB REF / REF _EN Max Unit 10.5 V +/-10 mA 5.5 V +/-10 mA 90 V 100 V 10.5 V +/-100 mA +/-100 mA -0.5 5.7 V -0.3 3.6 V 10 mA Remote Sense Operation (REF _EN) 3.4 mA TRIM Adaptive Loop Operation (REF) -0.3 3.6 V AL -0.3 3.6 V VT -0.3 4.8 V -0.5 18 V +/-1.8 A VC to -OUT +OUT to -OUT -1 Output Current 62 V 6.3 A Internal Operating Temperature T Grade -40 125 C M Grade -55 125 C Storage Temperature T Grade -40 125 C M Grade -65 125 C PRMTM Regulator Rev 1.5 vicorpower.com Page 4 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Electrical Specifications Specifications apply over all line and load conditions, and trim from 20.0 V to 55.0 V, unless otherwise noted; Boldface specifications apply over the temperature range of -40C < TINT < 125C; All Other specifications are at TINT = 25C unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 36.0 0.001 48.0 75.0 1000 V V/ms V ms W mA A F m Power Input Specification Input Voltage Range VIN Slew Rate Initialization Voltage Initialization Delay No Load Power Dissipation Input Quiescent Current Input Current Input Capacitance (Internal) Input Capacitance (Internal) ESR VIN dVIN /dt VINIT tINIT PNL IQC IIN_DC CIN_INT RCIN Continuous, operating 0 VIN 75.0 V Internal micro controller initialization voltage From VIN first crossing VINIT ENABLE HIGH, VIN = 48.0 V ENABLE LOW, VIN = 48.0 V IOUT = 4.17 A, VIN = 48.0 V, VOUT = 48.0 V Effective value, VIN = 48.0 V (see Fig. 13) Effective value, VIN = 48.0 V 5.0 10 7.0 2.4 14.5 4.3 2 3.0 9.0 3.5 20.0 4.4 Power Output Specification Rated Output Current IOUT Standalone and Master Operation, see Figure 1, SOA 4.17 A Rated Output Power POUT 200 W 1.07 MHz Switching Frequency FSW Standalone and Master Operation, see Figure 1, SOA VIN = 48.0 V VOUT = 48.0 V, IOUT = 2.08 A, TINT = 25C Over line, load, trim and temperature, exclusive of burst mode From VIN first crossing VIN_UVLO+_SUPV to ENABLE high; tINIT expired 1.07 MHz Output Turn-ON Delay tON 0.94 0.70 From ENABLE pin release to ENABLE high, VIN applied, tOFF expired Start up Sequence Timeout Efficiency Ambient Efficiency Hot Efficiency Over Temperature Output Discharge current tSTARTUP_SEQ From ENABLE high to start up sequence complete AMB HOT VIN = 48.0 V, VOUT = 48.0 V, IOUT = 4.17 A, TINT = 25C 95.25 VIN = 48.0 V, VOUT = 48.0 V, IOUT = 2.08 A, TINT = 25C 94.0 VIN = 36.0 V to 75.0 V, VOUT = 48.0 V, IOUT = 4.17 A, TINT = 25C VIN = 36.0 V to 75.0 V, IOUT = 4.17 A, TINT = 25C, over trim VIN = 48.0 V, VOUT = 48.0 V, IOUT = 4.17 A, TINT = 100C VIN = 48.0 V, VOUT = 48.0 V, IOUT = 2.08 A, TINT = 100C VIN = 36.0 V to 75.0 V , VOUT = 48.0 V, IOUT = 4.17 A, TINT = 100C VIN = 36.0 V to 75.0 V , IOUT = 4.17 A, TINT = 100C, over trim 20 s 20 s 17 ms % % 95.0 93.25 % 90.0 % 94.8 96.8 % 94.0 96.0 % 93.5 % 90.0 % >50% load and VOUT = 48.0 V; over temperature 94.0 % >50% load; over temperature and trim 87.0 % IOD Average Value VIN = 48.0 V, VOUT = 48.0 V, IOUT = 4.17 A, COUT_EXT = 0 F, 20 MHz BW Output Voltage Ripple VOUT_PP Output Inductance (Parasitic) LOUT_PAR Frequency @ 1.03 MHz, Simulated J-Lead model Output Capacitance (Internal) COUT_INT Effective value, VOUT = 48.0 V (see Fig.13) Output Capacitance (Internal) ESR 1.03 RCOUT Effective value, VOUT = 48.0 V PRMTM Regulator Rev 1.5 vicorpower.com Page 5 of 42 11/2015 800 927.9474 0.5 1000 2.5 mA 1500 mV nH 2 F 3.0 m PRM48AH480x200A00 Electrical Specifications (cont.) Specifications apply over all line and load conditions, and trim from 20.0 V to 55.0 V, unless otherwise noted; Boldface specifications apply over the temperature range of -40C < TINT < 125C; All Other specifications are at TINT = 25C unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 47.00 20.0 1.7 48.00 49.00 55.0 1.9 0.2 0.2 0.2 V V ms % % % 3 % 5 % 5.8 A 6.3 A 47 F 25 F 4.8 V Power Output Specifications: Adaptive Loop Operation Output Voltage Setpoint Output Voltage Trim Range Output Voltage Rise Time Output Voltage Load Regulation Output Voltage Line Regulation Total Regulation Error Total AL Regulation Error Output Current Limit VOUT_SET VOUT tRISE_VOUT From soft start initiated to output voltage settled VOUT_REG_LOAD Adaptive loop load line inactive VOUT_REG_LINE Adaptive loop load line inactive VOUT_REG_TOTAL PRM output voltage, Adaptive Loop load line inactive VOUT_REG_AL ILIMIT Load Capacitance (Electrolytic) CLOAD_ALEL Load Capacitance (Ceramic) CLOAD_CER Load Transient Voltage Deviation Load Transient Recovery Time No load, trim Inactive, Adaptive Loop load line inactive VTRANS tTRANS VTM output voltage, total Adaptive Loop regulation, VOUT = 48.0 V, trim inactive Rated Power Within an Array Current Sharing Difference (Master to Slave) IOUT_ARRAY POUT_ARRAY IOUT_SHARE_MS 1 VTM output voltage, total Adaptive Loop regulation, trim active, exclusive of external resistor tolerances VIN = 48.0 V, VOUT = 48.0 V, TINT = 25C, constant current limit after supervisory limit detection time tLIM_SUPV 4.6 Over line, load, trim and temperature 4.2 0.1 ESR 1 , See Figure 32, total capacitance (CLOAD_ALEL + CLOAD_CER) 47 F 5.2 2 m ESR 200 m, See Figure 32 10% 100% load step, 10 A/sec, 0 F COUT, deviation from initial setpoint 10% 100% load step, 10 A/sec, 0 F COUT, Recovery to 90% of final value, Adaptive Loop load line inactive 10% 100% load step, 10 A/sec, 0 F COUT, Recovery to 90% of final value, Adaptive Loop load line active, VAL = 1.20 V Power Output Specifications: Slave Operation with AL Master Slave Operation within an array, up to 5C case Rated Current Within an Array 1.8 0.02 0.02 temperature differential, master-slave configuration Slave Operation within an array, up to 30C case temperature differential, master-slave configuration Slave Operation within an array, up to 5C case temperature differential, master-slave configuration Slave Operation within an array, up to 30C case temperature differential, master-slave configuration Equal input, and output voltage at full load; VIN = 48.0 V, VOUT = 48.0 V Equal input and output voltage at full load; Over line and trim, with 25C TC 100C and 5C part-part temp. mismatch Equal input, and output voltage at full load; Over line and trim, with 25C TC 100C and 30C part-part temp. mismatch PRMTM Regulator Rev 1.5 vicorpower.com Page 6 of 42 11/2015 800 927.9474 100 s 500 s 3.3 A 2.9 A 160 W 140 W 15 % 15 % 20 % PRM48AH480x200A00 Electrical Specifications (cont.) Specifications apply over all line and load conditions, and trim from 20.0 V to 55.0 V, unless otherwise noted; Boldface specifications apply over the temperature range of -40C < TINT < 125C; All Other specifications are at TINT = 25C unless otherwise noted. Attribute Symbol Conditions / Notes Min Power Output Specifications: Slave Operations (cont.) Equal input, output, and SHARE voltage at full load; Current Sharing Difference (Slave to Slave) Maximum Array Size Output Voltage Range Rated Current Within an Array Rated Power Within an Array Current Sharing Difference Maximum Array Size IOUT_SHARE_SS NPRMS_PARALLEL VIN = 48.0 V, VOUT = 48.0 V Equal input, output and SHARE voltage at full load; Over line and trim, with 25C TC 100C and 5C part-part temp. mismatch Equal input, output, and SHARE voltage at full load; Over line and trim, with 25C TC 100C and 30C part-part temp. mismatch Maximum number of parallel devices, master-slave configuration Power Output Specifications: Remote Sense Operation VOUT Remote Sense Operation within an array, up to 5C case temperature differential IOUT_ARRAY Remote Sense Operation within an array, up to 30C case temperature differential Remote Sense Operation within an array, up to 5C case temperature differential POUT_ARRAY Remote Sense Operation within an array, up to 30C case temperature differential Equal input, output, and CONTROL NODE voltage at full load; VIN = 48.0 V, VOUT = 48.0 V Equal input, output and CONTROL NODE voltage at full load; Over line and trim, with 25C TC 100C IOUT_SHARE_RS and 5C part-part temp. mismatch Equal input, output, and CONTROL NODE voltage at full load; Over line and trim, with 25C TC 100C and 30C part-part temp. mismatch (worst case) Maximum number of parallel devices, Remote Sense NPRMS_PARALLEL configuration, CONTROL NODE externally driven PRMTM Regulator Rev 1.5 vicorpower.com Page 7 of 42 11/2015 800 927.9474 20.0 Typ Max Unit 5 % 10 % 15 % 5 PRMs 55.0 V 3.8 A 3.3 A 180 W 160 W 5 % 10 % 15 % 10 PRMs PRM48AH480x200A00 Electrical Specifications (cont.) Specifications apply over all line and load conditions, and trim from 20.0 V to 55.0 V, unless otherwise noted; Boldface specifications apply over the temperature range of -40C < TINT < 125C; All Other specifications are at TINT = 25C unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 30.9 28.8 2.2 82.9 84.6 1.7 58.3 33.0 8.8 9.5 7.2 V V V V V V V V C W V V V 6.9 V 5 ms 75 ms Powertrain Protections Input Undervoltage Turn-ON Input Undervoltage Turn-OFF Input Undervoltage Hysteresis Input Overvoltage Turn-ON Input Overvoltage Turn-OFF Input Overvoltage Hysteresis Output Overvoltage Threshold Minimum Current Limited Vout Overtemperature Shutdown Setpoint Output Power Limit Short Circuit VOUT Threshold Short Circuit VOUT Recovery Threshold Short Circuit CONTROL NODE Threshold Short Circuit CONTROL NODE Recovery Threshold VIN_UVLO+ VIN_UVLOVUVLO_HYST VIN_OVLOVIN_OVLO+ VOVLO_HYST VOUT_OVP+ VOUT_UVP TINT_OTP PPROT VSC_VOUT VSC_VOUTR VSC_VCN Instantaneous powertrain shutdown, detected after tBLANK (VIN_UVLO+) - (VIN_UVLO-) Instantaneous powertrain shutdown, detected after tBLANK (VIN_OVLO+) - (VIN_OVLO-) Instantaneous shutdown, detected after tPROT Instantaneous shutdown, detected after tPROT 26.0 1.9 79.6 1.4 56.0 tSC Short Circuit Recovery Time Overcurrent (IFB) and Input Over/Undervoltage Blanking Time Overtemperature, Output Overvoltage and ENABLE Shutdown Response Time (Hardware) tSCR Short circuit fault detected after VSC_VOUT and VSC_VCN thresholds persist for this time Excludes tOFF tBLANK 88.8 2.1 60.1 12 125 200 VSC_VCNR Short Circuit Timeout 2.4 50 tPROT 120 150 2 s s Powertrain Supervisory Limits Input Undervoltage Turn-ON (Supervisory) Input Undervoltage Turn-OFF (Supervisory) Input Undervoltage Hysteresis (Supervisory) Input Overvoltage Turn-ON (Supervisory) Input Overvoltage Turn-OFF (Supervisory) Input Overvoltage Hysteresis (Supervisory) Undertemperature Shutdown Setpoint (Supervisory) Supervisory Limit Response Time VIN_UVLO+_SUPV VIN_UVLO-_SUPV 33.8 Powertrain shutdown, detected after tLIM_SUPV VUVLO_HYST_SUPV (VIN_UVLO+_SUPV) - (VIN_UVLO-_SUPV) VIN_OVLO-_SUPV VIN_OVLO+_SUPV 31.8 1.6 2.0 75.6 78.8 Powertrain shutdown, detected after tLIM_SUPV VOVLO_HYST_SUPV (VIN_UVLO+_SUPV) - (VIN_UVLO-_SUPV) TINT_UTP 30.5 T Grade M Grade tLIM_SUPV PRMTM Regulator Rev 1.5 vicorpower.com Page 8 of 42 11/2015 800 927.9474 1.2 35.2 V V 2.1 V V 80.3 82.7 V 1.5 1.8 V -40 -55 150 C C s PRM48AH480x200A00 Signal Specifications Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). ENABLE * The ENABLE pin enables and disables the PRM * In PRM array configurations, ENABLE pins should be connected in order to synchronize start up * ENABLE is 5 V with 1.8 mA source capability during normal operation Signal Type State Normal Analog Output Operation Start up Start up Attribute Symbol ENABLE Voltage VENABLE ENABLE Current IENABLE_OP ENABLE Source Current IENABLE_EN Minimum Time to Start tOFF ENABLE ENABLE Standby RENABLE_EXT Resistance (External) Fault Typ Max Unit 4.7 5.0 5.3 V 1.8 mA After tOFF 90 13.0 VENABLE_DIS Disable Threshold ENABLE Digital Output Min VENABLE_EN Enable Threshold Digital Input / Output Conditions / Notes ENABLE Sink Current to SGND IENABLE_FAULT 0.97 A 15.0 17.0 ms 2.5 3.2 V 2.40 Resistance to SGND required V 235 4 mA to disable the PRM ENABLE voltage 1 V or above VAUX: Auxillary Voltage Source * Intended to power auxiliary circuits * 9 V during normal operation with 5 mA source capability Signal Type State Normal Attribute Symbol VAUX Voltage VVAUX VAUX Current IVAUX Conditions / Notes Min Typ Max Unit 8.6 9.0 9.5 V 5 mA 400 mV 0.04 F IOUT = 0A, CVAUX_EXT = 0. Maximum Operation VAUX Voltage Ripple VVAUX_PP Analog Output specification includes powertrain 100 operation in burst mode. VAUX Capacitance Transition (External) VAUX Fault Response Time CVAUX_EXT tFR_VAUX From fault recognition to 30 s VAUX = 1.5 V VC: VTM Control * Pulsed voltage source used to power and synchronize downstream VTM during start up * 14 V, 10 ms typical voltage pulse Signal Type State Attribute VC Voltage Analog Output Start up Symbol VVC_START VC Available Current VC Duration VC Slew Rate IVC_START Conditions / Notes Connected to VTM VC or equivalent, VC = 14 V, VIN > 20 V Max Unit 13 14 18 V 200 7 mA 10 16 ms 0.25 V/s Connected to VTM or equivalent, IVC = 115 mA, CVC = 3.2 uF ENABLE to VC Delay Typ IVC = 115 mA, CVC = 3.2 uF tVC dVC/dt Min tENABLE-VC 0.02 20 PRMTM Regulator Rev 1.5 vicorpower.com Page 9 of 42 11/2015 800 927.9474 s PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). SGND: Signal Ground * All control signals must be referenced to this pin, with the exception of VC * SGND is internally connected to -IN and -OUT Signal Type Analog Input / Output State Any Attribute Maximum Allowable Current Symbol Conditions / Notes ISGND Min Typ -100 Max Unit 100 mA TRIM * TRIM is used to select operating mode and trim the output voltage in Adaptive Loop Operation * Internal pullup to VCC_INT through 10 k resistor * When pulled below 0.45 V during power up, Remote Sense / Slave Operation is selected * When allowed to pull up above 0.55 V during power up, Adaptive Loop Operation is selected * Operating mode is detected during power up and cannot be changed unless input power is cycled Signal Type State Attribute Internally Generated Normal Operation VCC Internal Pullup Resistance to VCC_INT Analog Input Mode Detection Delay Mode Remote Sense Detect Enable Threshold Remote Sense Disable Threshold Symbol Conditions / Notes VCC_INT RTRIM_INT tMODE_DETECT 0.5% tolerance resistor From ENABLE high to mode detected, after VIN first applied Min Typ Max Unit 3.20 3.28 3.36 V 9.83 10.00 10.18 k 100 140 200 s Pull below this value during first VRS_MODE_EN start up after application of power to 0.45 V enable Remote Sense / Slave Operation Pull above this value during first VRS_MODE_DIS start up after application of power to enable Adaptive Loop Operation PRMTM Regulator Rev 1.5 vicorpower.com Page 10 of 42 11/2015 800 927.9474 0.55 V PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). TRIM (Adaptive Loop Operation Only) * Provides dynamic trim control over the PRM output voltage in Adaptive Loop Operation * Sampled prior to every start up to detect if trim is active or inactive * Output voltage is equal to 20 times the voltage at the TRIM pin when applied TRIM voltage is within the active range * Trim state is detected during normal operation and cannot be changed until start up is initiated Signal Type State Attribute Symbol Conditions / Notes Min Start up Trim Enable Threshold VTRIM_EN Trim Disable Threshold VTRIM_DIS Minimum Trim Disable Resistance Trim Capacitance (External) Trim Sample Delay Analog Input TRIM Pin Analog Range TRIM Gain RTRIM_DIS_MIN 3.20 start up to disable trim control to disable trim 10 From ENABLE high to TRIM sampled 100 VTRIM_RANGE See Figure 26 1.00 %ACC_TRIM VOUT Referred Trim Resolution VOUT_RES Trim Latency tTRIM_LAT Trim Bandwidth BWTRIM VOUT / VTRIM, Vout accuracy, exclusive of 140 0.5 external resistor tolerance 100 pF 200 s 2.75 V V/V 2.0 200 60 -3dB point PRMTM Regulator Rev 1.5 vicorpower.com Page 11 of 42 11/2015 800 927.9474 V M 20 VTRIM applied within active range Unit V Pull above this value during Minimum TRIM resistance required Max 3.10 tENABLE_TRIM GTRIM Trim Accuracy start up to enable trim control Typ CTRIM_EXT Normal Operation Pull below this value during 120 1.2 % mV 240 s kHz PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). AL: Adaptive Loop (Adaptive Loop Operation Only) * Provides Adaptive Loop load line programming in Adaptive Loop Operation * Internal pullup to VCC_INT through 10 k resistor * Sampled prior to every start up to detect if Adaptive Loop load line is active or inactive * Leave open to disable Adaptive Loop load line * Not used in Remote Sense Operation Signal Type State Attribute Symbol Conditions / Notes Start up AL Enable Threshold VAL_EN AL Disable Threshold VAL_DIS Minimum AL Disable Resistance AL Capacitance (External) AL Sample Delay Internally generated Analog Input VCC Internal Pullup Resistance to VCC_INT Normal Operation AL Pin Analog Range AL Gain RAL_DIS_MIN tENABLE_AL Referred Compensation Typ to disable AL load line From ENABLE high to AL sampled RAL_INT 0.5% tolerance resistor VAL_RANGE 3.20 10 AL Latency tAL_LAT AL Bandwidth BWAL M 100 pF 140 200 s 3.20 3.28 3.36 V 9.83 10.00 10.18 k 0 Positive correction slope, VT inactive 3.10 1.0 Full load slope accuracy exclusive 0.5 of external resistor tolerance 2.0 3 Maximum increase from no load setpoint, VOUT 55.0 V 60 -3dB point PRMTM Regulator Rev 1.5 vicorpower.com Page 12 of 42 11/2015 800 927.9474 V 100 LLAL_RES VOUT_AL_MAX Unit V to disable AL load line Minimum AL resistance required Max 3.10 Pull above this value during start up VCC_INT AL Load Line Accuracy %ACC_LL_AL Maximum Output to enable AL load line Min CAL_EXT GAL AL Load Line Resolution Pull below this value during start up 120 1.2 V /V % m 5 V 240 s kHz PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). VT: VTM Temperature (Adaptive Loop Operation Only) * VTM temperature compensation for Adaptive Loop regulation * Adjusts the slope of the Adaptive Loop load line to account for changes in VTM output resistance over temperature * Connect to TM pin of compatible downstream VTM to enable temperature compensation * Leave disconnected to disable temperature compensation Signal Type State Attribute Symbol Conditions / Notes Min Internal Resistance to SGND VT Enable Threshold VT Disable Threshold VT Disable Default Analog Input Normal Operation Temperature VT Analog Range VT Temperature Coefficient RVT_INT VVT_DIS TVT_DIS temperature compensation TCVT_RES VT Latency tVT_LAT Bandwidth BWVT 2.18 VT within active range, referenced to 2.98 V VTM TM voltage applied, .01V/K, referenced to 25C VTM TM voltage applied, .01V/K VREF REF to VOUT Normal Operation Analog Output GREF_VOUT Scale Factor REF Resistance (External) REF Capacitance (External) REF Voltage Ripple -3dB point ENABLE to REF Delay Transition VAUX to REF Delay 3.98 30 %/V 0.3 %/C 120 Typ tVAUX_REF s kHz Max Unit 2.4 V VOUT / VREF 20 V/V 10 M CREF_EXT tENABLE_REF C 240 1.5 Min V VOUT = 48.0 V, trim inactive RREF_EXT VREF_PP C 0.4 60 V V 25 when VT disabled REF: Reference (Adaptive Loop Operation Only) * Functions as REF pin in Adaptive Loop Operation * REF represents the internal voltage reference for the voltage control circuit * VOUT approximately equal to 20 times REF voltage Signal Type State Attribute Symbol Conditions / Notes REF Voltage 1.9 Default AL temperature setting Unit k 2.1 Pull below this value to disable VT VVT_OP TCVT Max 80.0 VVT_EN TCVT VT Resolution Typ 200 pF Includes burst mode, 20 MHz BW 25 mV ENABLE low to REF low 120 s 1 ms VAUX = 8.1 V to REF soft start ramp initiated PRMTM Regulator Rev 1.5 vicorpower.com Page 13 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). REF_EN: Reference Enable (Remote Sense and Slave Operation Only) * Functions as REF_EN pin in Remote Sense and Slave Operation * REF_EN signals successful start up and powertrain ready to operate * Intended to power and enable the external feedback circuit reference in Remote Sense Operation * 3.25 V, 4 mA regulated voltage source Signal Type State Attribute Symbol Conditions / Notes Min REF_EN Voltage REF_EN Source Normal Operation Analog Output Impedance REF_EN Current REF_EN Capacitance (External) REF_EN Voltage Ripple ENABLE to REF_EN Transition Delay VAUX to REF_EN Delay Typ Max Unit 3.25 3.37 V 50 100 IREF_EN 4 mA CREF_EN_EXT 0.1 F VREF_EN REF_EN unloaded ROUT_REF_EN VREF_EN_PP Includes burst mode, 20 MHz BW 25 mV tENABLE_REF_EN ENABLE low to REF_EN low 120 s tVAUX_REF_EN VAUX = 8.1 V to REF_EN high 1 ms Share (Adaptive Loop and Slave Operation Only) * Functions as SHARE pin in master slave array configuration * Current share bus for array operation (master/slave scheme) * Sources current and provides SHARE signal in master operation * Sinks constant current when externally driven in active range (Slave Operation) Signal Type State Attribute Symbol Conditions / Notes SHARE Voltage Standalone/ Analog Output Master Operation Active Range SHARE Available Current SHARE Resistance to SGND Analog Input Slave Operation SHARE Sink Current 2.72 VSHARE ISHARE Min 0.79 VSHARE > 0.79 V Max Unit 7.40 V 2.5 RSHARE ISHARE_SINK Typ mA 93.3 VSHARE > 0.79 V PRMTM Regulator Rev 1.5 vicorpower.com Page 14 of 42 11/2015 800 927.9474 0.25 0.50 k 0.75 mA PRM48AH480x200A00 Signal Specifications (cont.) Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). Control Node (Remote Sense Operation Only) * Functions as CONTROL NODE pin in Remote Sense Operation * Modulator control node voltage sets power train timing * Driven by external error amplifier in Remote Sense Operation * Sinks constant current when externally driven in active range * Sources current, and clamps voltage to 0.79 V when pulled below active range Signal Type State Attribute Symbol Conditions / Notes CONTROL NODE Voltage Active Range CONTROL NODE Analog Input Normal Operation Source Current CONTROL NODE Sink Current CONTROL NODE Resistance to SGND VCN Min Typ 0.79 ICN_LOW VCN < 0.79 V ICN_SINK VCN > 0.79 V 0.25 RCN 0.50 Max Unit 7.40 V 2.5 mA 0.75 mA 93.3 k IFB: Current Feedback (Remote Sense Operation Only) * Functions as IFB pin in Remote Sense Operation * A voltage proportional to the PRM output current must be supplied externally to the IFB pin in order for the device to properly protect overcurrent events and to enable output current limit (clamp) * Overcurrent protection trip will cause instantaneous powertrain disable, detected after tBLANK * Not used for Adaptive Loop Operation Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit Current Limit (Clamp) Threshold Analog Input Normal Operation VIN = 48.0 V; VOUT = 48.0 V VIFB_IL TINT = 25C Over line, trim, and temperature Not production tested; guaranteed Overcurrent Protection VIFB_OC Threshold by design; TINT = 25C 1.90 2.00 1.85 2.58 2.69 2.10 V 2.15 V 2.80 V 2.82 V 2.17 k Not production tested; guaranteed by design; over line, trim, 2.56 and temperature IFB Input Impedance RIFB Current Limit Bandwidth BWIL 2.09 2.13 2.0 NC: No Connect * Reserved for factory use only * No connections should be made to these pins PRMTM Regulator Rev 1.5 vicorpower.com Page 15 of 42 11/2015 800 927.9474 kHz PRM48AH480x200A00 Functional Block Diagram +IN +OUT Q3 Q1 COUT CIN L -IN -OUT Q2 Q4 PGND Internal VCC Regulator 30.1 k VCC Modulator 2.5 mA Min Error Amplifier 3.3 V Linear Regulator 0.5 mA Voltage Reference 3.3 V SHARE/ CONTROL NODE 1.58 k OTP Enable 10 k VT 10 k 2.1 k ENABLE 10 k 20 k TRIM 0.01 uF NC Control and Monitoring 1000 pF NC Overvoltage Lockout Undervoltage Lockout 10 k 0.01 uF Current Limit 1000 pF Output Short Circuit 35.7 k IN Adaptive Loop SGND SGND PGND PRMTM Regulator Rev 1.5 vicorpower.com Page 16 of 42 11/2015 800 927.9474 SGND REF/ REF_EN 60.4 k 10 k 6800 pF OUT IFB 30.1k 0.01 uF Output Overvoltage Protection AL 57.6 k VAUX VC 2200 pF PRM48AH480x200A00 High Level Functional State Diagram Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles. Application of Vin VIN > UVLO+ STARTUP SEQUENCE STANDBY SEQUENCE tON expired ENABLE: 1.8mA to HIGH VC Pulse REF_EN active ENABLE rising edge ENABLE: 10uA to LOW tOFF expired ENABLE: 90uA to HIGH Adaptive loop and trim modes latched RS mode latched at first ENABLE after Vin applied only Powertrain Stopped ENABLE falling edge, Output OVP, or OTP detected Powertrain Active tSTARTUP_SEQ expired Input OVLO or UVLO, Output UVP, or UTP detected Fault Autorecovery ENABLE falling edge, Output OVP or OTP detected FAULT SEQUENCE Input OVLO or UVLO, Output UVP, or UTP detected ENABLE pulsed: 25mA to LOW Powertrain Stopped SUSTAINED OPERATION ENABLE: 1.8mA to HIGH Powertrain Active Short Circuit detected PRMTM Regulator Rev 1.5 vicorpower.com Page 17 of 42 11/2015 800 927.9474 PRMTM Regulator Rev 1.5 vicorpower.com Page 18 of 42 11/2015 800 927.9474 AL TRIM 2.4V 20V 48V 55V tAUX_REF TRIM Ignored 2 TRIM INACTIVE TRIM and AL pins sampled Soft Start tVC tENABLE_VC tOFF tON Micro controller initialized 1V 0V 1.0V 3.3V 2.75V VAUX VAUX VREF VOUT_MIN OUT_NOM VOUTV VOUT_OVP+ VOUT_MAX VC VVC_START VENABLE_EN ENABLE OUTPUT INPUT ILIMIT VENABLE Iout VSHARE_MIN SHARE REF INPUT VINIT VSHARE_MAX +IN VIN_UVLO VIN_OVLO OUTPUT OUTPUT OUTPUT BIDIR BIDIR BIDIR INPUT 1 INPUT POWER ON AND UV TURN ON AL = 1V 3 AL ACTIVE FirstEnb: TR not low = not RS mode TR high = trim inactive for this enabled period AL not high = AL active for this enabled period Vout increases by VAL * GAL * IOUT tBLANK tBLANK tBLANK 4 INPUT OV tOFF Soft Start 5 INPUT OV RECOVERY TR high = trim inactive for this enabled period AL not high = AL active for this enabled period tPROT tPROT 8 9 FULL LOAD OUTPUT APPLIED OV Current sense activated, and output increase due to AL after tSTARTUP_SEQ expires AL = 1V tSTARTUP_SEQ tON 6 7 ENABLE ENABLE DISABLE RELEASE TR high = trim inactive for this enabled period AL not high = AL active for this enabled period PRM48AH480x200A00 Timing Diagrams (Adaptive Loop Operation) Module Inputs are shown in blue; Module Outputs are shown in brown. PRMTM Regulator Rev 1.5 vicorpower.com Page 19 of 42 11/2015 800 927.9474 ILIMIT VOUT INPUT 1V 3.3V 1V 1V 2.4V 2.75V 20V 48V 55V tBLANK AL pin Ignored VOUT = VTRIM * 20 Micro controller Opera ng Mode ini alized Trim and AL state detected AL TRIM 2.75V 2.4V INPUT 3.3V VAUX OUTPUT VAUX REF VOUT_MIN VOUT_NOM VOUT_MAX VC VVC_START VENABLE_EN ENABLE VENABLE Iout VSHARE_MIN SHARE VSHARE_MAX VINIT VIN_UVLO +IN VIN_OVLO OUTPUT OUTPUT OUTPUT BIDIR BIDIR BIDIR INPUT tSC tSCR+tOFF FirstEnb: TR not low = not RS mode TR not high = trim ac ve for this enabled period AL high = AL inac ve for this enabled period 10 11 12 INPUT POWER ON AL OUTPUT AND UV TURN ON INACTIVE AND SHORT TRIM CIRCUIT ACTIVE tOFF 14 OT SHUTDOWN AND RECOVERY AL ac ve Vout increase due to Iout and AL a!er tSTARTUP_SEQ expires VOUT clamped to 55V for VTRIM > 2.75V tSTARTUP_SEQ 13 ENABLE TOGGLING 15 OUTPUT POWER LIMIT PROTECTION tLIM_SUPV 16 CURRENT LIMIT EVENT tBLANK 17 INPUT POWER OFF AND UV TURN OFF TR high = trim inac ve for this enabled period AL not high = AL ac ve for this enabled period TR high = trim inac ve for this enabled period AL not high = AL ac ve for this enabled period TR not high = trim ac ve for this enabled period AL high = AL inac ve for this enabled period PRM48AH480x200A00 Timing Diagrams (Adaptive Loop Operation) (cont.) Module Inputs are shown in blue; Module Outputs are shown in brown. VINIT VIN_UVLO VENABLE VIFB_IL PRMTM Regulator Rev 1.5 vicorpower.com Page 20 of 42 11/2015 800 927.9474 TRIM VAUX tVC tAUX_REF_EN tOFF tON Micro controller ini alized VAUX VREF_EN REF_EN VOUT VOUT_OVP+ VC VVC_START VENABLE_EN ENABLE IFB VIFB_OC VCN_MIN CONTROL NODE VCN_MAX +IN VIN_OVLO 1 INPUT POWER ON AND UV TURN ON tBLANK tENABLE_REF_EN tBLANK 4 INPUT OV RECOVERY tENABLE_REF_EN tPROT 5 ENABLE DISABLE 6 ENABLE RELEASE tON TRIM ignored for all subsequent start up events un l VIN is removed This blue shaded region is where trim voltage is a don't care. RS opera ng mode is latched. TRIM is ignored un l Vin is removed. t < tBLANK tBLANK 2 3 QUICK OC INPUT OV (t<tBLNK) First Enable: Trim Low = RS mode RS mode detected and latched tENABLE_REF_EN tPROT 8 7 FULL LOAD LOAD RELEASE AND APPLIED OUTPUT OV (SLOW F/B) PRM48AH480x200A00 Timing Diagrams (Remote Sense Operation) Module Inputs are shown in blue; Module Outputs are shown in brown. VENABLE VIFB_IL VIFB_OC PRMTM Regulator Rev 1.5 vicorpower.com Page 21 of 42 11/2015 800 927.9474 tOFF Micro controller ini alized TRIM VAUX VAUX VREF_EN REF_EN VOUT VOUT_OVP+ VC VVC_START VENABLE_EN ENABLE IFB VCN_MIN CONTROL NODE VCN_MAX VINIT VIN_UVLO +IN VIN_OVLO 9 START UP WITH MINIMUM < dVIN/dt < 1.2V/ms <tBLANK tSC 10 OUTPUT SHORT CIRCUIT First Enable: Trim Low = RS mode RS mode detected and latched 12 CURRENT LIMIT EVENT This blue shaded region is where trim voltage is a don't care. RS opera ng mode is latched. TRIM is ignored un l Vin is removed. tSCR+tOFF 11 OUTPUT POWER LIMIT PROTECTION TRIM ignored for all subsequent start up events un l VIN is removed tBLANK 13 INPUT UV PRM48AH480x200A00 Timing Diagrams (Remote Sense Operation) (cont.) Module Inputs are shown in blue; Module Outputs are shown in brown. PRM48AH480x200A00 Typical Performance Characteristics The following figures present typical performance at TC = 25C, unless otherwise noted. See associated figures for general trend data. 3.5 175 3.0 150 2.5 125 2.0 100 1.5 75 1.0 50 0.5 25 0.0 0 45 50 60 55 Output Voltage (V) ! "#$ !"#$# %!"&' Figure 5 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 20.0 V, TCASE = 25C !"#$# %!&##' Figure 2 -- No Load Power Dissipation vs. VIN, module enabled Figure 4 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 20.0 V, TCASE = -40C Power Figure 1 -- DC Safe Operating Area (SOA) Current 40 35 Figure 3 -- No Load Power Dissipation vs. VIN, module disabled Enable = Low Figure 6 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 20.0 V, TCASE = 100C PRMTM Regulator Rev 1.5 vicorpower.com Page 22 of 42 11/2015 800 927.9474 30 %!&'#( 25 !"#$# 20 200 4.0 225 Output Power (W) Output Current (A) 4.5 DC Safe Operating Area PRM48AH480x200A00 Typical Performance Characteristics (cont.) The following figures present typical performance at TC = 25C, unless otherwise noted. See associated figures for general trend data. !"#$% &!'() &!'%%( !""#$ %!&$$' !"#$% Figure 11 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 55.0 V, TCASE = 25C Figure 8 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 48.0 V, TCASE = 25C %!&"' !""#$ Figure 10 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 55.0 V, TCASE = -40C Figure 7 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 48.0 V, TCASE = -40C %!&'$( !""#$ Figure 9 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 48.0 V, TCASE = 100C Figure 12 -- Total efficiency and power dissipation vs. VIN and IOUT VOUT = 55.0 V, TCASE = 100C PRMTM Regulator Rev 1.5 vicorpower.com Page 23 of 42 11/2015 800 927.9474 &!'"%( !"#$% PRM48AH480x200A00 Typical Performance Characteristics (cont.) The following figures present typical performance at TC = 25C, unless otherwise noted. See associated figures for general trend data. Effective Internal Input and Output Capacitance vs. Applied Voltage 4.5 INPUT AND OUTPUT CAPACITANCE 4.0 INPUT CAPACITANCE ONLY 3.5 Effective Capacitance (F) 5.0 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 Applied Voltage (V) Input and Output Capacitance (uF) Fsw (kHz) 1000 12 975 10 950 8 925 6 900 Input Charge (C) 4 875 2 850 0 50 55 60 65 70 75 VOUT: 48 V 10 950 8 925 6 Output Charge (C) 4 875 2 50 55 60 65 70 75 Total Output Charge per Switching Cycle (C) Fsw (kHz) 14 975 45 0 Input Voltage (V) VOUT: 20 V VOUT: 48 V Figure 17 -- Typical SHARE / CONTROL NODE Voltage vs. TCASE and IOUT; VIN = 48.0 V, VOUT = 48.0 V 16 12 40 Switching Frequency (kHz) 35 1000 850 Power Train Switching Frequency and Periodic Output Charge vs. Input Voltage - Full Load 900 Figure 14 -- Typical Power Train Switching Frequency and Periodic Input Charge vs. VIN, VOUT; IOUT = 4.17 A 1025 VOUT: 55 V 1050 Input Voltage (V) VOUT: 20 V 16 14 1025 Figure 16 -- Output Power vs. SHARE / CONTROL NODE Voltage; VIN = 48.0 V, VOUT = 48.0 V, TCASE = 25C Switching Frequency (kHz) Total Input Charge per Switching Cycle (C) 1050 45 Power Train Switching Frequency and Periodic Input Charge vs. Input Voltage - Full Load 40 Input Capacitance Only (uF) Figure 13 -- Effective Internal Input and Output Capacitance vs. Voltage - Ceramic Type 35 VOUT: 55 V Figure 15 -- Typical Power Train Switching Frequency and Periodic Output Charge vs. VIN, VOUT; IOUT = 4.17 A PRMTM Regulator Rev 1.5 vicorpower.com Page 24 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Typical Performance Characteristics (cont.) The following figures present typical performance at TC = 25C, unless otherwise noted. See associated figures for general trend data. DC Modulator Gain and Powertrain Equivalent Resistance vs. Output Current - VOUT = 20 V 8 6 GCN (dB) 160 100 140 60 0 40 -4 0.5 1 1.5 2 2.5 3 3.5 4 80 60 20 0 0 100 40 20 Req () rIN ( ) 2 -2 120 80 Req ( ) GCN (dB) 4 120 Powertrain Equivalent Input Resistance vs. Output Current - VOUT = 20 V 0 4.5 0 0.5 1 1.5 VIN: 36 V VIN: 48 V VIN: 36 V VIN: 75 V Figure 18 -- Powertrain Characteristics vs. IOUT, VIN Resistive Load, VOUT = 20.0 V 6 350 60 4 300 50 250 0 200 -2 150 -4 -6 -8 1.5 2 2.5 3 VIN: 48 V 3.5 4 10 0 0 4.5 VIN: 48 V 0 0.5 1 1.5 VIN: 36 V VIN: 75 V 4 400 2 350 GCN (dB) -4 200 -6 150 -8 50 -12 0 2.5 VIN: 48 V 3.5 4 4.5 3 VIN: 48 V VIN: 75 V Powertrain Equivalent Input Resistance vs. Output Current - VOUT = 55 V 50 40 30 20 3.5 4 10 0 0 0.5 Load Current (A) VIN: 36 V 3 100 Req () -10 60 rIN ( ) 250 2 2.5 300 -2 1.5 2 Figure 22 -- Magnitude of powertrain dynamic input impedance vs. IOUT; VIN; VOUT = 48.0 V Req ( ) GCN (dB) 0 1 VIN: 75 V Load Current (A) DC Modulator Gain and Powertrain Equivalent Resistance vs. Output Current - VOUT = 55 V 0.5 4.5 30 50 Figure 19 -- Powertrain Characteristics vs. IOUT, VIN Resistive Load, VOUT = 48.0 V 0 4 Powertrain Equivalent Input Resistance vs. Output Current - VOUT = 48 V Load Current (A) VIN: 36 V 3.5 20 100 Req () 1 3 40 rIN ( ) GCN (dB) Req ( ) GCN (dB) 2 0.5 2.5 Figure 21 -- Magnitude of powertrain dynamic input impedance vs. IOUT; VIN; VOUT = 20.0 V DC Modulator Gain and Powertrain Equivalent Resistance vs. Output Current - VOUT = 48 V 0 2 Load Current (A) Load Current (A) 1 1.5 2 2.5 3 3.5 4 Load Current (A) VIN: 36 V VIN: 75 V Figure 20 -- Powertrain Characteristics vs. IOUT, VIN Resistive Load, VOUT = 55.0 V VIN: 48 V VIN: 75 V Figure 23 -- Magnitude of powertrain dynamic input impedance vs. IOUT; VIN; VOUT = 55.0 V PRMTM Regulator Rev 1.5 vicorpower.com Page 25 of 42 11/2015 800 927.9474 PRM48AH480x200A00 General Characteristics Specifications apply over all line and load conditions, TINT = 25C and output voltage from 20.0 V to 55.0 V, unless otherwise noted. Boldface specifications apply over the temperature range of -40C < TINT < 125C (T-grade). Attribute Symbol Conditions / Notes Min Typ Max Unit 21.8 22.0 22.3 mm (0.86) (0.87) (0.88) in 16.3 16.5 16.8 mm (0.64) (0.65) (0.66) in 6.48 6.73 6.98 mm (0.255) (0.265) (0.275) Mechanical Length Width Height L W H Volume Vol Weight W No Heatsink Lead Finish in 2.44 cm3 (0.15) in3 7 g Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.050 -40 -55 125 125 m Thermal Operating Internal Temperature Thermal Impedance Thermal Capacity T Grade M Grade TINT INT-CASE INT-LEAD 2 9 5 C C C/W C/W Ws / C Assembly Peak Compressive Force Applied to Case (Z-axis) Storage Temperature ESD Rating TST HBM CDM Peak Temperature During Reflow T Grade M Grade Method per Human Body Model Test ESDA/JEDEC JDS-001-2012 Charged Device Model JESD22-C101E CLASS 1C Controlled MIL-HDBK-217 Plus Parts Count - 25C Ground Benign, Stationary, Indoors / Computer Profile CTUVUS V 245 C 90 2.0 3.0 s C / s C / s 5.28 MHrs 5.29 MHrs CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable PRMTM Regulator Rev 1.5 vicorpower.com Page 26 of 42 11/2015 800 927.9474 lbs lbs / in2 C C CLASS 2 60 1.5 2.5 Reliability and General Agency Approvals Telcordia Issue 2 - Method I Case 1; Ground Benign, Agency Approvals / Standards -40 -65 Soldering MSL 4 (Datecode 1528 and later) Maximum Time Above 217 C Peak Heating Rate During Reflow Peak Cooling Rate Post Reflow MTBF 3 5.3 125 125 Supported by J-Lead only PRM48AH480x200A00 Pin Functions If TRIM is permitted to pull up to 3.20 V or higher during start up, trim is disabled, and the output is set to the nominal of 48.0 V. +IN, -IN Input power pins If TRIM is held between 1.00 V to 2.75 V during start up, trim is enabled, and the output is scaled by a factor of 20 resulting in an output voltage range of 20.0 V to 55.0 V. +OUT, -OUT Output power pins. Module cannot sink current. This selection persists until the PRM is restarted with the ENABLE pin, or due to fault auto-recovery. ENABLE This pin turns the supply on and off. The pin is both an input and an output and can provide the following features: AL: Adaptive Loop (Adaptive Loop Operation) This input pin allows you to set the Adaptive Loop load line. Every volt on this pin represents 1.0 of positive output slope. There is an internal 10 k pullup resistor to VCC_INT. If AL is permitted to pull up to 3.20 V or higher during start up, the Adaptive Loop load line is disabled. n n Delayed Start: upon application of voltage (>UVLO) to the module power input and after toff, the ENABLE pin will source a constant 90 A current. Output enable: When ENABLE is allowed to pull up above the enable threshold, the ENABLE pin will pull up to 5 V with 1.8 mA source capability, and the module will be enabled. This selection persists until the PRM is restarted with the ENABLE pin, or due to fault auto-recovery. Output disable: ENABLE may be pulled down externally in order to disable the module. Pull down resistance should be less than 235 to SGND. ENABLE control should be implemented using an open collector configuration. It is not recommended to drive this pin externally. VT: VTM Temperature (Adaptive Loop Operation) This pin is used in the Adaptive Loop compensation algorithm to account for the VTM output resistance variation as a function of temperature. The VTM TM pin provides this voltage, scaled as the temperature in K (Kelvin) divided by 100, so 25C is 2.98 V. Leave disconnected or pull below 1.9 V to disable. The adjustment is fixed at 0.3%/C relative to the value at 25C VAUX: Auxiliary Voltage Source Use this pin to power external devices with a non-isolated 9 V supply, with up to 5 mA load capability, switched with ENABLE input. Do not place a capacitor over 0.04 F on this pin. REF: Reference (Adaptive Loop Operation) This output pin allows you to monitor the internal reference voltage in Adaptive Loop Operation. During normal operation it represents the output voltage scaled by a factor of 20. n n Fault detection flag: The ENABLE 5 V voltage source is internally turned off when a fault condition is detected. SGND: Signal Ground This is a low current pin which provides a Kelvin connection to the PRMs internal signal ground. Use this pin as the ground reference for external circuitry and signals to avoid voltage drops caused by high currents on power returns. In array configurations, SGND pins should be star connected at a single point. A series resistor (~1) to the star location is recommended to decouple return currents. VC: VTM Control This output pin is used to temporarily provide VCC voltage to connected VTMs during start up. The pulse is nominally 14 V, 10 ms wide. A VTM can self-power once its input voltage reaches its minimum specified input voltage. The PRM output must be checked to make sure it reaches this threshold voltage before the VC pulse expires. TRIM The TRIM pin is used to select the operating mode and to trim the PRM output when Adaptive Loop operating mode is selected. The TRIM pin has an internal pull-up to VCC_INT through a 10 k resistor. Operating Mode Select: If TRIM is pulled below 0.45 V during the first startup after VIN is applied, Remote Sense / Slave operation is selected. Otherwise, Adaptive Loop operation is selected. This selection persists until VIN is removed from the part, and is not changed by fault or disable events. Output Voltage Trim: Sets the output voltage of the PRM in Adaptive Loop operation. In Adaptive Loop Operation this pin is for monitoring purposes only and should not be driven or loaded externally. REF_EN: Reference Enable (Remote Sense Operation) In Remote Sense Operation this pin outputs a regulated 3.25 V, 4 mA voltage source. It is enabled only after successful start up of the PRM powertrain. REF_EN is intended to power the output current transducer and also the voltage reference for the external control loop. Powering the reference generator with REF_EN helps provide a controlled start up, since the output voltage of the system is able to track the reference level as it comes up. SHARE (Adaptive Loop and Slave Operation) This bus sets the output current level for all the PRM modules when operating in an array (master-slave configuration). Connect them together among the modules in the shared bus. One PRM should be configured as a master by connecting TRIM for Adaptive Loop Operation. All other PRMs should be configured as slaves by pulling their respective TRIM pins low. This pin can be used to monitor the error voltage externally. 0 to 100% load is represented by a voltage between 0.79 V and 7.40 V. CONTROL NODE (Remote Sense Operation) In Remote Sense Operation, this is the input to the modulator which determines the powertrain timing and ultimately the module output power. An internal 0.5 mA current sink is always active. The bidirectional buffer between CONTROL NODE and the modulator has two states. In normal operation, CONTROL NODE will be above the 0.79 V switching threshold, and will drive the modulator through the buffer. An internal 7.40 V clamp determines the maximum output power that can be requested of the modulator. PRMTM Regulator Rev 1.5 vicorpower.com Page 27 of 42 11/2015 800 927.9474 PRM48AH480x200A00 When CONTROL NODE falls below 0.79 V, the converter will stop switching. An internal circuit clamps the modulator input to 7.40 V, and a buffer will source up to 2.5 mA out of the pin at that clamp level. For this reason, the output impedance of the amplifier driving CONTROL NODE must be taken into account. A rail-to-rail operational amplifier with low output impedance is always recommended. rEQ_IN CIN_INT CONTROL NODE + + rEQ_OUT RCN ICN_LOW Output VCN * GCN VCN The PRM48AH480x200A00 regulator is specifically designed to provide a controlled Factorized Bus distribution voltage for powering downstream VTM Transformer -- fast, efficient, isolated, low noise Point-of-Load (POL) converters. The PRM48AH480x200A00 can be configured for two operating modes depending on the type of regulation required. In Adaptive Loop Operation the regulation circuitry is enabled within the device and regulates the voltage at the output terminals. The PRM48AH480x200A00 has a programmable Adaptive Loop load line which can be used to compensate for downstream VTM output resistance allowing for precise point of load regulation without the need for remote sensing. + VIN Design Guidelines COUT_INT - - In Remote Sense Operation, the internal regulation circuitry is disabled and the voltage regulation circuitry is provided externally allowing for remote sensing directly at the point of load. In certain applications Remote Sense Operation can improve regulation accuracy, and allow for operating with high amounts of load capacitance and optimizing load transient response. Figure 24 -- PRM48AH480x200A00 AC small signal model The powertrain small signal (plant) response consists of a single pole determined by the load resistance, the powertrain equivalent output resistance, and the total output capacitance (internal and external to the module). Both the modulator gain and the equivalent output resistance vary as a function of line, load and output voltage. As the load increases, the powertrain pole moves to higher frequency. As a result, the closed loop crossover frequency will be the highest at full load and lowest at minimum load. Figure 24 shows a reference AC small-signal model. IFB: Current Feedback (Remote Sense Operation) In Remote Sense Operation, IFB is the input for the module output overcurrent protection and current limit features. A voltage proportional to the powertrain output current must be applied to IFB in order for overcurrent protection to operate properly. If the IFB voltage exceeds the IFB pin's overcurrent protection threshold, the powertrain will stop switching. If the IFB voltage falls below the overcurrent protection threshold within tBLANK time, then the powertrain will immediately resume switching. Otherwise a fault is detected. The current limit threshold for the IFB pin is set lower than the protection threshold. When the IFB pin average voltage exceeds the current limit threshold, an internal integrator will activate a clamp amplifier which overrides the modulator input maximum level. This causes the powertrain to maintain a constant output current. The bandwidth of this current limit integrator is significantly slower than that of the CONTROL NODE input. Therefore this current limit cannot be used in lieu of properly compensating the (external) control loop to avoid exceeding maximum current or power ratings for the device. Operating Mode Selection The operating mode is selected through use of the TRIM pin. When the part is first enabled after VIN is applied, the TRIM voltage is sampled. The TRIM pin has an internal pull up resistor to VCC_INT, so unless external circuitry pulls the pin voltage lower, it will float up to VCC_INT. If TRIM is pulled lower than 0.45 V during the first startup after VIN is applied, the part will be configured for Remote Sense / Slave Operation, where the internal voltage regulation circuitry is disabled. In this case, for all subsequent operation the part will output a voltage dependent on the SHARE / CONTROL NODE voltage provided externally (either from an external regulation circuit or master PRM). To configure the part for Remote Sense or Slave Operation, connect the TRIM pin to SGND. It is recommended to make this connection through a 0 jumper for troubleshooting purposes. If the sampled TRIM voltage is higher than 0.55 V during the first startup after VIN is applied, then the part will be configured for Adaptive Loop Operation, and the internal voltage regulation circuitry is enabled. The PRM will output a voltage dependent on the TRIM voltage, and will remain in this mode for as long as VIN is applied. To configure the part for Adaptive Loop Operation, leave the TRIM pin disconnected, or apply a voltage/resistance within the specified range. The operating mode is detected during the first start up after VIN is applied. This selection persists until VIN is removed from the part, and is not changed by fault or disable events. Changing the operating mode can only be done by removing VIN. PRMTM Regulator Rev 1.5 vicorpower.com Page 28 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Design Guidelines (Adaptive Loop Operation) The TRIM pin is pulled up internally to VCC_INT thorough a 10 k resistor. VTRIM can be actively set with a DAC that is ground referenced to SGND. VTRIM can be passively set by connecting a resistor, RTRIM, from TRIM to SGND such that the voltage divider made with VCC_INT and the 10 k pull up yields the desired VTRIM. The formula for calculating this resistor is provided in Equation (1a). In Adaptive Loop Operation, the internal voltage control circuitry is enabled and the voltage at the output terminals is regulated. The part is nominally set to provide a fixed 48.0 V output, and the TRIM pin can be used to adjust the output over the range of 20.0 V to 55.0 V. When used with a VTM, the AL pin provides ability to program an Adaptive Loop load line to compensate for the output resistance (ROUT) of a downstream VTM, while the VT pin provides temperature compensation to account for changes in the VTM ROUT over temperature. VOUT = VTRIM * 20 R TRIM = (1) 10 kuVTRIM 10 kuVOUT_SET = VCC <VTRIM 20 uVCC <VOUT_SET INT Trim Mode and Output Trim Control (Adaptive Loop Operation) In Adaptive Loop Operation, during any start up and after ENABLE transitions high, the TRIM pin voltage is sampled to determine if trim is active or inactive. If the sampled TRIM voltage is higher than 3.20 V then the PRM will disable trim. In this case, for all subsequent operation the output voltage will be programmed to the nominal output of 48.0 V and the TRIM pin will be ignored during normal operation. (1a) INT For 1.00 V VTRIM 2.75 V where VOUT_SET is the desired output voltage. The output voltage transfer function saturates for applied TRIM voltages above approximately 2.75 V as illustrated in Figure 26 to prevent the output from being driven above its rated output voltage. When TRIM is set lower than 1.00 V the output voltage is not specified and stable operation is not guaranteed. If the sampled TRIM voltage is between 1.00 V and 2.75 V then the PRM will activate trim mode and it will remain in this mode as long as the PRM is operating. PRM VOUT vs. VTRIM This selection persists until the PRM is restarted with the ENABLE pin, or due to fault auto-recovery. 60 Output Voltage (V) Recommended Range VCCINT 10 K 50 50 40 40 30 30 20 20 10 TRIM VTRIM 0 Micro Controller 10 Unspecified Operaon TRIM Pin Resistor (K) 60 0 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 TRIM Pin Voltage (V) SGND Output Voltage (V) RTRIM TRIM Pin Resistor (K) Figure 26 -- PRM VOUT vs. VTRIM SGND SGND When trim is enabled the voltage at this pin is sampled at 120 s intervals to determine the trim level. The output can be dynamically trimmed during normal operation, however it is not recommended to use this pin in an external analog feedback loop. Figure 25 -- TRIM Connection The output as a function of VTRIM is defined by equation (1) for 1.00 V VTRIM 2.75 V, and allows for an output voltage ranging from 20.0 V to 55.0 V. Refer to Table 1 for a summary of the TRIM pin functionality and the recommended voltage/resistance that should be applied to this pin. Trim Pin Function Summary Operating State VTRIM RTRIM Remote Sense / Slave Operation <0.45 V <1 k Adaptive Loop Operation >0.55 V [2] >3 k [2] 1.00 V to 2.75 V 4.32 k to 49.9 k Adaptive Loop Operation Trim Active VOUT = 20* VTRIM Trim Mode Trim Inactive VOUT = 48.0 V >3.20 V >10 M Table 1 -- TRIM Pin Function Summary [2] It is not recommended to configure TRIM with a voltage less than 1.00 V in Adaptive Loop Operation PRMTM Regulator Rev 1.5 vicorpower.com Page 29 of 42 11/2015 800 927.9474 Detected and Latched At application of VIN when ENABLE first transitions high At application of VIN when ENABLE first transitions high At every start up when ENABLE transitions high PRM48AH480x200A00 Adaptive Loop Compensation (Adaptive Loop Operation) A factorized power system naturally has a DC load line associated with it since the regulator stage (PRM) is positioned before the isolation and voltage transformation stage (VTM) Consider for a moment a factorized power system that has the following parameters: PRM and VTM Output Voltage Adaptive Loop Comensation Example Output Voltage %Difference From Nominal (%) 3 n VF = 40 V n KVTM=1/4 n ROUT_VTM =10 mohm @ 25C At no load the output voltage at the load will be equal to 10 V (VF * KVTM). With increasing load current, the output voltage at the load will drop at a rate proportional to the VTMs ROUT. It should be noted that the ROUT has a positive temperature coefficient and so the DC load line changes with temperature. Incre with Compensated VTM Output 0 Unc Decre omensa ted V ases TM with Load Output due to R -1 Adaptive Loop compensation brings output into regulation OUT 0 20 40 60 80 VTM VOUT (Uncompensated) PRM VOUT VTM VOUT (Regulated) Figure 27 -- Adaptive Loop Compensation Illustration For our hypothetical VTM from above (with KVTM = 1/4 and ROUT_VTM = 10 m) the output resistance reflected over to the input would be equal to 160 m. For this example, RLL_AL should be set to -160 m to approximately cancel at 25C the inherent load line from the VTM. RLL_AL is set by the voltage difference between the AL pin and SGND pin, VAL, per the following formula: RLL_AL = VAL * (-1.0) /V (3) VAL 3.10 V Where VAL is the voltage on the AL pin VAL is sampled by a 10-bit ADC, whose input is connected to VCC_INT through a 10 k pull up resistor. This pull up disables the AL engine when the AL pin is left open. VAL can be actively set with a DAC that is ground referenced to SGND. VAL can be passively set by connecting a resistor, RAL, from AL to SGND such that the voltage divider made with VCC_INT and the 10 k pull up yields the desired VAL. The formula for calculating this resistor is provided in Equation (4). (2) VTM Where ROUT_VTM is the VTM output resistance at 25C KVTM is the VTM transformer ratio VIN/VOUT RAL = 10 k VAL (4) VCC_INT - VAL PRM ENABLE VAUX ON/OFF CONTROL SGND RTRIM RAL VTM REF/ REF_EN TRIM AL VT SHARE/ CONTROL NODE VC Adaptive Loop Temperature Feedback VTM Start Up Pulse VOUT +OUT TM VC PC IFB COUT SGND Vin +IN +OUT -IN -OUT VF: 20 V to 55 V CIN SGND 100 Load Current (%) Setting the Adaptive Loop Load Line (Adaptive Loop Operation) To determine an appropriate value for the compensation slope (RLL_AL) it helps to reflect the VTM's output resistance to the input side of the VTM. A resistance on the output side of the VTM is scaled by the VTMs transformer ratio (KVTM) squared as defined by equation (2): 2 ases 1 -3 If the presence of this load line is undesirable, the load line can be eliminated by way of the PRMs Adaptive Loop (AL) engine. The AL engine measures the output current of the PRM and accordingly increases the output voltage of the PRM in order to regulate the PRMs output resistance to a fixed negative resistance, RLL_AL, settable by way of the AL pin. RLL_AL should be sized to exactly cancel the ROUT of the VTM at 25C. The AL engine is also able to account for the positive temperature coefficient of ROUT by way of its VT pin which will be explained shortly. (K 1 ) TM R OUT ut rV Outp ate fo PRM ompens to c Load -2 If the presence of this load line is acceptable for your application, then the PRM can be configured by way of the TRIM pin alone. Please refer to the Trimming the Output Voltage section for details. In this case both the AL and VT pins should be left open. RLLAL = ROUT_REFL =ROUT_VTM_25C * 2 LF +IN CF -OUT -IN PRIMARY GND SECONDARY ISOLATION BOUNDRY SGND Figure 28 -- PRM-VTM Adaptive Loop Example PRMTM Regulator Rev 1.5 vicorpower.com Page 30 of 42 11/2015 800 927.9474 SEC_GND PRM48AH480x200A00 VCCINT VCCINT 10 K 20 K AL 2.18 V to 3.98 V (-55C to 125C) VT VTM TM Micro Controller VAL 60.4k Micro Controller SGND SGND RAL SGND SGND SGND Figure 29 -- AL Connections Figure 30 -- VT Connections This selection persists until the PRM is restarted with the ENABLE pin, or due to fault auto-recovery. When AL is enabled, the voltage at this pin is sampled at 120 s intervals to determine the load line. The load line can be adjusted during normal operation, however it is not recommended to use this pin in an external analog feedback loop. PRM and VTM Output Voltage Adaptive Loop With Temperature Compensation 3 Output Voltage %Difference From Nominal (%) Similar to TRIM, AL is sampled during every start up to determine if the Adaptive Loop load line is enabled or disabled. If the AL pin is allowed to pull up to 3.20 V or higher during start up, then the PRM will disable the Adaptive Loop load line as long as the PRM remains operating. In this case, for all subsequent operation the output voltage will be remain at the set voltage, and the AL pin will be ignored. 2 PRM OT ut H Outp utput PRM O PRM NT MBIE ut A Outp COLD Compensation slope increases with temperature based on VT feedback 1 Compensated VTM Output 0 VTM ROUT increases with temperature -1 -2 -3 0 20 40 60 80 100 Load Current (%) Adaptive Loop Temperature Compensation (Adaptive Loop Operation) By connecting the VT pin of the PRM to the VTM's TM pin, the PRM is able to monitor the internal temperature of the VTM. Knowing the VTM's internal temperature and the temperature coefficient of the VTM's ROUT, which is preprogrammed into the PRMs microcontroller, the AL engine is able to scale the nominal value of RLL_AL (set by the AL pin) to track the VTM's ROUT over temperature. In this way the output resistance of the PRM can be tuned to cancel the output resistance of the VTM with the addition of a single resistor across the AL pin and a connection of the VTM's TM pin to the PRMs VT pin. VTM VOUT: -55C (Uncompensated) VTM VOUT: 25C (Uncompensated) VTM VOUT: 100C (Uncompensated) PRM VOUT: -55C (VT = 2.18 V) PRM VOUT: 25C (VT = 2.98 V) PRM VOUT: 100C (VT = 3.73V) VTM VOUT (Regulated) Figure 31 -- Adaptive Loop Temperature Compensation Illustration The discussion thus far only considered the case where the AL engine is used to compensate for the ROUT of the VTM. The AL engine can be more generally used to account for distribution resistances in both the factorized bus and the VTM's output distribution bus. For more information on how to apply the AL engine towards this end please contact Vicor's Applications Engineering department. The VTM TM voltage is equal to the VTM internal sensed temperature in Kelvin divided by 100. For a temperature range of -55C to 125C the TM voltage will range from 2.18 V to 3.98 V. The Adaptive Loop temperature compensation is pre-programed into the internal microcontroller and is 0.3%/C assuming the VT pin is connected to the TM pin of a compatible VTM. Stability Considerations and External Capacitance (Adaptive Loop Operation) In Adaptive Loop Operation, the internal voltage regulation is enabled which has a pre-determined, fixed compensation network. The compensation is designed to be stable over a fixed set of operating and load conditions including load capacitance. The TM pin has an internal pull down to SGND, and temperature compensation is disabled for VT voltages less than 1.9 V. To disable temperature compensation, leave the VT pin unconnected and open circuit. When disabled, the temperature defaults 25C. Besides internal output capacitors, external output capacitors also contribute to the closed loop frequency response, thus should be identified and understood, in order to maintain the control loop stability. This includes capacitance placed directly on the PRM output, as well as capacitance on the output of any downstream VTM (if used) reflected to its input. Figure 32 illustrates the requirements for external capacitors for both the capacitance and ESR value. As shown in Figure 32 (a), the maximum capacitance value of ceramic capacitor is 25 F, and the capacitance of a combination of ceramic and electrotype capacitors needs to be less than 47 F. As shown in Figure 32 (b) and (c), the ESR value of electrotype capacitors needs to be between 0.1 and 1 ; the ESR value of ceramic capacitors needs to be between 2 m and 200 m. PRMTM Regulator Rev 1.5 vicorpower.com Page 31 of 42 11/2015 800 927.9474 PRM48AH480x200A00 CCER (uF) 25 CCER 25 22 ESR (Ohm) 1 CCER + CEL < 47 47 0.1 ESR 1 200 2 0.1 ESREL CEL(uF) Maxium Capacitance limits ESR (Ohm) (b) ESREL requirements 2 ESR 200 ESRCER (c) ESRCER requirements Figure 32 -- Output Capacitance Limits Current Limit (Adaptive Loop Operation) In Adaptive Loop Operation, the current limit is controlled by the internal microcontroller. The current limit approximates a "brickwall" limit where the output current is prevented from crossing the current limit threshold by reducing the output voltage. The current limit threshold is pre-programmed into the internal microcontroller and cannot be changed externally. When the internal sensed current crosses the current limit threshold, the current limit will be activated after the detection time tLIM_SUPV. Once activated, the microcontroller will reduce the error amplifier reference voltage(represented by REF) in order to maintain the output current at the limit value. Current limit is able to reduce the output down to VOUT_UVP, below which the device will shut down do to output under voltage protection. Soft Start Timing and Start up (Adaptive Loop Operation) In Adaptive Loop Operation, the PRM has an internal soft start sequence which is initiated at every start up. This allows the PRM to start into fully discharged load capacitance. The soft start sequence ramps the output by modulating the error amplifier reference voltage (REF). The result is that the PRM output will rise at a controlled rate until the final voltage setpoint is reached. The total ramp time is typically 1.8 ms independent of the output trim level. This soft start ramp time is preprogrammed into the microcontroller and cannot be changed externally. Figure 34 -- PRM Example 100% to 10% Load Transient Response, Adaptive Loop Load Line Disabled When the Adaptive Loop load line is enabled, the voltage will recover to the value determined by the set point and Adaptive Loop load line settings as illustrated in Figure 35. Load Transient Response (Adaptive Loop Operation) In Adaptive Loop Operation, response time is dependent on the internal compensation. When the Adaptive Loop load line is disabled, the PRM output voltage will recover to the initial set value as illustrated in Figure 33 and Figure 34. Figure 35 -- PRM Example 10% to 100% Load Transient Response, Adaptive Loop Load Line Enabled, VAL = 1.20 V Actual response times are model dependent and will change based on the load step magnitude, load capacitance and operating conditions. Figure 33 -- PRM Example 10% to 100% Load Transient Response, Adaptive Loop Load Line Disabled Because the compensation is fixed internally the load transient response cannot be altered for Adaptive Loop Operation. In order to improve the load transient response performance, the part can be configured for Remote Sense Operation with an external voltage control loop optimized for the specific intended operating conditions. Remote Sense Operation is described in the next section. PRMTM Regulator Rev 1.5 vicorpower.com Page 32 of 42 11/2015 800 927.9474 PRM48AH480x200A00 n SHARE pins must be connected together to enable sharing. The Arrays (Adaptive Loop Operation) In Adaptive Loop operation a master-slave configuration is used for arrays. Up to 5 PRMs of the same type may be placed in parallel to expand the power capacity of the system. bandwidth requirements of SHARE are low enough that the bus can be considered a lumped element, rather than a transmission line, and so star connections to the master PRM with stubs, as well as daisy chain connections are permitted. One PRM is designated as the master and contains the active control loop which considers control pin inputs and drives SHARE. The other PRMs listen to SHARE and act as slave powertrains only. The following high-level guidelines must be followed in order for the resultant system to start up and operate properly, and to avoid overstress or exceeding any absolute maximum ratings. n The resistances between slave unit SHARE pins and the master's should be well matched, to avoid introducing additional sharing mismatches. The SHARE bus should not be routed under any PRM. SHARE bus parasitic capacitance to +IN or +OUT should be minimized. n One PRM must be designated as a master through configuring the n SGND of the master PRM is the reference for all control loop TRIM pin voltage within the recommended range. n All other PRMs must be designated as slave PRMs by tying TRIM pins to SGND. It is recommended to make this connection through a 0 jumper for troubleshooting purposes. functions. The SGND pins of each slave PRMs should be connected to the SGND reference node on the board through a 1 resistor. n When operating within an array, the master PRM is rated for full n All PRMs in the array must be powered from a common power power while the slave PRMs are de-rated to the array rated power and current values provided for Slave Operation (POUT_ARRAY,IOUT_ARRAY). The number of PRMs required to achieve a given array capacity must consider these de-ratings to avoid overstressing any PRM in the array. source so that the input voltage to each PRM is the same. The IN pins of all PRMs must be connected together. n An independent fuse for each PRM +IN connection is required to maintain safety certifications (see Fusing section). n An independent inductor for each PRM +IN connection is n Adaptive Loop design procedures above will hold for an array, in recommended when used in an array, to control circulating currents among the PRM inputs and reduce the impact of beat frequencies. general, although some parameters must be scaled against the number of PRMs in the system. Arrays of more than 5 PRMs may be possible through use of external circuitry. Please contact Vicor Applications for assistance with array sizing above 5 units. n Mismatches in both inductance, and resistance from the common power source to each PRM should be minimized. n ENABLE pins must be connected together for start up synchronization and proper fault response of the array. PRM 1 MASTER ENABLE VAUX VTM 1 REF/ REF_EN TRIM VOUT VTM Start Up Pulse AL RTRIM Adaptive Loop Temperature Feedback SHARE/ CONTROL NODE RAL +OUT VC VC VT TM PC IFB COUT SGND 1 VIN F1 +IN LIN 1 +OUT +IN LF 1 CF 1 VF: 20 V to 55 V -IN CIN SGND -OUT -IN -OUT GND PRIMARY SECONDARY SEC_GND GND SHARE Bus ENABLE Bus ISOLATION BOUNDRY SGND 1 PRM 2 SLAVE ENABLE VAUX SGND 2 VTM 2 REF/ REF_EN TRIM AL VC SHARE/ CONTROL NODE VT VTM Start Up Pulse TM PC IFB F2 +IN LIN 2 +OUT +OUT VC +IN LF 2 CF 2 -IN SGND -OUT -OUT -IN PRIMARY GND SECONDARY ISOLATION BOUNDRY 1 SEC_GND SGND 2 SGND 1 Figure 36 -- Adaptive Loop Array Example PRMTM Regulator Rev 1.5 vicorpower.com Page 33 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Design Guidelines (Remote Sense Operation) It is important to apply proper slew rate to the reference voltage rise when the control loop is initially enabled. The recommended range for reference rise time is 1 ms to 9 ms. The lower rise time limit will ensure optimized modulator timing performance during start up, and to allow the current limit feature (through IFB pin) to fully protect the device during power-up. The upper rise time limit is needed to guarantee a sufficient factorized bus voltage is provided to any downstream VTM input before the end of the VC pulse. In Remote Sense Operation, the PRM48AH480x200A00 is an intelligent powertrain module designed to fully exploit external output voltage feedback and current sensing sub-circuits. These two external circuits are illustrated in Figure 36, which shows an example of the PRM in a standalone application with local voltage feedback and high side current sensing. In general, these circuits include a precision voltage reference, an operational amplifier which provides closed loop feedback compensation, and a high side current sense circuit which includes a shunt and current sense IC. Setting the Output Current Limit and Overcurrent Protection Level (Remote Sense Operation) In Remote Sense Operation, the internal current sensing is disabled, and an external current sense amplifier must be implemented to provide feedback to the IFB pin. The following design procedures refer to the circuit shown in Figure 36. The current limit and overcurrent protection set points are linked, and scale together against the current sense shunt, and the gain of the current sense amplifier. The output of the current sense IC provides the IFB voltage which has VIFB_IL and VIFB_OC thresholds for the two functions respectively. The set points are therefore defined by: Setting the Output Voltage Level (Remote Sense Operation) The output voltage setpoint is a function of the voltage reference and the output voltage sense ratio. With reference to Figure 36, R1 and R2 form the output voltage sensing divider which provides the scaled output voltage to the negative input of the error amplifier; a dedicated reference IC provides the reference voltage to the positive input of the error amplifier. Under normal operation, the error amplifier will keep the voltages at the inverting and non-inverting inputs equal, and therefore the output voltage is defined by: R1 R 2 R2 VOUT VREF u VIFB _ IL I IL (6) RS u GCS and (5) I OC Note that the component R1 will also factor into the compensation as described in a later section. VIFB _ OC (7) RS u GCS where GCS is the gain of the current sense amplifier. Voltage Sense and Error Amplifier (Single Ended) C2 C1 RSS REF 3312 PRM ENABLE SGND SGND OUT 10 k GND REF/ REF_EN AL VT SHARE/ CONTROL NODE VC SGND CSS SGND V- VOUT SGND +IN +IN +OUT CIN -IN RS External Current Sense and Feedback -IN R2 Voltage Reference with Soft Start V+ IFB VIN VREF VREF VAUX TRIM ON/OFF CONTROL IN R3 SGND -OUT GND SGND Figure 37 -- Remote Sense Example PRMTM Regulator Rev 1.5 vicorpower.com Page 34 of 42 11/2015 800 927.9474 VOUT COUT R1 PRM48AH480x200A00 Control Loop Compensation Requirements (Remote Sense Operation) In order to properly compensate the control loop, all components which contribute to the closed loop frequency response should be identified and understood. Figure 24 shows the AC small signal model for the module. Modulator DC gain GCN and powertrain equivalent resistance rEQ_OUT are shown. These modeling parameters will support a design cut-off frequency up to 50kHz. Standard Bode analysis should be used for calculating the error amplifier compensation and analyzing the closed loop stability. The recommended stability criteria are as follows: The system poles and zeros of the closed loop can then be defined as follows: n RCOUT _ EXT n 3) Gain Slope = -20dB/decade : The closed loop gain should have a slope of -20dB/decade at the crossover frequency. The compensation characteristics must be selected to meet these stability criteria. Refer to Figure 37 for a local sense, voltage-mode control example based on the configuration in Figure 36. In this example, it is assumed that the maximum crossover frequency (FCMAX) has been selected to occur between B and C. Type-2 compensation (Curve IJKL) is sufficient in this case. n Powertrain equivalent resistance rEQ: See Figures 18, 19, 20 n Internal output capacitance: see Figure 13 FZ1 n In the case of ceramic capacitors, the ESR can be considered low enough to push the associated zero well above the frequency of interest. Applications with high ESR capacitor may require a different type of compensation, or cascade control. RLOAD R3 R1 (8) Compensation Zero: 1 2 u R 3 u C1 (9) Compensation Pole: FP 2 n External output capacitance value rEQ _ OUT u COUT _ INT COUT _ EXT Compensation Mid-Band Gain: The following data must be gathered in order to proceed: n Modulator Gain GCN: See Figures 18, 19, 20 rEQ _ OUT u RLOAD G MB 20 log n RLOAD 1 2 u n rEQ _ OUT u RLOAD rEQ _ OUT Main pole frequency: FP 5 1) Phase Margin > 45: for the closed loop response, the phase should be greater than 45 where the gain crosses 0 dB. 2) Gain Margin > 10dB : The closed loop gain should be lower than 10dB where the phase crosses 0. Powertrain pole, assuming the external capacitor ESR can be neglected: 1 R3 u C1 u C2 2 u C1 C2 and for FP2>>FZ1 (C1 + C2 C1): FP 2 5 1 2/ u R3 u C2 (10) Open Loop Gain vs. Frequency 80 Gain (dB) 60 40 20 I Application's op-amo GBW Compensation Gain F E PRM Open Loop Min Load B A PRM Open Loop Max Load J K FCMIN 0 FCMAX L -20 C G -40 Frequency, Log scale (y-intercept is application specific) Figure 38 -- Reference asymptotic Bode plot for the considered system PRMTM Regulator Rev 1.5 vicorpower.com Page 35 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Midband Gain Design: R1, R3 (Remote Sense Operation) With reference to Figure 37: curve ABC is the: n minimum output voltage in the application n maximum input voltage expected in the application n maximum load PRM open loop response, and is where the maximum crossover frequency occurs. In order for the maximum crossover frequency to occur at the design choice FCMAX, the compensation gain must be equal and opposite of the powertrain gain at this frequency. For stability purposes, the compensation should be in the Mid-band (J-K) at the crossover. Using Equation (8), the mid-band gain can be selected appropriately. Compensation Zero Design :C1 (Remote Sense Operation) With reference to Figure 37: curve EFG is the: n maximum output voltage in the application n minimum input voltage expected in the application n minimum load in the application PRM open loop response, and is where the minimum crossover frequency FCMIN occurs. Based on stability criteria, the compensation must be in the mid-band at the minimum crossover frequency, therefore FCMIN will occur where EFG is equal and opposite of GMB. C1 can be selected using Equation (9) so that FZ1 occurs prior to FCMIN. High Frequency Pole Design: C2 (Remote Sense Operation): Using Equation (10), C2 should be selected so that FP2 is at least one decade above FCMAX and prior to the gain bandwidth product of the operational amplifier (10MHz for this example). For applications with a higher desired crossover frequency the use of a high gain bandwidth product amplifier may be necessary to ensure that the real pole can be set at least one decade above the maximum crossover frequency. PRMTM Regulator Rev 1.5 vicorpower.com Page 36 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Arrays (Remote Sense Operation) In Remote Sense Operation up to 10 PRMs of the same type may be placed in parallel to expand the power capacity of the system. All PRMs within the array are configured for Remote Sense Operation and are driven by an external control circuit which considers the control inputs and drives the CONTROL NODE bus. The following high-level guidelines must be followed in order for the resultant system to start up and operate properly, and to avoid overstress or exceeding any absolute maximum ratings. n n n All PRMs must be configured for Remote Sense Operation by n n n n n n n n tying TRIM pins to SGND. It is recommended to make this connection through a 0 jumper for troubleshooting purposes. All PRMs in the array must be powered from a common power source so that the input voltage to each PRM is the same. An independent fuse for each PRM +IN connection is required to maintain safety certifications (see Fusing section). An independent inductor for each PRM +IN connection is recommended when used in an array, to control circulating currents among the PRM inputs and reduce the impact of beat frequencies. Mismatches in both inductance, and resistance from the common power source to each PRM should be minimized. ENABLE pins must be connected together for start up synchronization and proper fault response of the array. Reference supply to the control loop voltage reference and current sense circuitry must be enabled when all modules' REF_EN pins have reached their operational voltage levels. A single external control circuit must be implemented as n n n n described in the Remote Sense Operation design guidelines. The control circuit should drive the CONTROL NODE bus. CONTROL NODE pins must be connected together to enable sharing. The bandwidth requirements of CONTROL NODE are low enough that the bus can be considered a lumped element, rather than a transmission line, and so star connections as well as daisy chain connections are permitted. Each PRM must have its own local current shunt and current sense circuitry to drive its IFB pin. The resistances between CONTROL NODE pins should be well matched, to avoid introducing additional sharing mismatches. The CONTROL NODE bus should not be routed under any PRM. Parasitic capacitance to +IN or +OUT should be minimized. One PRM should be designated to provide the SGND reference, VAUX, and REF_EN voltages for the external circuitry. The SGND pins of each PRM should be connected to the SGND reference node on the board through a 1 resistor. When operating within an array, the PRMs are de-rated to the array rated power and current values provided for Remote Sense Operation (POUT_ARRAY, IOUT_ARRAY). The number of PRMs required to achieve a given array capacity must consider these de-ratings to avoid overstressing any PRM in the array. When using VAUX to power external circuitry, total current draw including CONTROL NODE sink currents must be taken into account to ensure the maximum VAUX current is not exceeded. Arrays of more than 5 PRMs may require additional circuitry to provide the required source current. Contact Vicor Applications Engineering for more information. VREF SGND 1 SGND 1 RSS PRM 1 ENABLE IN OUT GND 10 k CSS VAUX REF/ REF_EN TRIM VTM 1 SGND 1 SGND 1 VC VC SHARE/ CONTROL NODE VT TM V+ IFB F1 +IN LIN 1 +OUT COUT PC V- VOUT +IN VIN Voltage Sense VTM Start Up Pulse AL -IN SGND +OUT +IN LF 1 GND CF 1 -IN CIN SGND -OUT -IN -OUT PRIMARY GND SECONDARY GND ENABLE Bus CONTROL NODE Bus ISOLATION BOUNDRY SGND 1 PRM 2 ENABLE VAUX VTM 2 REF/ REF_EN TRIM SGND 2 LOAD AL VC SHARE/ CONTROL NODE VT IFB VTM Start Up Pulse TM V+ +IN LIN 2 +OUT PC V- VOUT +IN F2 +OUT VC -IN SGND +IN LF 2 CF 2 -IN SGND -OUT -OUT -IN GND PRIMARY SECONDARY ISOLATION BOUNDRY 1 SGND 2 SGND 1 Figure 39 -- Non-Isolated Remote Sense Array Example [1] Non-Isolated Configuration: -Out connected to -IN PRMTM Regulator Rev 1.5 vicorpower.com Page 37 of 42 11/2015 800 927.9474 GND PRM48AH480x200A00 DESIGN GUIDELINES (General Operation) 2 The following guidelines are general guidelines that apply to any mode of operation. FPA System Considerations There are a few system level design considerations that should be carefully considered when using a PRM and VTM to implement a Factorized Power Architecture (FPA) system The VC pin of the PRM should be directly connected to the VC pin of the VTM. The PRM and VTM coordinate the so start sequence of the FPA system through this connection. If the VC pins are not connected the VTM will not start up. When the PRM is ready to start up, it applies a voltage on VC, which enables and powers the VTM's powertrain. The PRM then proceeds to ramp up its output voltage. Aer approximately 10 ms, VC returns to 0 V and the VTM can then derive power directly from the factorized bus provided that the factorized bus voltage is above the minimum specified VTM operating input voltage when the VC pulse expires. k ln d| \ m 5 100 2 k 2 ln / d| (11) Burst Mode Operation At light loads, the PRM will operate in a burst mode due to minimum timing constraints. An example burst operation waveform is illustrated in Figure 39. For very light loads, and also for higher input voltages, the minimum time power switching cycle from the powertrain will exceed the power required by the load. In this case the error amplifier will periodically drive SHARE/CONROL NODE below the switching threshold in order to maintain regulation. Switching will cease momentarily until the error amplifier once again drives SHARE/CONTROL NODE voltage above the threshold. All VTM faults latch the VTM powertrain off. Input power to the system as a whole must be recycled or the PRM should be disabled and enabled by way of its ENABLE pin in order to restart the system. It is recommended that the voltage on the factorized bus return to zero before the PRM is re-enabled. Otherwise the so start of the system may be compromised. A RL filter should be placed between the PRM and VTM to locally isolate switching ripple currents that can interfere with module operation. It is important that the inductance have an impedance that is much greater than that of the PRM output capacitance and VTM input capacitance at the switching frequencies of the devices. A resistor should be placed in shunt to this inductor to dampen the resultant LC tank. For most cases 100 nH in parallel with 1 is sufficient to isolate the switching ripple currents. Verifying Stability A load step transient response can be used in order to estimate stability. Figure 41 -- Light load burst mode of operation Figure 38 illustrates an example of a load step response. Equation (11) can be used to predict the phase margin based on the ratio of the "kick" to "droop" (as defined in Fig. 38). Vout Vout d time Iout d time Iout time time (a) without adaptive loop In burst mode, the gain of the SHARE/CONTROL NODE input to the plant which is modeled in the previous sections is time varying. Therefore the small signal analysis cannot be directly applied to burst mode operation. k k Note that during the bursts of switching, the powertrain frequency is constant, but the number of pulses as well as the time between bursts is variable. The variability depends on many factors including input voltage, output voltages, load impedance, and error amplifier output impedance. (b) with adaptive loop Figure 40 -- Load step response example and "droop" vs. "kick" (a) without Adaptive Loop; (b) with Adaptive Loop. Input and Output filter design Figures 14 and 15 provide the total input and output charge per cycle, as well as switching frequency, of the PRM at full load under various input and output voltages conditions. Figure 13 provides the effective internal capacitance of the module. A conservative estimate of input and output peak-peak voltage ripple at nominal line and trim is provided by equation (12): QTOT < 6V CINT I FL u 0.4 f SW CEXT (12) QTOT is the total input (Fig. 14) or output (Fig. 15) charge per switching cycle at full load, while CINT is the module internal effective capacitance at the considered voltage (Fig. 13) and CEXT is the external effective capacitance at the considered voltage. PRMTM Regulator Rev 1.5 vicorpower.com Page 38 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Input Filter Stability The PRM can provide very high dynamic transients. It is therefore very important to verify that the voltage supply source as well as the interconnecting lines are stable and do not oscillate. For this purpose, the converter dynamic input impedance magnitude rEQ _ IN is provided in Figures 21, 22, 23. It is recommended to provide adequate design margin with respect to the stability conditions illustrated in the previous sections. Inductive source and local, external input decoupling capacitance with negligible ESR (i.e.: ceramic type) The voltage source impedance can be modeled as a series RLINE LLINE circuit. The high performance ceramic decoupling capacitors will not significantly damp the network because of their low ESR; therefore in order to guarantee stability the following conditions must be verified: Rline Lline (C IN _ INT C IN _ EXT ) u rEQ _ IN Rline rEQ _ IN (13) (14) Input Fuse Recommendations A fuse should be incorporated at the input to each PRM, in series with the +IN pin. A 10 A or smaller input fuse (Littelfuse(R) NANO2(R) 451/453 Series) is required to safety agency conditions of acceptability. Always ascertain and observe the safety, regulatory, or other agency specifications that apply to your specific application. Thermal Considerations VIChip products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. Maintaining the top of the PRM48AH480x200A00 case to less than 100C will keep all junctions within the VI Chip module below 125C for most applications. The percent of total heat dissipated through the top surface versus through the J-lead is entirely dependent on the particular mechanical and thermal environment. The heat dissipated through the top surface is typically 60%. The heat dissipated through the J-lead onto the PCB board surface is typically 40%. Use 100% top surface dissipation when designing for a conservative cooling solution. It is not recommended to use a VI Chip module for an extended period of time at full load without proper heat sinking. It is critical that the line source impedance be at least an octave lower than the converter's dynamic input resistance, 14. However, RLINE cannot be made arbitrarily low otherwise equation 13 is violated and the system will show instability, due to under-damped RLC input network. Inductive source and local, external input decoupling capacitance with significant RCIN_EXT ESR (i.e.: electrolytic type) In order to simplify the analysis in this case, the voltage source impedance can be modeled as a simple inductor Lline. Notice that the high performance ceramic capacitors CIN_INT within the PRM, should be included in the external electrolytic capacitance value for this purpose. The stability criteria will be: rEQ _ IN RCIN _ EXT (15) Lline rEQ _ IN C IN _ EXT u RC IN _ EXT (16) Equation 16 shows that if the aggregate ESR is too small - for example by using very high quality input capacitors (CIN_EXT) - the system will be under-damped and may even become destabilized. Again, an octave of design margin in satisfying 15 should be considered the minimum. Layout Considerations Application Note AN:005 details board layout recommendations using VI Chip(R) components, with details on good power connections, reducing EMI, and shielding of control signals and techniques to reference them to SGND. Avoid routing control signals (ENABLE, TRIM, AL etc.) directly underneath the PRM. It is critical that all control signals (aside from VC and VT) are referenced to SGND, both for routing and for pulldown and bypassing purposes. VC and VT provide control and feedback from a VTM, and must be referenced to -OUT of the PRM (-IN of the VTM). SGND is connected to -IN internally to the PRM. SGND should not be tied to any other ground in the system. PRMTM Regulator Rev 1.5 vicorpower.com Page 39 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Product Outline Drawing and Recommended Land Pattern PRMTM Regulator Rev 1.5 vicorpower.com Page 40 of 42 11/2015 800 927.9474 PRM48AH480x200A00 Revision History Revision Date Description 1.1 11/12/12 Final approved data sheet for intital release n/a 1.2 02/15/13 Updated format throughout all 1.3 07/25/13 Updated Maximum Time Abover 217C Added Array Diagrams Page 41 of 42 Page Number(s) 26 33 & 37 1.4 09/30/15 Updated MSL Rating 26 1.5 11/16/15 Minor changes in efficiency specifications Corrections to schematic labels 5 16 Rev 1.5 vicorpower.com 11/2015 800 927.9474 PRM48AH480x200A00 Vicor's comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor's product warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. Specifications are subject to change without notice. Vicor's Standard Terms and Conditions All sales are subject to Vicor's Standard Terms and Conditions of Sale, which are available on Vicor's webpage or upon request. Product Warranty In Vicor's standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the "Express Limited Warranty"). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is not transferable. UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER. This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and operating safeguards. Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Life Support Policy VICOR'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,788,033; 6,940,013; 6,969,909; 7,038,917; 7,154,250; 7,166,898; 7,187,263; 7,202,646; 7,361,844; 7,368,957; RE40,072; D496,906; D506,438; D509,472; and for use under 6,975,098 and 6,984,965. Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com PRMTM Regulator Rev 1.5 vicorpower.com Page 42 of 42 11/2015 800 927.9474