REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) | APPROVED F Add margin test. Delete one vendor, CAGE 01295. Delete 87 MAY 12 reprogrammability of EPROMS. Add device types 07, 08, 09, 10, and 11. Add program method C and characteristics. Minor Ma changes to table I, table II, and table III. Change to military drawing format. G Make changes to parameters in table ITIC. Delete one vendor, CAGE 34335, from devices 03 and 04. Editorial changes 1988 Md. ' throughout. Changes in notes under Table I. MAY 23 oe REV SHEET REV G} GF SHEET 22 | 23] 24 REV STATUS REV ct oefc|cl cic] Flele{ cGj/F] FI FT A FEF, FEF] FEF SG OF SHEETS SHEET 112937 4] sf} 6d 71 849 f1ofiy giz 4173p 14 15916 | 17718 719 | 20427 PMIC WA PREPARED BY . DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 STANDARDIZED CHECKED BY vl J OVNI MILITARY Rau MICROCIRCUITS, DIGITAL, NMOS 4KX8 UV DRAWING ERASEABLE PROM, MONOLITHIC SILICON THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS | DRAWING APPROVAL SIZE CAGE CODE AND AGENCIES OF THE 14 JULY 1980 A 14933 800I2 DEPARTMENT OF DEFENSE REVISION LEVEL AMSC NIA G SHEET 1 OF 24 DESC FORM 193-1 U.S. GOVERNMENT PRINTING OFFICE: 1987 748-129/60912 SEP 87 5962-778 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.1. SCOPE 1.1 Scope. This drawing describes device requirements for class B microcircuits in accordance with 1.2.1 of MIL-STD-883, "Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices". 1.2 Part number. The complete part number shall be as shown in the following example: 80012 01 J X Te T | | te | a | Drawing number Device type Case outline Lead finish per (1.2.1) (1.2.2) MIL-M-38510 1.2.1 Device types. The device types shall identify the circuit function as follows: Device type Generic number Circuit Access time Temperature range ol (see 6.4) AKX8-bit UV EPROM = 450 ns -55C to 100C 02 (see 6.4) 4KX8-bit UV EPROM 450 ns -55C to 100,C 03 (see 6.4) 4KX8-bit UV EPROM 250 ns -55C to 125.C 04 (see 6.4) 4KX8-bit UV EPROM 450 ns -55C to 125.C 05 (see 6.4) 4KX8-bit UV EPROM 350 ns -55C to 125.C 06 (see 6.4) 4KX8-bit UV EPROM 450 ns -55.C to 125.C 07 (see 6,4) 4KX8-bit UV EPROM 150 ns -55.C to 125.C 08 (see 6.4) 4KX8-bit UV EPROM 200 ns -55.C to 125C 09 (see 6,4) 4KX8-bit UV EPROM 250 ns -55.C to 125C 10 (see 6,4) 4KX8-bit UV EPROM 300 ns -55.C to 125. 11 (see 6,4) 4KXx8-bit UV EPROM 450 ns -55 C to 125 C 1.2.2 Case outline. The case outline shall be as designated in appendix C of MIL-M-38510, and as follows: Outline letter Case outline J D-3 (24-pin, 1.290" x 0.610" x 0.225"), dual-in-line package 1/ 1.3 Absolute maximum ratings. Supply voltage, Veg - - - - > - - - T Ot 6; V de to 6.0 V de Storage temperature range - - --------- -65 C to +150 C Maximum power dissipation, Pp - - ------ - 1,0\W Lead temperature (soldering Xo seconds) - - - - 300 C Thermal resistance, junction to case (@jc) - - See MIL-M-38510, appendix C Junction temperature (Tj} - - --------- +160 C All input or output voltages with respect to ground - ---------- 7-7-7 re -0.3 de to 6.0 V dc Yp supply voltage with respect to ground Buring program: Devices 01, 02, 05, 06 ----------- -0.3 V dc to 26.5 V dc Devices 03, 04 --------------- -0.3 V dc to 22.0 V de Devices 07, 08, 09, 10, 11 --------- -0.3 V de to 13.3 V de 17 Lid shall be transparent to permit ultraviolet light erasure. STANDARDIZED SIZE MILITARY DRAWING A 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL DAYTON, OHIO 45444 q G SHEET 2 DESC FORM 193A SEP 87 t U. S. GOVERNMENT PRINTING OFFICE: 1988-848-904on" 1.4 Recommended operating conditions. Case operating temperature range (Tc): Devices 01, 02 --------------- -55C to +100C Devices 03 - 11-----+----------- -55 C to +125 Input low voltage, Vy, - -------7-+--- -0.1 V dc to 0.8 V dc Input high voltage, Vu eee ee eee ee ee 2.0 V dc to 6.5 V dc Supply voltage, Veg - - - - - - ee to oe +4.5 V de to +6.5 V de High level program input voltage Viy(pp): Devices 01, 02, 05, 06 -------+-+--- 24 V de to 26 V de Devices 03, 04 -----+---+--------- 20.5 V de to 21.5 V de Devices 07, 08, 09, 10, 11 -------- - 12.0 V dc to 13.3 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification and standard. Unless otherwise specified, the following specification and standard, of the Issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Specification for. STANDARD MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of the specification and standard required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with 1.2.1 of IMIL-STD-883, Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices" and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as speciffed in MIL-M-38510 and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth tables. The truth tables shall be as specified on figure 2. 3.2.2.1 Unprogrammed or erased devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.2.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. STANDARDIZED a : 80012 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 3 DESC FORM 193A t U. S. GOVERNMENT PRINTING OFFICE: 1988-549-904 SEP 87TABLE I. Electrical performance characteristics. ] | T I I Test [Symbol | Conditions 1/ 2/ Device | Group A | Limits | Unit | { ~ 7 type |subgroups | { | | { | Min | Max | | T | | I High level output I Voy [Igy = ~400 yA All 11,2, 3 } 2.4 | | Vv voltage | Wit = 0.8 V, Vyy = 2.0 V | ! | | ! | [ I I | flow level output {Yo Ip. = 2.1 Al] 6} 1, 2,3 | 0.45! V voltage | Wrp = 0.8 V, Vyy = 2.0 V | | | | | | | | | | I | | 1 | 1 l | | Output leakage Io Vout = 5.5 CE = Voy | All f 1, 2,3 | {10 | nA current | | | | l | | | | or PD/PGM = Vyy | | | ] | | | 1 | | Supp] t F ICE V OF =V 01,02 03 1, 2, 3 45 mA u curren = = ; 25 (Standby) 3/ | 88 | tH tt 04;,05,06| | | lor PO/PGM = Vry I I | | 07,08,09| 1, 2, 3 } 40 =| ! | L10. 11 | | ! I [ I Supply current = IIcc JOE = CE = Vy 101 ,03,04 03,041 1, 2,3 | 1150 | mA (active) 3/ | | | I | lor PD/PGM = Vyy 102,05,06| ! 1160 | TE | | |07,08,09| | |100 | I | {10,11 | | | l I J | | | T | Input capacitance IC; Wty = 0.V See 4.3.1c | | I | | 4/ | ITe = 25C f = 1 MHz | All | 4 | 6 | pF ~ | | | | | | I I | I | I Address to output Itacc ITE = DE = Vy 5/ | 07 {9, 10, 11 | 150 | ns delay | lor PD/PGM = Wr {0s | | 200. | | | | 05,09 | | 250 | | | |[__to _| | 300 | | I | l 30d | | | 01,02, 04 | | | | | {06,11 | | 1450 | | | | ] I | I Chip enable to itce OE = Vy, 2 5/ | 07 |9, 10, 11 | 150 _| ns output delay | | ~ | w |~___ Teno | | lor PD/PGM = Vr, |" 035,09 | | [250 | { i | 10 | | 300 | | jo 350 | | |01, 02,04 | | | }06,11 | 450 | I | | | loutput enable to [tor ITE = Vy 5/ } 07,08 19, 10, 11 ) 75 ns output delay =| | ~ 103,05, 09| | 1100 "| | jor PD/PGM = Vr, {~ To | [~~ _ Tio | | | (OT, 02, OF | | | | 06,11 | | {150 | See footnotes at end of table. STANDARDIZED A MILITARY DRAWING 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 / G 4 DESC FORM 193A SEP 87 t U. S. GOVERNMENT PRINTING OFFICE: 1988549-904TABLE I. Electrical performance characteristics - Continued. I l I T | Test |Symbo1 | Conditions 1/ 2/ |Device | Group A | Limits | Unit | | | type |subgroups | | | | | { | | Min | Max | ] | | T I I I Output enable |tpr \CE = Vy, 5/ ]07,08,0919, 10, 11 | | | ns high to output | | ~ {10 | | | 60 | float 6/ | jor PO/PGM = Vy, a | T7o | | | | iI | | 80 | | | |~05 | | Tr | | | | 01,02; 04 | | | | | 106 I | 130__ | | I I ] | T T Address to output [toy TE = DE = Vy, 5/ [| All 19, 10,11] o | | ns hold lor PD/PGM = We | | | |! ! 1/ For device types 01 and 02, Tr = -55C to 100C, GND = 0 V, V = 5 V, and for device type 02 only, Vp = Vcc. For device Cypes 03, 04, 05, and 06, Te = _&G C to +125 C, GND = 0 V, Voc = q, and for device types 05 and 06, V p= Voc. For device types 07, 08, 09, 10, and 11; Te = 255C to 125C, GND = OV, Voc = 5 VE 2/ For device types 02, 05, 06, 07, 08, 09, 10, and 11 only, Vcc must be applied simultaneously or before Vpp) and removed simultaneously or after Vpp. 3/ For device types 02, 05, 06, 07, 08, 09, 10, and 11 only, V p, may be connected directly to Vcc except during programming. The supply current would then be the sum of Icc and Ipp}. 4/ For device types 01, 03, and 04, the input capacitance on pin 20 shall be 20 pF maximum. 5/ Output load: See figures 4 and 5; ty and tf <20 ns; Input pulse levels: device types 01, 02, 05, and 06 = 0.8 V to 2.2 V; device types 03, 04, 07, 08, 09, 10, and 11 = .45 V to 2.4 V Input timing reference level: device types 01, 02, 05, 06, 07, 08, 09, 10, and 11 = 1.0 V and 2.0 V; device types 03, 04 = 0.8 V to 2.0 V Output timing reference level: 0.8 V and 2.0 VY. 6/ If not tested, shall be guaranteed to the limits specified in table I. 3.2.4 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified, the electrical performance characteristics are as specified in table I and apply over the full case operating temperature range. 3.4 Marking. Marking shall be in accordance with MIL-STD-883 (see 3.1 herein). The part shall be marked with the part number listed in 1.2 herein. In addition, the Manufacturer's part number may also be marked as listed in 6.4 herein. 3.5 Processing EPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.5.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4. 3.5.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5 and table III. STANDARDIZED a 80012 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 5 DESC FORM 193A 1 U. 8. GOVERNMENT PRINTING OFFICE: 1988549-904 SEP 873.5.3 Verification of erasure or programmability of EPROMS. When specified, devices shall be verified as elther programmed to the specifted pattern, or erased, Asa minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in proper state. Any bit that does not verify to be in the proper state shall constitute a device failure and shall be removed from the lot. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be Tisted aS an approved source of supply in 6.4. The certificate of compliance submitted to DESC-ECS prior to listing as an approved source of supply shall state that the Jmanufacturer' s product meets the requirements of MIL-STD-883 (see 3.1 herein) and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-STD-883 (see 3.1 Jherein) shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DESC-ECS shall be required in accordance with MIL-STD-883 (see 3.1 herein). 3.9 Verification and review. DESC, DESC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. TABLE II. Electrical test requirements. | Subgroups (per method 5005, table I} MIL-STD-883 test requirements [Interim electrical parameters T | | | (method 5004) | | |Final electrical test parameters [ 1*, 2, 3, 7, 9 | (method 5004) 1, 2, 3, 4, 7, |(method 5005) 9, 10, ll | |Groups C and D. end-point 1, 2 lelectrical parameters |(method 5005) { NOTES: 1, (*) Indicates PDA applies to subgroup 1. . Any or all subgroup may be combined when using a | | | I | | | ! |Group A test requirements | T { | | high speed tester. Subgroup 7 shall consist of verifying the pattern specified. . For all electrical tests, the device shall be programmed to the pattern specified. 2 3 4 STANDARDIZED SIZE MILITARY DRAWING A 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 6 6 DESC FORM 193A SEP 87 t U. 8. G@OVERNMENT PRINTING OFFICE: 1968549-904oo Device types 01, 03, 04, 07, 08, 09, 10, and 11 a, [_|4 at Dual-in-line package Case J -- OOU0 LIU UU UU O2 [| I 14 Pin names 03 | I T cno[ | 12 13 | |A0-A11 [Addresses i | I | [CE \chip enable | | T ] I JOE |Output enable | | | T 190-07 Joutputs | | FIGURE 1. Terminal connections (top view). STANDARDIZED re MILITARY DRAWING a DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 7 DESC FORM 193A SEP 87 YY U.S. GOVERNMENT PRINTING OFFICE: 1987549-096Device types 02, 05, and 06 Dual-in-line package Case J 24 23 22 21 20 IPO UU UU UU Voc Ag Ag OE/ Ypp PD/PGM Alo Ail O7 Og 15 || Os o2 (]: [Jo = 0 Pin names GNO 12 13 3 LC | | | |Ag-A11 | Addresses 1 | ! {PD/PGM Chip enable | ! | I !0-97 [Outputs ! I | | |OE/Vpp loutput enable | | FIGURE 1. Terminal connections (top view) - Continued. STANDARDIZED a 8 MILITARY DRAWING core DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 8 DESC FORM 193A SEP 87 YW U.S. GOVERNMENT PRINTING OFFICE: 1987-549-096SEP 87 W U.S. GOVERNMENT PRINTING OFFICE: oN Device types 01, 03, 04, 07, 08, 09, 10, and 11 Device types 02, 05, and 06 | | I T 1 I | | | | in| | | | | Pin | | | | Mode IE |OE/Vpp Joutputs | {Mode |PD/PGM Ver Joutputs | | { | r oT | I | | I T T |Read Ju IL \Dout | |Read IL iH [Doyt =| | | | | I | | | { | T T 7 T T T I I I I Standby |H IX IHigh Z| |Output tH 1H |High Z | | | | | | |disable | | | | ] T 7 | | | | | | | }Program |L |Vpp High Z| T ] T | | | | | | |Power |H \H |High Z | | TI I I | down | | { | IProgram |L [L IDout | [ | { | | Iverify | | | | l ] | | T {| | I {Start 1H to L |Vpp =: 1DqN | | TT T | Iprogramning | | | { [Program |H |Vpp High Z | | I | | | linhibit | | | | T l l | | | || | | [Inhibit | H \Vpp {High Z | Iprogramming | | | | L = Low level | | | | | H = High level X = Don't care Vpp = Program voltage FIGURE 2. Truth tables. STANDARDIZED A 30012 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 9 ~ DESC FORM 193A 1967549.096Device types 01, 02, 03, 04, 05, 06, 07, 08, 09, 10, and 11 OUTPUTS An f Pt ttt tt Oo 0; 02 03 0405 0607 _ of OE PD/PGM OR ( cE AND | OUTPUT BUFFERS CE ___| Y Y- GATING | pecoveE [| 2 A.- A , O tl e ADDRESS x 32,768 INPUTS e | ; MEMORY DECODE ARRAY e Lanna FIGURE 3. Block diagram. STANDARDIZED A MILITARY DRAWING 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 10 DESC FORM 193A SEP 87 WY U.S. GOVERNMENT PRINTING OFFICE: a 1987549-096 2Device types 01, 03, 04, 07, 08, 09, 10, and 11 1.3V INSI4 OR EQUIVALENT 3.3kQ+5% DUT l0ONL5% CL=100pF (INCLUDING SCOPE = AND JIG) Device types 02, 05, and 06 5.0 V DC (TO SCOPE) OUTPUT TO DUT OUTPUT CL =!00 pF = (INCLUDING SCOPE AND JIG) FIGURE 4. Output load. STANDARDIZED a soot? MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F a DESC FORM 193A : sf U.S. GOVERNMENT PRINTING OFFICE: 1987-549-095 SEP 87Device types 01, 03, 04, 07, 08, 09, 10, and 11 V 22.4 1H 2,.0V TEST | a 2.0 V POINTS < . 0.8 V V,, =0.45 0-8V , ce IL - com moo ADDRESSES OT Rk SL Co ~-----1 OE / Vpp / eb ton OUTPUT Ke NOTE: 1. OE may be delayed up to tacc-tog after falling edge of CE without impact on tage: 2. tpr is specified from DE or CE whichever occurs first. FIGURE 5. Timing diagram. STANDARDIZED SIZE MILITARY DRAWING A go0l2 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL DAYTON, OHIO 45444 F SHEET DESC FORM 193A 3Y U.S. GOVERNMENT PRINTING OFFICE: 1967549-096 SEP 87Device types 02, 05, and 06 READ CYCLE TIMING Vv 0 y " FERS ADDRESSES AK) OOK __ Vit toH ag PD/PG \. he cai bee |e Lg bor - VOH : 0) ~% -t-z VALID > Vol taco STANDBY MODE VIH ADDRESSES ADDRESS N Yt ADDRESS N+m ___ VIL | PD/ PGM Vin ACTIVE STANDBY Lor = ce v Q,- Q OH (SEE NOTE |) to"6 VALID HI-Z VALID VoL VIL NOTES: 1. Vec shall be applied simultaneously or before Vpp and removed simul taneously or after Vpp. 2. C = 100 oF includes jig and probe capacitance. Z, = TTL gate or equivalent. 3. Input rise and fall times < 20 ns. 4, Input pulse levels 0.8 V to 2.2 V. 5. ying measurement reference levels: Inputs 1.0 V and 2.0 V, Outputs 0.8 V and OV. 6. tcp referenced to PD/PGM or the address, whichever occurs last. FIGURE 5. Timing diagram - Continued. STANDARDIZED A 80012 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 13 DESC FORM 193A + U.S. GOVERNMENT PRINTING OFFICE: 1987-549-096 SEP 874. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with section 4 of MIL-M-3B5TO to the extent specified in MIL-STD-883 (see 3.1 herein). 4.2 Screening. Screening shal] be in accordance with method 5004 of MIL-STD-883, and shall be conducted on art devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883, (1) Test condition C or D using the circuit submitted with the certificate of compliance (see 3.6 herein). (2) Ta = *125C, minimum, b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. c. A data retention stress test shall be included as part of the screening procedure and shall consist of the following steps. Margin test method A. 1. Program greater than 95 percent of the bit locations, including the slowest programming cell (see 3.5.2). 2. Bake, unbiased, for 12 hours at 200C. 3. Perform a margin test using Vm = Vcc = 6.0 at 25C using loose timing. > Erase device, then program 45 percent - 50 percent of the bits to a worst case speed pattern. 5. Perform dynamic burn-in (see 4.2a). Perform a margin test using Vm = Voc = 6.0 at 25C. n 7. Perform 100 percent electrical testing at +125C and -55C. Perform 100 percent ac and dc electricals at 25 C. 8. frase device (see 3.5.1), except devices submitted for groups A, B, C and D. 9, Verify erasure (see 3.5.3). Margin test method B 1, Program greater than 95 percent of the bit locations, including the slowest programming cell (see 3.5.2). The remaining cells shall provide a worst case speed pattern. 2. Bake, unbiased, for 72 hours at +140C to screen for data retention lifetime. 3. Perform a margin test using Vm = +6.0 V at 25C using loose timing (i.e., tacc = 1 us). 4. Perform dynamic burn-in (see 4.2a). STANDARDIZED SIZE MILITARY DRAWING A aool2 N , DAYTON, OHIO 46444 F 14 DESC FORM 193A SEP 87 + U. 8. GOVERNMENT PRINTING OFFICE: 1988549-904oo 5. Margin at Vm = 6.0 V. 6. Perform electrical tests (see 4.2). 7. Erase (see 3.5.1), except devices submitted for groups A, B, C and D testing. 8. Verify erasure (see 3.5.3). 4.3 Quality conformance inspection. Quality conformance inspection shal? be in accordance with frethod S008 of wa S083 including groups A, B, C, and D inspections. The following additional 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6, and 8 in table I, method 5005 of MIL~STD-883 shall be omitted. c. Subgroup 4 (Czy measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. d. All devices selected for testing shall have the EPROM programmed with a checkerboard pattern or equivalent. After completion of all testing, the devices shall be erased and verified (except devices submitted for group C and D testing). e. Subgroup 7 shall consist of verifying the EPROM pattern specified. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1} Test condition C or D using the circuit submitted with the certificate of compliance (see 3.6 herein). (2) Ty = *125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. (4) All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all testing the devices shall be erased and verified. 4.4 Erasing procedure. The device is erased by exposure to high intensity short wave ultraviolet light ata waveren th of 253.7 nm. The recommended integrated dose (i.e., UV intensity X exposure time) is 15 W-s/cm*. An example of an ultraviolet source which can erase the device in 30 minutes fs the Model S52 short wave ultraviolet lamp. The lamp should be used without short wave filters and the EPROM should be placed about 1 inch from the lamp tubes. After erasure, all bits are in the high state. STANDARDIZED SIZE MILITARY DRAWING A 30012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 15 DESC FORM 193A SEP 87 4 U. 8. GOVERNMENT PRINTING OFFICE: 1988540-0044.5 Programming procedure. 4.5.1 Programming procedures for method A. The programming characteristics in table IIIA and the following procedures shall be used for programming the device. a. Connect the device in the electrical configuration for programming the waveforms of figure 6 and programming characteristics of table IIIA shall apply. b. Initially and after each erasure, all bits are in the high "H" state. Information is introduced by selectively programming "L" into the desired bit locations. A programmed "L" can be change to an "H" by ultraviolet light erasure (see 4.4). c. Programming occurs when Vpp is 21.0 40.5 V and chip enable is brought low. 4.5.2 Programming procedures for method B. The programming characteristics in table IIIB and the following procedures shall be used for programming the device. a. Connect the device in the electrical configuration for programming the waveforms of figure 7 and programming characteristics of table IIIB shall apply. b. Initially and after each erasure, all bits are in the high "H" state. Information is introduced by selectively programming "L" into the desired bit locations. A programmed "" can be changed to an "H" by ultraviolet light erasure (see 4,4). c. The circuit is set up for programming operation by setting PD/PGM input to Vyy and V set to 25 1.0 V. The word address fs selected in the same manner as in the read hbde. Data to be programmed, 8-Bits fn parallel, are presented to the data lines (0g - 07). Logic levels for address and data lines, and the supply voltages are the same as for the read mode. After address and data set up, one program pulse (Vy,) per address is applied to the program input (Pin 20). The programming time for a singls bit is only 50 ms and for all bits is approximately 200 seconds. 4.5.3 Programming procedures for method C. The programming characteristics in table IIIC and the following procedures shall be used for programming the device. a. Connect the device in the electrical configuration for programming the waveforms of figure 6 and programming characteristics of table IIIC shall apply. b. Initially and after each erasure, all bits are in the high "H" state. Information fs introduced by selectively programming "L" into the desired bit locations. A programming L" can be changed to an "H" by ultraviolet light erasure (see 4.4). c. Programming occurs when Yop is 12.0 V to 13.3 V and chip enable is brought low. 4.6 Programming procedure identification. The programming procedure to be utilized shall be identifled by the manufacturer's circuit designator. The circuit designator is cross-referenced in 6.4 herein with the manufacturer's symbol or CAGE number. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-M-38510. STANDARDIZED SIZE MILITARY DRAWING A | go012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 16 DESC FORM 193A SE Pp 87 U.S. GOVERNMENT PRINTING OFFICE: 1988549-904o Device types 01, 03, 04, 07, 08, 09, 10, and 11 , VERIFY ~<+ Vin $$ ADDRESS ADDRESS STABLE vin ss + aga (2) Vin f DATA DATA IN HIGH Z DATA OU HIGH Z Vib STABLE vase : < Dv. DFP os r eon na (0.13) MAX Vpp (2) DEsy >{hoPw toe mle] bay PP OE H bat (2) | ViL . tloesi2) Lb yR(2) g tpy VIH 1. ter (0 id a vii ___ A NOTES: All times shown in parentheses are minimum and us unless otherwise specified. The input timing reference level is 0.8 V for as Vyz_ and 2 V for a Vy. 2. FIGURE 6. Programming timing diagram for method A. and C STANDARDIZED A 80012 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 17 Y U.S. GOVERNMENT PRINTING OFFICE: 1987549-096 DESC FORM 193A SEP 87Device types 02, 05, and 06 (SEE NOTE 5 ) PROGRAM i} _ - PROGRAM ie Ricy Von y ADDRESS ADDRESS N ADDRESS VIL N +m _ tw (PR) PO/PGM _.| bev ta) e at+ bn (a) "aI Vin teu (VPP) su > tn (PR) Vpp tr (PRD Boney | +5 mi NOTES: . Input timing reference levels are 1.0 V and 2.0 V. Output timing reference levels are 0.8 V and 2.0 V. Input pulse rise and fall times (10% to 90%) are 20 ns. Input pulse levels are 0.8 V to 2.2 V. Program verify equivalent to read mode. OPwNne oe ee FIGURE 7. Programming timing diagram for method B. STANDARDIZED SIZE MILITARY DRAWING A 0012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F DESC FORM 193A SEP 87 vr U.S. GOVERNMENT PRINTING OFFICE: 1987-549-096 18TABLE IIIA. Programming characteristics for method A. | | Limits | | Symbol ! Parameter Min. | Typ. [ Max. T Units | Test conditions | | | | | Ty TTnput current (all inputs) T | TiO TT uA TViw = Vyt or Voy | | | | | | VoL [Output Tow voltage during verify T ] T0.45 7 V IIo, = 2-1 mA | | | | i | Vou {Output high voltage during verify 12.4 | I T V TIoy = -400 uA { | | | | | Tec cc supply current 1 | 8 [125 YT mA | | | VIL input Tow Tevel (all inputs) -0.T | 0.8 TV | | Vin [Input high Tevel (alT inputs except OE/Vp,)7 2.0 | Vec*#I TY ! + | Ipp pp program current | ! ! 30 ! mA OE = athe Vpp Vip TAq intelligent identifier voltage T 11.5 | Ti2z.5 7 T | | | | | | tas nacress setup time [2 ] | Tous | | | | | | | | | | 1 I toes JOE setup time | 2 | ! ! us | tps TData setup time T 2.7] I Tus | | | | | I | TAH {Address hold time rT vf i i ous | | | | I I | | ] | tocy (OE hold time 2 | | ! us | ~ ton [Data hold time T 2 | | , us | | | | | tprp [Chip enabie high to output not driven tr 0 | [130 ji ns | | | | | | | | | | | | toy {Data valid from CE | | 1 1 | us (CE = Vy, OF = Vy, | | | | | | I I l T | I tpy |CE pulse width during programming 145 |50 | 55 | ms | | | | | | { | | I J | tPRT Woe pulse rise time during programming ! 50 | ns | tyr [Vpp recovery time | Tous | | | | | | | NOTES: 1. For all switching characteristics and timing measurements, input pulse levels are 0.45 V to 2.4 V and Von = 21 V #0.5 V during programming. All ac and dc measurements are made at 10% and 90% points with a 50% pattern. 2. OE may be delayed up to tacc~tog after the falling edge of CE without impacting tacc- 3. When programming the device, a 61 uF capacitor is required across OE/Vpp and ground to suppress spurfous voltage transients which may damage the device. STANDARDIZED SIZE MILITARY DRAWING A 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 19 DESC FORM 193A SEP 87 WY U.S. GOVERNMENT PRINTING OFFICE: 1987S49-096TABLE IIIB. Programming characteristics for method B. { I Limits Symbo1 ! Parameter Min. Typ. * Max. 7 Units I I tw PR) |Pulse width, program pulse ! 45 50 55 ms I | tr(pR) {Rise time, program pulse 5 |! ns I | I I tr(pR) [Fatt time, program pulse 5 ! ! ns | | 1 | tsu(a) |Mdress setup time 2 | us | tsu(D) [Pata setup time 2 us | tsu(Vpp) [Setup time from Vpp ; o | | | ns | |_| tha) |Address hold time 2 ! ! ! us T I | i 1 thi(p) |Data hold time 2 ! us I T T l th(pR) |Program pulse hold time 0 | ! ns I I T T thi Ypp) IVpp hold time 1 0 | | ns ! Ipp2 |Program pulse current ! 30 ! mA Typical values are at nominal voltages. INOTES: 1. For all switching characteristics and timing measurements, input pulse levels are 0.65 V to 2.2 Vand V,, = 25 V #1 V during programming. All ac and dc measurements are made at 10% and 90% poihts with a 50% pattern. 2. Common test conditions apply for tp except during programming. For tacc and tp, PD/ = VIL. STANDARDIZED SIZE MILITARY DRAWING {_A 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL 3 SHEET DAYTON, OHIO 45444 F 20 DESC FORM 193A SE Pp 87 . * U. 8. GOVERNMENT PRINTING OFFICE: 1986549-904TABLE ILIC. Programming characteristics for method C. { I Limits | | Symbol | Parameter | Min. | Typ. | Max. | Units | Test conditions | | | | | Ty [Tnput current (all inputs) | | TiO . oA TVyy = Yr_ or Vin i | | | | You ae Tow voltage during verify T T ToO.45 7 V IIo, = 2-1 mA | | | | | Vou [Output high voltage during verity 12.4 | I TY {0H = 400 uA | | | { | Tee vec supply current I TOOT iA | | Vr TInput Tow TevelT (alT Tnputs) 1 -0.1 | T0.8 7 I | | | | | | Vy [tnput high TeveT (all Tnputs except OE/V,,)1 2.0 | Wectl TV I | | | | | | | 1 | | | { Ipp IVpp program current | | 130 | mA ITE = VIL. Vpp = | | | | | | 12.5 V Vip TAg inteTTtgent Tdentiffer voltage Tmr.5 } fiz57 V | | | | | | | tAS [Address setup time T 2 | | Yous | | tors JE setup time 2 us ! tos TData setup time T 2 us | | | TAH [Address hold time T 2 1 I [us | 1 I tocpy |0E hold time ! 2 us ! | | | tou TData hold time rT 2 | i Tous | | | | | tprp chip enabTe high to output not driven To T 130 7 ns | | | | | ] __ | 1 | | | tog [Data valid from OE ! |! 150 ns | | __ | 1 | | | toy IData valid from CE ! ! ! 450 ! ns tpw TPG putse width during programming 795 T.0 T.05 ins topy. [PGM pulse width during over programming 1.9) = 37 2.0 [55 T ms j | | | | | | See footnotes at end of table. STANDARDIZED A MILITARY DRAWING 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 21 DESC FORM 193A SEP 87 Y U.S. GOVERNMENT PRINTING OFFICE: 1987-549-096TABLE IIIC. Programming characteristics for method C - Continued. 2.0 V and V Limits Symbol Parameter Min. | Typ. ax. | Units | Test conditions typs Vpp setup time Z us | i tycs Vcc setup time 2 us i ] | | | tccs Ice setup time | 2 | us NOTES: 1. For all switching characteristics and timing measurements, input pulse levels are 0.8 V to = 12.0 V to 13.3 V during programming. at 10% and BBs points with a 50% pattern. 2. OE may be delayed up to tacctop after the falling edge of TE without impacting tacc- 3. When programming the 2732B, a 0.1 ywF capacitor is required across OE/Vpp and ground to suppress spurious voltage transients which may damage the device. All ac and dc measurements are made STANDARDIZED SIZE MILITARY DRAWING A 80012 J DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 22 DESC FORM 193A SEP 87 Y U.S. GOVERNMENT PRINTING OFFICE: 1987549-096oN oo oo 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use when military specifications do not exist and qualified military devices that will perform the required function are not available for OEM application. When a military specification exists and the product covered by this drawing has been qualified for listing on QPL-38510, the device specified herein will be inactivated and wil] not be used for new design. The QPL-38510 product shall be the preferred item for al? applications. 6.2 Replaceability. Replaceability is determined as follows: a. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. b. When a QPL source is established, the part numbered device specified in this drawing will be replaced by the microcircuit identified as part number M38510/222XXBJX. 6.3 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or telephone 513-296-5375. 6.4 Approved sources of supply. Approved sources of supply are listed herein. Additional sources will be added as they become available. The vendors listed herein have agreed to this drawing and a certificate of compliance (see 3.6) has been submitted to DESC-ECS. | Military [ Vendor | Vendor T Replacement I I | drawing | CAGE | similar part Imilftary specification | Programming | ! part number | number | number | part number 1/ | method ! { { | | | | | 1 T | | 8001201JX 2/ | 34649 |MD2732/B : | A [ | | ! 8001202JX 3/ | 4/ |SW2532-450S M38510/22201BUX ! B T T I J l | 8001203Jx | 34649 |MD2732A25/B | | A { | { | | | | | 4/ 1AM2732A-25/BJA | | A | | | | | | l | T T I | { ! 8001204JX 34649 |MD2732A45/B ! A | rs rs ! 4/ AM2732A-45/BJA ! A |! | Y ] I | 80012050x | Al |SMJ2532-35JM | B { { | | ! ! I I ] ! 8001206JX ! Al SMJ2532-45JM M38510/22201BUX | B I I Y T l | 8001207JX | 34335 [AM2732B-150/BJA| : C | y | ] | 8001208JX | 34335 |AM2732B-200/BJA] | C | See footnotes at end of table. STANDARDIZED * MILITARY DRAWING 80012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 G 23 DESC FORM 193A SE Pp 87 3% U.S. GOVERNMENT PRINTING OFFICE: 1987549-096| Military T Vendor | Vendor | Replacement | | | drawing | CAGE | similar part Imilitary specification | Programming | part number | number | number | part number 1/ | method oe | | 8001209JX 34335 |AM2732B-250/BJA C 8001210JX 34335 |AM2732B-300/BJA Cc 80012110X 34335 |AM2732B-450/BUA| Cc | 1/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 2/ Device type 01 is inactive for new design. temperature range is the preferred device. 3/ Device type 02 is inactive for new design. temperature range is the preferred device. 4/ Not available from any approved source. Vendor CAGE Vendor name Device type 04 at full military Device type 06 at full military Margin test number and address method 34649 Intel Corporation B 3065 Bowers Avenue Santa Clara, CA 95051 34335 Advanced Micro Devices A 901 Thompson Place Sunnyvale, CA 94086 STANDARDIZED A MILITARY DRAWING 30012 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET DAYTON, OHIO 45444 F 24 DESE FORM 193A SEP 87 +t U.S. GOVERNMENT PRINTING OFFICE: 1987--549-096 2769