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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DQualification in Accordance With
AEC-Q100†
DQualified for Automotive Applications
DCustomer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
DOperates From 1.65 V to 3.6 V
DInputs and Open-Drain Outputs Accept
Voltages up to 5.5 V
DLatch-Up Performance Exceeds 250 mA Per
JESD 17
†Contact factory for details. Q100 qualification data available on
request.
description/ordering information
This hex buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs to
implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA.
Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use of
these devices as translators in a mixed-system environment.
ORDERING INFORMATION
TAPACKAGE‡ORDERABLE
PART NUMBER TOP-SIDE
MARKING
−40°C to 125°C
SOIC − D Reel of 2500 SN74LVC07AQDRQ1 LVC07AQ
−40°C to 125°CTSSOP − PW Reel of 2000 SN74LVC07AQPWRQ1 LVC07AQ
‡Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer/driver)
INPUT
AOUTPUT
Y
H H
L L
logic diagram, each buffer/driver (positive logic)
AY
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
  !"# $ %&'# "$  (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$  '."$ $#&!'#$
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#'$#1  "** (""!'#'$,
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
D OR PW PACKAGE
(TOP VIEW)
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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO −0.5 V to 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA(see Note 2): D package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 1.65 3.6 V
VCC = 1.65 V to 1.95 V 0.65 ×VCC
V
IH
High-level input voltage VCC = 2.3 V to 2.7 V 1.7 V
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V 2
V
VCC = 1.65 V to 1.95 V 0.35 ×VCC
V
IL
Low-level input voltage VCC = 2.3 V to 2.7 V 0.7 V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V 0.8
V
VIInput voltage 0 5.5 V
VOOutput voltage 0 5.5 V
VCC = 1.65 V 4
IOL
Low-level output current
VCC = 2.3 V 12
mA
IOL Low-level output current VCC = 2.7 V 12 mA
VCC = 3 V 24
TAOperating free-air temperature −40 125 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS VCC MIN TYP†MAX UNIT
IOL = 100 µA1.65 V to 3.6 V 0.2
IOL = 4 mA 1.65 V 0.45
V
OL
IOL = 12 mA
2.3 V 0.7 V
VOL
IOL = 12 mA 2.7 V 0.4
V
IOL = 24 mA 3 V 0.65
IIVI = 5.5 V or GND 3.6 V ±5µA
ICC VI = VCC or GND, IO = 0 3.6 V 10 µA
∆ICC One input at VCC − 0.6 V, Other inputs at VCC or GND 2.7 V to 3.6 V 500 µA
CiVI = VCC or GND 3.3 V 5 pF
†All typical values are at VCC = 3.3 V, TA = 25°C.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
TA = −405C TO 1255C
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCC = 1.8 V
± 0.15 V VCC = 2.5 V
± 0.2 V VCC = 2.7 V VCC = 3.3 V
± 0.3 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A Y 1 3.5 1 2.8 3 1 2.9 ns
operating characteristics, TA = 25°C
PARAMETER
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V
UNIT
PARAMETER
CONDITIONS TYP TYP TYP
UNIT
Cpd Power dissipation capacitance per buffer/driver f = 10 MHz 1.8 2 2.5 pF
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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC = 1.8 V ± 0.15 V
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
2 × VCC
2 × VCC
2 × VCC
TEST S1
VCC/2
VCC/2
VCC/2VCC/2
VCC/2VCC/2
VCC/2
VCC/2
VCC
VOL
th
tsu
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
1 kΩ
1 kΩ
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at 2 × VCC
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.15 V
VCC − 0.15 V
0 V
VCC
0 V
0 V
tw
VCC VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2 ns, tf ≤2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VCC/2.
G. tPLZ is measured at VOL + 0.15 V.
H. All parameters and waveforms are not applicable to all devices.
0 V
VCC
VCC/2
tPHL
VCC/2 VCC/2 VCC
0 V
VCC
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2 VCC/2
tPLH
2
×
V
CC
VCC
Figure 1. Load Circuit and Voltage Waveforms
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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC = 2.5 V ± 0.2 V
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
2 × VCC
2 × VCC
2 × VCC
TEST S1
VCC/2
VCC/2
VCC/2VCC/2
VCC/2VCC/2
VCC/2
VCC/2
VCC
VOL
th
tsu
From Output
Under Test
CL = 30 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at 2 × VCC
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.15 V
VCC − 0.15 V
0 V
VCC
0 V
0 V
tw
VCC VCC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2 ns, tf ≤2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VCC/2.
G. tPLZ is measured at VOL + 0.15 V.
H. All parameters and waveforms are not applicable to all devices.
0 V
VCC
VCC/2
tPHL
VCC/2 VCC/2 VCC
0 V
VCC
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2 VCC/2
tPLH
2
×
V
CC
VCC
Figure 2. Load Circuit and Voltage Waveforms
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SCAS783B − O C TOBER 2004 − REVISED DECEMBER 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC = 2.7 AND 3.3 V ± 0.3 V
1.5 V
1.5 V
1.5 V1.5 V
1.5 V1.5 V
1.5 V
1.5 V
3 V
VOL
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1 Open
GND
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at 6 V
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + 0.3 V
2.7 V
0 V
2.7 V
0 V
0 V
tw
2.7 V 2.7 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
tPZL (see Note F)
tPLZ (see Note G)
tPHZ/tPZH
6 V
6 V
6 V
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns
.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at 1.5 V.
G. tPLZ is measured at VOL + 0.3 V.
H. All parameters and waveforms are not applicable to all devices.
6 V
0 V
2.7 V
1.5 V
tPHL
1.5 V 1.5 V 2.7 V
0 V
3 V
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V 1.5 V
tPLH
Figure 3. Load Circuit and Voltage Waveforms
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M
0,10
0,10
0,25
0,50
0,75
0,15 NOM
Gage Plane
28
9,80
9,60
24
7,90
7,70
2016
6,60
6,40
4040064/F 01/97
0,30
6,60
6,20
80,19
4,30
4,50
7
0,15
14
A
1
1,20 MAX
14
5,10
4,90
8
3,10
2,90
A MAX
A MIN
DIM PINS **
0,05
4,90
5,10
Seating Plane
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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