TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS PROGRAMMABLE SLIC OVERVOLTAGE PROTECTION Dual Voltage-Programmable Protectors - Third Generation Design using Vertical Power Technology - Wide -5 V to -85 V Programming Range - High 150 mA min. Holding Current Reduced VBAT Supply Current - Triggering Current is Typically 50x Lower - Negative Value Power Induction Current Removes Need for Extra Protection Diode (Tip) K1 1 8 K1 (Tip) (VS) G 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) MD6XAO NC - No internal connection Terminal typical application names shown in parenthesis Rated for LSSGR & FCC Surges STANDARD '61060D PACKAGE (TOP VIEW) WAVE SHAPE '61060P PACKAGE (TOP VIEW) ITSP A LSSGR 10/1000 s 30 (Tip) K1 1 8 K1 (Tip) FCC Part 68 10/160 s 45 (VS) G 2 7 A (Ground) LSSGR 2/10 s 50 NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) Surface Mount and Through-Hole Options - TISP61060P for Plastic DIP - TISP61060D for Small-Outline - TISP61060DR for Taped and Reeled Small-Outline device symbol Functional Replacements for PART NUMBERS MD6XAP NC - No internal connection Terminal typical application names shown in parenthesis FUNCTIONAL K1 G K2 REPLACEMENT TCM1030P, TCM1060P, LB1201AB TISP61060P TCM1030D, TCM1060D, LB1201AS TISP61060D TCM1030DR, TCM1060DR TISP61060DR description The TISP61060 is a dual forward-conducting buffered p-gate overvoltage protector. It is designed to protect monolithic SLICs (Subscriber Line Interface Circuits), against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISP61060 limits voltages that exceed the SLIC supply rail voltage. A SD6XAE Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -10 V to -70 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage, the overvoltage stress on the SLIC is minimised. (see Applications Information). Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage on-state condition. As the current subsides the high holding current of the crowbar prevents d.c. latchup. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 1 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. absolute maximum ratings SYMBOL VALUE UNIT Repetitive peak off-state voltage, IG = 0, -40C TJ 85C RATING VDRM -100 V Repetitive peak gate-cathode voltage, VKA = 0, -40C TJ 85C VGKRM -85 V Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 s 30 ITSP 10/160 s A 45 2/10 s 50 Non-repetitive peak on-state current (see Notes 1 and 2) 60 Hz sine-wave, 25 ms 6 ITSM 60 Hz sine-wave, 2 s Arms 1 Continuous on-state current (see Note 2) ITM 0.3 A Continuous forward current (see Note 2) IFM 0.3 A Operating free-air temperature range Storage temperature range Lead temperature 1,6 mm (1/16 inch) from case for 10 s TA -40 to +85 C Tstg -40 to +150 C TL 260 C NOTES: 1. Initially the protector must be in thermal equilibrium with -40C TJ 85C. The surge may be repeated after the device returns to its initial conditions. 2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above 85C, derate linearly to zero at 150C lead temperature. recommended operating conditions MIN CG Gate decoupling capacitor TYP MAX 100 UNIT nF electrical characteristics, -40C TJ 85C (unless otherwise noted) PARAMETER ID V(BO) IS VT Off-state current Breakover voltage Switching current On-state voltage VF Forward voltage IH Holding current TEST CONDITIONS VD = -85 V, VGK = 0 V MIN TJ = 25C TJ = 85C MAX A 50 A -53 dv/dt = -250 V/ms, Source Resistance = 300 , VGG = -65 V -68 IT = 12.5 A, 10/1000 s, Source Resistance = 80 , VGG = -50 V -55 dv/dt = -250 V/ms, Source Resistance = 300 , VGG = -50 V UNIT 5 dv/dt = -250 V/ms, Source Resistance = 300 , VGG = -50 V -100 V mA IT = 1 A 3 IT = 10 A 4 IT = 16 A 5 IT = 30 A 7 IF = 1 A 2 IF = 10 A 4 IF = 16 A 5 IF = 30 A V V 5 IT = -1 A, di/dt = +1A/ms, VGG = -50 V -150 PRODUCT 2 TYP mA INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS electrical characteristics, -40C TJ 85C (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS IGAS Gate reverse current VGG = -85 V, K and A terminals connected IGT Gate trigger current IT = -1 A, tp(g) 20 s, VGG = -50 V dv/dt CO Critical rate of rise of off-state voltage Anode-cathode off- MIN MAX UNIT 5 TJ = 85C 50 A 15 mA VGG = -50 V, (see Note 3) A -1000 f = 1 MHz, Vd = 0.1 V, IG = 0, (see Note 4) state capacitance TYP TJ = 25C V/s VD = 0 V 85 pF VD = -50 V 10 pF NOTES: 3. Linear rate of rise, maximum voltage limited to 80% VGG. 4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge. thermal characteristics PARAMETER RJA TEST CONDITIONS Junction to free air thermal resistance MIN TYP MAX UNIT Ptot = 0.8 W, TA = 25C D Package 170 5 cm2, FR4 PCB P Package 125 C/W PARAMETER MEASUREMENT INFORMATION Quadrant I +i IFSP (= |ITSP|) Forward Conduction Characteristic IFSM (= |ITSM|) IF VF VGK(BO) VGG -v VD ID I(BO) IH IS VT VS V(BO) +v IT ITSM Quadrant III ITSP Switching Characteristic -i PM6XAAA Figure 1. VOLTAGE-CURRENT CHARACTERISTIC PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 3 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS DEVICE PARAMETERS general Thyristor based overvoltage protectors, for telecommunications equipment, became popular in the late 1970s. These were fixed voltage breakover triggered devices, likened to solid state gas discharge tubes. As these were new forms of thyristor, the existing thyristor terminology did not cover their special characteristics. This resulted in the invention of new terms based on the application usage and device characteristic. Initially, there was a wide diversity of terms to describe the same thing, but today the number of terms have reduced and stabilised. Programmable, (gated), overvoltage protectors are relatively new and require additional parameters to specify their operation. Similarly to the fixed voltage protectors, the introduction of these devices has resulted in a wide diversity of terms to describe the same thing. To help promote an understanding of the terms and their alternatives, this section has a list of alternative terms and the parameter definitions used for this data sheet. In general, the Texas Instruments approach is to use terms related to the device internal structure, rather than its application usage as a single device may have many applications each using a different terminology for circuit connection. alternative symbol cross-reference guide This guide is intended to help the translation of alternative symbols to those used in this data sheet. As in some cases the alternative symbols have no substance in international standards and are not fully defined by the originators, users must confirm symbol equivalence. No liability will be assumed from the use of this guide. CROSS-REFERENCE FOR TISP61060 AND TCM1030/60 TISP61060 PARAMETER DATA SHEET ALTERNATIVE SYMBOL SYMBOL RATINGS & CHARACTERISTICS ALTERNATIVE PARAMETER TCM1060, TCM1030 Non-repetitive peak on-state pulse current ITSP - Non-repetitive peak surge current Non-repetitive peak on-state current ITSM - Non-repetitive peak surge current,10 ms Non-repetitive peak on-state current ITSM - Continuous 60-Hz sinewave, 2 s Forward voltage VF VCF Forward clamping voltage Forward current IF IFM Peak forward current On-state voltage VT VC Reverse clamping voltage On-state current IT ITM Peak reverse current Switching current IS Itrip Trip current Breakover voltage V(BO) Vtrip Trip voltage Gate reverse current (with A and K terminals connected) IGAS ID Stand-by current, TIP & RING at GND Off-state current ID ID Stand-by current, TIP & RING at VS Off-state voltage VD VS Supply voltage Gate-cathode breakover voltage VGK(BO) VOS Transient overshoot voltage VG VS Supply voltage CO Coff Off-state capacitance Cathode 1 K1 Tip Tip Cathode 2 K2 Ring Ring Anode A GND Ground Gate G VS Supply voltage Gate voltage, (VGG is gate supply voltage referenced to the A terminal) Off-state capacitance TERMINALS TCM1060, TCM1030 PRODUCT 4 INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS CROSS-REFERENCE FOR TISP61060 AND LB1201AB TISP61060 PARAMETER DATA SHEET ALTERNATIVE SYMBOL SYMBOL ALTERNATIVE PARAMETER RATINGS & CHARACTERISTICS LB1201AB Non-repetitive peak on-state pulse current ITSP IP Pulse current Non-repetitive peak on-state current ITSM IP RMS pulse current, 60 Hz On-state voltage VT VON On-state voltage Switching current IS It Trip current Breakover voltage V(BO) VT Trip voltage Maximum continuous on-state current ITM IC On-state current Maximum continuous forward current IFM IC On-state current VG VS Supply voltage CO COFF Off-state capacitance Gate voltage, (VGG is gate supply voltage referenced to the A terminal) Off-state capacitance TERMINALS LB1201AB Cathode 1 K1 Tip Tip Cathode 2 K2 Ring Ring Anode A GND Ground Gate G VS Supply voltage APPLICATIONS INFORMATION electrical characteristics The electrical characteristics of a thyristor overvoltage protector are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. gated protector evolution and characteristics This section covers three topics. Firstly, it is explained why gated protectors are needed. Second, the performance of the original IC (integrated circuit) based version is described. Third, the performance improvements given by the TISP61060 are detailed. purpose of gated protectors Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. As the SLIC was usually powered from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example of a fixed voltage SLIC protector. SLICs have become more sophisticated. To minimise power consumption, some designs automatically adjust the supply voltage, VBAT, to a value that is just sufficient to drive the required line current. For short lines the supply voltage would be set low, but for long lines, a higher supply voltage would be generated to drive sufficient line current. The optimum protection for this type of SLIC would be given by a protection voltage which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the SLIC supply, Figure 2. This gated (programmable) protection arrangement minimises the voltage stress on the SLIC, no matter what value of supply voltage. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 5 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS TIP WIRE 600 TIP WIRE GENERATOR 600 SOURCE RESISTANCE GENERATOR SOURCE 600 RESISTANCE R1 50 R1 50 R2 50 RING R2 600 WIRE 50 A.C. RING GENERATOR WIRE 0 - 600 Vrms A.C. GENERATOR 0 - 600 Vrms IC BASED SLIC PROTECTOR IC BASED SLIC PROTECTOR Th4 SLIC SLIC Th4 Th5 SWITCHING MODE POWER SUPPLY Tx SWITCHING MODE POWER SUPPLY Tx D2 C2 Th5 C1 100 nF C1 100 nF IG ISLIC IG ISLIC IBAT VBAT D2 C2D1 IBAT VBAT AI6XAD D1 Figure 2. SIMPLIFIED IC BASED SLIC PROTECTOR CIRCUIT AI6XAD ic based protectors In 1986, an IC based gated protector was proposed (A 90 V Switching Regulator and Lightning Protection Chip Set, Robert K. Chen, Thomas H. Lerch, Johnathan S. Radovsky, D. Alan Spires, IEEE Solid-State Circuits Conference, February 20, 1986, pp 178/9 and pp 340/1). Commercially, this resulted in the AT&T Microelectronics LB1201AB device and the higher current Texas Instruments Inc. TCM1060 device This implementation consisted of four diodes and two high holding current thyristors. Positive overvoltages on the line wires are clipped to ground by forward conduction of the wire to ground diodes. Negative overvoltages are initially clipped close to the SLIC negative supply rail, VBAT, by conduction of the thyristor cathode-gate and gate series diode. This means that the protection voltage level for slow wave forms will be about 1.5 V lower than the SLIC supply voltage. If sufficient current is available from the overvoltage, then the thyristor will switch into a low voltage on-state condition. When the thyristor crowbars, the two series gate diodes prevent the SLIC supply from being shorted to ground via the thyristor gate. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup (see Figure 1). impulse protection performance The impulse protection voltage will be the sum of the gate supply (VBAT) and the impulse peak gate-cathode voltage (VGK(BO)). Capacitor C1 provides the pulse of gate current that occurs during fast rising impulses. The protection voltage will be increased if there is a long connection between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse (e.g. 2/10), the gate current (IG) is the same as the cathode current (IK). Rates of 70 A/s can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring track. To minimise this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimised. Inductive voltages in the protector cathode wiring can increase the protection voltage. These voltages can be minimised by routing the SLIC connection through the protector as shown in Figure 2. a.c. protection performance Figure 2 shows a typical a.c. power cross test circuit. A variable voltage a.c. source is applied to the line card via 600 series resistors. On the line card there are further series resistors R1 and R2. These resistors provide over-current protection by fusing or going high resistance under high current a.c. conditions. Figure 3 shows the gate and cathode a.c. power line cross voltage and current wave forms of the IC based protector. Positive voltages are clipped at about +1 V by diode conduction. Negative voltages are clipped to about -52 V as the SLIC supply voltage was -50 V. Sufficient current (200 mA) was available to cause the PRODUCT 6 INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS 10 0 Voltage - V -10 -20 VK -30 VG -40 -50 -60 0 5 10 Time - ms 15 20 100 75 500 IG 50 250 25 0 0 -25 -250 IK -50 -500 IG - Gate Current - mA IK - Cathode Current - mA 750 -75 -750 -100 0 5 10 Time - ms 15 20 AI6XAG Figure 3. IC PROTECTOR POWER CROSS WAVE FORMS thyristor to switch into the low-voltage on-state condition. At the end of the negative half cycle, the thyristor switches off when the current falls below the holding current value (300 mA). Switch-off and re-clipping at -52 V causes a second pulse of gate current. The wire current drawn by the protector is quasi-sinusoidal During the positive a.c. voltage period (diode clipping) there is no gate current. During the negative a.c. voltage period there are two triangular pulses of gate current, which peak at about 80 mA. This is current which flows into the gate terminal as indicated by the IG current arrow in Figure 2. This direction of current charges the VBAT supply. This would not be a problem if the VBAT supply was a rechargeable battery. However, often the supply is generated from a switching mode power supply or the SLIC supply feed has a series diode which blocks reverse (charging) current flow to the battery. In these cases the supply can only sink current in the direction shown by the IBAT arrow in Figure 2. Unless the SLIC current, ISLIC, is equal or greater than IG the value of VBAT will increase, possibly to a level which causes destruction of the SLIC. The maximum average value of IG occurs when the thyristor only clips the voltage and the peak cathode current is just beginning to approach the switching (IS) value, see Figure 4. The average current is maximised under high source impedance conditions (e.g. 600 ). In the case of the LB1201AB, it is recommended that the supply should be able to absorb 700 mA of "wrong way" current. If the supply cannot absorb the current then a shunt breakdown diode is recommended to provided a path for the gate current to ground (D2 in Figure 2). High power diodes are expensive, so diode D2 is usually low power, purposely selected to fail under this a.c. condition and protect the SLIC. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 7 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS 10 0 Voltage - V -10 VK -20 -30 VG -40 -50 -60 0 5 10 Time - ms 15 20 100 80 200 IG 60 40 100 20 0 0 -20 -100 -40 IK -60 -200 IG - Gate Current - mA IK - Cathode Current - mA 300 -80 -300 -100 0 5 10 15 20 AI6XAH Time - ms Figure 4. IC PROTECTOR HIGH IMPEDANCE POWER CROSS CLIPPING WAVE FORMS TIP WIRE 600 SLIC TISP61060 R1 50 Th4 GENERATOR SOURCE RESISTANCE R2 50 600 SWITCHING MODE POWER SUPPLY Tx Th5 RING WIRE A.C. GENERATOR 0 - 600 Vrms C1 100 nF IG C2 ISLIC IBAT VBAT D1 AI6XAE Figure 5. TISP61060 BUFFERED GATE PROTECTOR TISP61060 buffered gate protector The TISP61060 improves on the original IC based design in three ways, Figure 5. Firstly, the thin lateral IC structure has been changed to a vertical power device structure for increased area efficiency and greater PRODUCT 8 INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS 10 0 Voltage - V -10 VK -20 -30 VG -40 -50 -60 0 5 10 Time - ms 15 20 10 8 IG 200 6 4 IK 100 2 0 0 IG -2 -100 -4 -6 -200 -8 IK -300 0 5 10 15 IG - Gate Current - mA IK - Cathode Current - mA 300 -10 20 Time - ms AI6XAI Figure 6. TISP61060 HIGH IMPEDANCE POWER CROSS CLIPPING WAVE FORMS energy capability. Second, the series gate diodes have been changed to transistor buffers. The maximum current injected into the gate supply is then reduced by the transistors gain factor (HFE). Third, some current from the positive voltage diode conduction has been diverted to the gate terminal which subtracts from the normal gate current. In most cases, this allows any previously used SLIC supply rail shunt protection diode to be removed. Although the SLIC supply is taken to a terminal that is internally connected to transistor bases, the terminal is still designated as the gate terminal, G. Figure 6 shows the high impedance a.c. waveforms for the TISP61060. As the TISP61060 replaces the IC based protector's gate diode with a transistor, the peak gate current is reduced by over 50 times. In addition there is a compensating negative gate current flow during diode conduction. The TISP61060 has the maximum value of peak gate current specified and so allows for designer to design for limit conditions. Most IC protectors do not specify this parameter. Figure 7 shows the improvement due to the TISP61060. These plots show the full cycle average gate current against rms a.c. voltage. The IC based protector has a substantial positive gate current which will always charge the SLIC supply, possibly causing an overvoltage. The TISP61060 has a negative gate current and so cannot overvoltage the SLIC. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 9 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS 25 IG(AV) - Average Gate Current - mA Figure 4. Condition Figure 2. and Figure 5. Test Circuits 20 Protector Starting to Crowbar 15 Figure 3. Condition 10 5 IC Based Protector 0 -5 Figure 6. Condition TISP61060 -10 0 100 200 300 400 500 AI6XAJ VAC - RMS Supply Voltage - V Figure 7. AVERAGE GATE CURRENT VS A.C. SUPPLY VOLTAGE IN FIGURES 2 AND 5 circuit component values The TISP61060 is a functional replacement for three devices, the LB1201, TCM1030 and TCM1060. These devices have a minimum value of series limiting resistor (R1 and R2 in Figure 2) which will ensure that the impulse surge current will not exceed the device rated value. This is summarised in the table below. 10/1000 1 kV, 10 10/160 1.5 kV, 7.5 2/10 2.5 kV, 5 ITSP A 12.5 18.5 23 MIN. SERIES RESISTANCE 70 73.6 104 ITSP A 16 25 35 MIN. SERIES RESISTANCE 52.5 52.5 66.4 ITSP A 30 45 50 MIN. SERIES RESISTANCE 23.3 25.8 45 ITSP A 30 45 50 MIN. SERIES RESISTANCE 23.3 25.8 45 DEVICE LB1201 TCM1030 TCM1060 TISP61060 RECCOMMENDED MIN. SERIES RESISTANCE 100 100 50 50 This table shows that the TISP61060 has impulse ratings which are higher or equal to those of the other three devices. Similarly, the TISP61060 has a.c. ratings which are higher or equal to those of the other three devices. A series over-current protector should be included in the wire feed to prevent exceeding the PRODUCT 10 INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS TISP61060 a.c. ratings. As covered earlier, the gate decoupling capacitor should be 100 nF and should be mounted as close to the protector as possible. application circuit Figure 8 shows a typical TISP61060 SLIC card protection circuit. The incoming line wires, R and T, connect to the relay matrix via the series over-current protection. Fusible resistors, fuses and positive temperature coefficient (PTC) resistors can be used for over-current protection. Resistors will reduce the prospective current from the surge generator for both the TISP61060 and the ring/test protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator configuration maybe ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as its inter-wire protection voltage is twice the wire to ground value. TIP WIRE OVERCURRENT PROTECTION RING/TEST PROTECTION TEST RELAY RING RELAY Th1 R1 SLIC RELAY S3a SLIC PROTECTOR SLIC Th4 S2a S1a Th3 RING WIRE R2 Th5 Th2 TISP 3xxxF3 OR 7xxxF3 S3b S1b S2b TISP 61060 VBAT 100 nF TEST EQUIPMENT RING GENERATOR AI6XAF Figure 8. TYPICAL APPLICATION CIRCUIT Relay contacts 3a and 3b connect the line wires to the SLIC via the TISP61060 protector. The protector gate reference voltage comes from the SLIC negative supply (VBAT). A 100 nF gate capacitor sources the high gate current pulses caused by fast rising impulses. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 11 TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 8-pin Small Outline Microelectronic Standard Package MS-012, JEDEC Publication 95 5,00 (0.197) 4,80 (0.189) 6,20 (0.244) 5,80 (0.228) 8 7 6 5 1 2 3 4 INDEX 4,00 (0.157) 3,81 (0.150) 7 NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 5,21 (0.205) 4,60 (0.181) 0,50 (0.020) x 45NOM 0,25 (0.010) 7 NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 0,229 (0.0090) 0,190 (0.0075) 4 4 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within 0,051 (0.002). PRODUCT 12 MDXXAAC INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISP61060D, TISP61060P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS MECHANICAL DATA P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly. P008 9,75 (0.384) 9,25 (0.364) 8 7 6 5 Index Notch 6,60 (0.260) 6,10 (0.240) 1 2 3 4 8,23 (0.324) 7,62 (0.300) 1,78 (0.070) MAX 4 Places 5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 0,53 (0.021) 0,38 (0.015) 8 Places 3,17 (0.125) MIN 2,54 (0.100) Typical (see Note A) 6 Places 0,36 (0.014) 0,20 (0.008) 9,40 (0.370) 8,38 (0.330) ALL LINEAR DIMENSIONS IN MILLIMETERS AND PARANTHETICALLY IN INCHES MDXXCF NOTES: A. Each pin centreline is located within 0,25 (0.010) of its true longitudinal position. B. Dimensions fall within JEDEC MS001 - R-PDIP-T, 0.300" Dual-In-Line Plastic Family. C. Details of the previous dot index P008 package style, drawing reference MDXXABA, are given in the earlier publications. PRODUCT INFORMATION SEPTEMBER 1995 - REVISED AUGUST 2002 Specifications are subject to change without notice. 13