Datashee
t
Product structureSilicon monolithic integrated circuitThis product is not designed protection against radioactive rays
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14.Jul.2014 Rev.006
Single-Output LDO Regulators
Ultra Low Quiescent Current LDO
Regulator
BD7xxL2EFJ/FP/FP3-C
General Description
The BD7xxL2EF J /F P/FP3-C are low quiescent
regulators featuring 50V a bsolute maximum voltage,
and output voltage accuracy of ±2%, 200mA output
current and 6μA (Typ.) current consumption. There
regulators are therefore ideal for applications
requiring a direct connection to the battery and a
low current consumption. Ceramic capacitors can
be used for compensation of the output capacitor
phase. Furthermore, these ICs also feature
overcurrent protection to protect the device from
damage caused by short-circuiting and an
integrated thermal shutdown to protect the device
from overheating at overload conditions.
Features
Ultra low quiescent current: 6μA (Typ.)
Output current capability: 200mA
Output voltage: 3.3 V or 5.0 V(Typ.)
High output voltage accuracy: ±2%
Low saturation voltage by using PMOS output
transistor.
Integrated overcurrent protection to protect the
IC from damage caused by output
short-circuiting.
Integrated thermal shutdown to protect the IC
from overheating at overload conditions.
Low ESR ceramic capacitor can be used as
output capacitor.
HTSOP-J8, TO252-3, SOT223-4F 3type
package
Key specification
Ultra low quiescent current: 6μA (Typ.)
Output voltage: 3.3 V or 5.0 V (Typ.)
Output current capability: 200mA
High output voltage accuracy: ±2%
Low ESR ceramic capacitor
can be used as output capacitor
AEC-Q100 Qualified
Packages W (Typ.) x D (Typ.) x H (Max.)
EFJ: HTSOP-J8 4.90mm x 6.00mm x 1.00mm
FP: TO252-3 6.50mm x 9.50mm x 2.50mm
FP3: SOT223-4F 6.53mm x 7.00mm x 1.80mm
Applications
Automotive (body, audio system, navigation system, etc.)
Typical Application Circuit s
Components externally connected: 0.1 µF CIN, 4.7 µF COUT (Typ.)
*Electrolytic, tantalum and ceramic capacitors can be used.
Figure 2. Typical Application Circuits
Figure 1. Package Outlook
HTSOP-J8 TO252-3 SOT223-4F
1:VCC 2:N.C. 3:VOUT
FIN
BD7xxL2FP-C
Datasheet
Datasheet
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Ordering Information
B D 7 x x L 2 E F J - C E 2
Lineup
Output current
ability Output voltage
(Typ.) Package type Orderable Part Number
200 mA
3.3 V
HTSOP-J8 BD733L2EFJ-CE2
TO252-3 BD733L2FP-CE2
SOT223-4F BD733L2FP3-CE2
5.0 V
HTSOP-J8 BD750L2EFJ-CE2
TO252-3 BD750L2FP-CE2
SOT223-4F BD750L2FP3-CE2
Package
EFJ: HTSOP-J8
FP: TO252-3
FP3: SOT223-4F
Taping
E2: reel-wound
embossed tamping
Output Voltage
33: 3.3V
50: 5.0V
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Pin Configuration
Figure 3. Pin Configuration
Pin Description
Pin No. Pin Name Function
1 VOUT Output pin
2 N.C. Not connected
3 N.C. Not connected
4 N.C. Not connected
5 GND GND
6 N.C. Not connected
7 N.C. Not connected
8 VCC Supply voltage input pin
Pin No. Pin Name Function
1 VCC Supply voltage input pin
2 N.C./GND TO252-3: N.C.
SOT223-4F: GND
3 VOUT Output pin
FIN GND GND
HTSOP-J8
(N.C. terminals are not need to connect to GND.
(Exposed die pad is need to be connected to GND.)
(N.C. terminals are not need to connect to GND.)
TO252-3, SOT223-4F
HTSOP-J8
(TOP VIEW) TO252-3
(TOP VIEW) SOT223-4F
(TOP VIEW)
1 2 3 4
8 7 6 5
123
FIN
1 2 3
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Block Diagram
HTSOP-J8
TO252-3, SOT223-4F
Figure 4. Block Diagram
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Absolute Maximum RatingsTa=25°C
Parameter Symbol Ratings Unit
Supply Voltage *1 VCC -0.3 to +50.0 V
Power Dissipation
HTSOP-J8 *2 Pd 0.75 W
TO252-3 *2 Pd 1.3 W
SOT223-4F *2 Pd 0.6 W
Operating Temperature Range Topr -40 to +125 °C
Storage Temperature Range Tstg -55 to +150 °C
Maximum Junction Temperature Tjmax 150 °C
*1 Pd should not be ex ceeded.
*2 HTSOP-J8 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta 25 °C, reduce by 6.0 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
TO252-3 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta 25 °C, reduce by 10.4 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
SOT223-4F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC. If Ta 25 °C, reduce by 4.8 mW/°C.
(1-layer PCB: Copper foil area on the reverse side of PCB: 0 mm x 0 mm)
Operating Conditions-40 < Ta < +125°C
BD733L2EFJ/FP/FP3-C
Parameter Symbol Min. Max. Unit
Supply Voltage *3 VCC 4.37 45.0 V
Startup Voltage *4 VCC 3.0 - V
Output Current IOUT 0 200 mA
BD750L2EFJ/FP/FP3-C
Parameter Symbol Min. Max. Unit
Supply Voltage *3 VCC 5.8 45.0 V
Startup Voltage *4 VCC 3.0 - V
Output Current IOUT 0 200 mA
*3 For output voltage, refer to the dropout voltage corresponding to the output current.
*4 When IOUT=0mA.
Datasheet
Datasheet
. 6/29 TSZ02201-0G1G0AN00010-1-2
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Thermal Resistance
*5 HTSOP-J8 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
*6 TO252-3 mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
*7 SOT223-4F mounted on 114.3 mm x 76.2 mm x 1.6 mmt Glass-Epoxy PCB based on JEDEC.
(4-layer PCB: Copper foil on the reverse side of PCB: 74.2 mm x 74.2 mm)
Parameter Symbol Min. Max. Unit
HTSOP-J8 Package
Junction to Ambient *5 θja 43.1 °C/W
Junction to Case (bottom) *5 θjc 10 °C/W
TO252-3 Package
Junction to Ambient *6 θja 24.5 °C/W
Junction to Case (bottom) *6 θjc 3 °C/W
SOT223-4F Package
Junction to Ambient *7 θja 83.3 °C/W
Junction to Case (bottom) *7 θjc 17 °C/W
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Electrical Characteristics (BD733L2EFJ/FP/FP3-C)
(Unless otherwise specified, -40 < Ta < +125°C, VCC= 13.5V, IOUT=0mA, Reference value: Ta=25°C)
Parameter Symbol
Limit Unit Conditions
Min. Typ. Max.
Bias current Ib - 6 15
μA
Output voltage VOUT 3.23 3.30 3.37 V 8V < VCC < 16V
0mA < IOUT < 100mA
Dropout voltage ΔVd - 0.6 1.0 V VCC=VOUT×0.95, IOUT=200mA
Ripple rejection R.R. 50 63 - dB f=120Hz, ein=1Vrms,
IOUT=100mA
Line regulation Reg I - 5 20
mV 8V < VCC < 16V
Load regulation Reg L - 5 20
mV 10mA < IOUT < 200mA
Electrical Characteristics (BD750L2EFJ/FP/FP3-C)
(Unless otherwise specified, -40 < Ta < +125°C, VCC= 13.5V, IOUT=0mA, Reference value: Ta=25°C)
Parameter Symbol
Limit Unit Conditions
Min. Typ. Max.
Bias current Ib - 6 15 μA
Output voltage VOUT 4.9 5.0 5.1 V 8V < VCC < 16V
0mA < IOUT < 100mA
Dropout voltage ΔVd - 0.4 0.7 V
VCC=VOUT×0.95, IOUT=200mA
Ripple rejection R.R. 50 60 - dB f=120Hz, ein=1Vrms,
IOUT=100mA
Line regulation Reg I - 5 20 mV 8V < VCC < 16V
Load regulation Reg L - 5 20 mV 10mA < IOUT < 200mA
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Typical Performance Curves
BD733L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
Figure 5. Bias current
Figure 8. Output voltage vs. Load
Figure 6. Output voltage vs. Supply voltage
IOUT=10mA
Figure 7. Output voltage vs. Supply voltage
IOUT=100mA
0
1
2
3
4
5
6
01020304050
SUPPLY VOLTAGE : VCC[V]
O UT PUT VOLTAG E : VO UT[ V
]
0
1
2
3
4
5
6
01020304050
SUPPLY VOLTAG E : VCC[V]
OUTPUT VO LTAG E : VOUT[ V
]
0
1
2
3
4
5
6
0 200 400 600 800 1000
OUTPUT CURRENT : IOUT[mA ]
O UT PUT VOLT AGE : VO UT[ V
]
-40°C
25°C
125°C
-40°C
25°C
125°C
-40°C
25°C
125°C
0
10
20
30
40
50
60
70
80
90
100
0 1020304050
SUPPLY VOLTAGE : VCC[V]
BI AS CURRENT : lb[μA]
-40
25
125
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
BD733L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
0
1
2
3
4
5
6
100 120 140 160 180 200
AMBIENT TEMPERATURE : T a[]
OUTPUT VO LTAG E : VOUT[ V
]
Figure 9. Dropout voltage
Figure 11. Total supply current vs. Load Figure 12. Thermal shutdown
(Output voltage vs. Temperature)
Figure 10. Ripple rejection
(ein=1Vrms,IOUT=100mA)
0.0
0.4
0.8
1.2
0 40 80 120 160 200
OUTPUT CURRENT : IOUT[mA ]
DRO P OUT : Vd[V]
0
10
20
30
40
50
60
70
80
90
10 100 1000 10000 100000
FREQUENCY : f[Hz]
RI PPLE RE J E CTI ON : R. R.[ dB ]
-40°C
25°C
125°C
-40°C
25°C
125°C
0
2
4
6
8
10
12
14
16
18
20
0 40 80 120 160 200
O UTPUT CURRENT : IO UT[ mA]
BIAS CURRE NT : lb[μA]
-40
25
125
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
BD733L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
Figure 13. Output voltage vs. Temperature Figure 14. Quiescent current vs. Temperature
3.280
3.285
3.290
3.295
3.300
3.305
3.310
3.315
-40 0 40 80 120
AMBIENT TEMPERATURE : T a[]
OUTPUT VO LTAGE : VOUT[ V
]
4
5
6
7
8
9
10
-40 0 40 80 120
AMBIENT T EMPERAT URE : T a[]
BIAS CURRENT : lb[ μA]
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
BD750L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
Figure 15. Bias current Figure 16. Output voltage vs. Supply voltage
Figure 17. Output voltage vs. Supply voltage
IOUT=100mA Figure 18. Output voltage vs. Load
0
1
2
3
4
5
6
7
8
0 1020304050
SUPPLY V O LTAG E : VCC[V]
OUTPUT VO LTAG E : VOUT[ V
]
0
1
2
3
4
5
6
7
8
0 200 400 600 800 1000
OUTPUT CURRENT : IOUT[mA ]
OUTPUT VOLTAG E : VO UT[ V
]
-40°C
25°C
125°C
-40°C
25°C
125°C
0
1
2
3
4
5
6
7
8
0 1020304050
SUPPLY VOLTAGE : VCC[V]
OUTPUT VOLTAGE : VOUT[V]
-40°C
25°C
125°C
0
10
20
30
40
50
60
70
80
90
100
01020304050
SUPPLY VOLTAGE : VCC[V]
BIAS CURRE NT : lb[ μA] .
-40
25
125
Datasheet
Datasheet
. 12/29 TSZ02201-0G1G0AN00010-1-2
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
BD750L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
0
10
20
30
40
50
60
70
80
90
10 100 1000 10000 100000
F RE QUENCY : f [Hz]
RI PPLE RE J E CTI ON : R. R.[ dB ]
0
1
2
3
4
5
6
100 120 140 160 180 200
AMBIENT T EMPERA T URE : T a[]
O UTPUT VO LTAG E : VO UT[ V
]
Figure 20. Ripple rejection
(ein=1Vrms,IOUT=100mA)
Figure 21. Total supply c urrent vs. Load Figure 22. Thermal shutdown
(Output voltage vs. Temperature)
Figure 19. Dropout voltage
-40°C
25°C
125°C
0.0
0.4
0.8
1.2
0 40 80 120 160 200
OUT P UT CURRENT : I OUT [mA]
DRO POUT VO LTAG E : Vd[V]
-40°C
25°C
125°C
0
2
4
6
8
10
12
14
16
18
20
0 40 80 120 160 200
OUTPUT CURRENT : IOUT[mA ]
BIAS CURRENT : lb[μA] .
-40
25
125
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
BD750L2EFJ/FP/FP3-C Reference data
Unless otherwise specified: -4 0 < Ta < +125°C, VCC=13.5V, IOUT=0mA
Figure 23. Output voltage vs. Temperature
Figure 24. Bias current vs. Temperature
4.970
4.975
4.980
4.985
4.990
4.995
5.000
5.005
5.010
5.015
5.020
-40 0 40 80 120
AMBIENT T E MPERATURE : T a[]
OUTPUT VOLTAG E : VO UT[V
]
4
5
6
7
8
9
10
-4004080120
AMBIENT TEMPERATURE : Ta[]
BI AS CURRENT : lb[μA]
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Reference data (BD7xxL2EFJ-C Series) HTSOP-J8
Reference data (BD7xxL2FP-C Series) TO252-3
Measurement setup for Figure 5, 14, 15, 24 Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23 Measurem ent setup for Figure 8, 18
Measurement setup for Figure 9, 19 Measurement setup for Figure 10, 20 Measurement setup for Figure 11, 21
Measurement setup for Figure 5, 14, 15, 24 Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23 Measurement setup for Figure 8, 18
Measurement setup for Figure 9, 19 Measurement setup for Figure 10, 20 Measurement setup for Figure 11, 21
BD7xxL2EFJ-C
8:VCC 7:N.C. 6:N.C. 5:GND
1:VOUT 2:N.C. 3:N.C. 4:N.C.
1µF
4.7µF
1Vrms
IOUT
BD7xxL2EFJ-C
8:VCC 7:N.C. 6:N.C. 5:GND
1:VOUT 2:N.C. 3:N.C. 4:N.C.
1µF
4.7µF
BD7xxL2EFJ-C
8:VCC 7:N.C. 6:N.C. 5:GND
1:VOUT 2:N.C. 3:N.C. 4:N.C.
1µF
4.7µF IOUT
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Reference data (BD7xxL2FP3-C Series) SOT223-4F
Measurement setup for Figure 5, 14, 15, 24 Measurement setup for
Figure 6, 7, 12, 13, 16, 17, 22, 23 Measurem ent setup for Figure 8, 18
Measurement setup for Figure 9, 19 Measurement setup for Figure 10, 20 Measurement setup for Figure 11, 21
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Selection of Components Externally Connected
VCC pin
Insert capacitors with a capacitance of 0.1μF or higher between the VCC and GND pin. Choose the capacitance
according to the line between the power smoothing circuit and the VCC pin. Selection of the capacitance also
depends on the application. Verify the application and allow for sufficient margins in the design. We recommend
using a capacitor with excellent voltage a nd temperature characteristics.
Output pin capacitor
In order to prevent oscillation, a capacitor needs to be placed bet ween the output pin and GND p in. We recommend
using a capacitor with a capacitance of 4.7μF or higher. Electrolytic, tantalum and ceramic capacitors can be us ed.
When selecting the capacitor ensure that the capacitance of 4.7μF or higher is maintained at the intended applied
voltage and temperature range. Due to changes in temperature the capacitor’s capacitance can fluctuate possibly
resulting in oscillation. For selection of the capacitor refer to the IOUT vs. ESR data. The stable operation range
given in the reference data is based on the standalone IC and resistive load. For actual applications the stable
operating range is influenced by the PCB impedance, input supply impedance and load impedance. Therefore
verification of the final operating environment is needed.
When selecting a ceramic type capac itor, we recommend using X5 R, X7R or better with excellent temperature and
DC-biasing characteristics and hig h voltag e tolerance.
Also, in case of rapidly changing input voltag e and load current, select the capacitance in accordance with verifying
that the actual application meets with the required specification.
Measurement setup
Condition
VCC=13.5V
CIN=0.1μF
4.7µF < COUT < 100µF
Ta=-40 < Ta < +125
Condition
VCC=13.5V
CIN=0.1µF
4.7µF < COUT < 100µF
Ta=-40 < Ta < +125
TO252-3 SOT223-4F
HTSOP-J8
BD7xxL2EFJ-C
8:VCC 7:N.C. 6:N.C. 5:GND
1:VOUT 2:N.C. 3:N.C. 4:N.C.
CIN
IOUT
COUT
ESR
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
5.1 W
1.3 W
0
1
2
3
4
5
6
0 255075100125150
Power Dissipation: Pd[W]
Ambient Temperature: Ta[°C]
Power Dissipation
HTSOP-J8
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 11 4.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2 mm × 74.2 mm)
Condition: θja = 166.7 °C/W, θjc(top) = 45 °C/W
Condition: θja = 43.1 °C/W, θjc(top) = 16 °C/W,
θjc(bottom) = 10 °C/W
TO252-3
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 11 4.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
Condition: θja = 96.2 °C/W, θjc(top) = 22 °C/W
Condition: θja = 24.5 °C/W, θjc(top) = 5 °C/W,
θjc(bottom) = 3 °C/W
0
1
2
3
4
5
0 255075100125150
Power Dissipation: Pd[W]
Ambient Temperature: Ta[˚С]
0.75 W
2.9 W
Figure 25. Package Data
(HTSOP-J8)
Figure 26. Package Data
(TO252-3)
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
SOT223-4F
IC mounted on ROHM standard board based on JEDEC.
Board material: FR4
Board size: 11 4.3 mm × 76.2 mm × 1.6 mmt
(with thermal via on the board)
Mount condition: PCB and exposed pad are soldered.
Top copper foil: The footprint ROHM recommend.
+ wiring to measure.
: 1-layer PCB
(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)
: 4-layer PCB
(2 inner layers and copper foil area on the reverse side of PCB:
74.2mm × 74.2 mm)
Condition: θja = 208.3 °C/W, θjc(top) = 52 °C/W
Condition: θja = 83.3 °C/W, θjc(top) = 36 °C/W,
θjc(bottom) = 17 °C/W
1. 5 W
0. 6 W
0
1
2
3
4
5
0 255075100125150
Power Dissipation: Pd[W]
Ambient Temperature: Ta[°C]
Figure 27. Package Data
(SOT223-4F)
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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Refer to the heat mitigation characteristics illustrated in Fig ure 25 to Figur e 27 when using the IC in an environm ent of Ta25°C.
The characteristics of the IC are greatly influenced by the operating temperature, and it is necessary to operate under the
maximum junction temperature Timax.
Even if the ambient temperature Ta is at 25°C it is possible that the junction temperature Tj reaches high temperatures.
Therefore, the IC should be operated within the power dissipation range.
The following method is used to calculate th e power consumption Pc (W)
Pc=(VCCVOUT)×IOUTVCC×Ib
Power dissipation PdPc
The load current Lo is obtained by operating the IC within the power dissipation range.
(Refer to Figure 11 and Figure 21 for the Ib)
Thus, the maximum load current IOUT m ax for the applied voltage VCC can be calculated during the thermal design process.
HTSOP-J8
Calculation example 1) with Ta=125°C, VCC=13.5V, VOUT=3.3V
At Ta=125°C with Figure 25 condition, the calculation shows that ca 56.4mA of output current is possibl e at 10.2V potential
difference across input and output.
Calculation example 2) with Ta=125°C, VCC=13.5V, VOUT=5.0V
At Ta=125°C with Figure 25 condition, the calculation shows that ca 67.7mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follo ws:
Pc=VCC×(Ib+Ishort) (Refer to Figure 8 and F ig ure 18 for the Ishort)
VCC : Input voltage
VOUT : Output voltage
IOUT : Load current
Ib : Bias current
Ishort : Shorted current
IOUT56.4mA (Ib: 6µA)
0.57613.5×Ib
10.2
IOUT
IOUT67.7mA (Ib: 6µA)
0.57613.5×Ib
8.5
IOUT
θja=43.1°C/W -23.2mW/°C
25°C=2.90W 125°C=0.576W
θja=43.1°C/W -23.2mW/°C
25°C=2.90W 125°C=0.576W
IOUT PdVCC×Ib
VCCVOUT
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
TO252-3
Calculation example 3) with Ta=125°C, VCC=13.5V, VOUT=3.3V
At Ta=125°C with Figure 26 condition, the calculation shows that ca 100mA of output current is possible at 10.2V potential
difference across input and output.
Calculation example 4) with Ta=125°C, VCC=13.5V, VOUT=5.0V
At Ta=125°C with Figure 26 condition, the calculation shows that ca 120mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follo ws:
Pc=VCC×(Ib+Ishort) (Refer to Figure 8 and F ig ure 18 for the Ishort)
IOUT100mA (Ib: 6µA)
IOUT1.0213.5×Ib
10.2 θja=24.5°C/W -40.8mW/°C
25°C=5.10W 125°C=1.02W
IOUT120mA (Ib: 6µA)
IOUT1.0213.5×Ib
8.5 θja=24.5°C/W -40.8mW/°C
25°C=5.10W 125°C=1.02W
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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SOT223-4F
Calculation example 7) with Ta=125°C, VCC=13.5V, VOUT=3.3V
At Ta=125°C with Figure 27 condition, the calculation shows that ca 29.4mA of output current is possibl e at 10.2V potential
difference across input and output.
Calculation example 8) with Ta=125°C, VCC=13.5V, VOUT=5.0V
At Ta=125°C with Figure 27 condition, the calculation shows that ca 35.2mA of output current is possible at 8.5V potential
difference across input and output.
The thermal calculation shown above should be taken into consideration during the thermal design in order to keep the whole
operating temperature range within the power dissipation range.
In the event of shorting (i.e. VOUT and GND pins are shorted) the power consumption Pc of the IC can be calculated as follo ws:
Pc=VCC×(Ib+Ishort) (Refer to Figure 8 and F ig ure 18 for the Ishort)
IOUT29.4mA (Ib: 6µA)
IOUT0.3013.5×Ib
10.2
IOUT35.2mA (Ib: 6µA)
IOUT0.3013.5×Ib
8.5
θja=83.3°C/W -12.0mW/°C
25°C=1.50W 125°C=0.30W
θja=83.3°C/W -12.0mW/°C
25°C=1.50W 125°C=0.30W
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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Application Examples
Applying positive surg e to the VCC pin
If the possibility exists that surges higher than 50V will be applied to the VCC pin, a zenar diode should be placed
between the VCC pin and GN D pin as shown in the figure below.
Applying negative surge to the VCC pin
If the possibility exists that negative surges lower than the GND are applied to the VCC pin, a Shottky diode should be
place between the VCC pi n and GND pin as shown in the figure below.
Implementing a protection diode
If the possibility exists that a large inductiv e load is connected to the output pin resulting i n back-EMF at time of startup
and shutdown, a protection diode should be placed as shown in the figure below.
I/O equivalence circuits
Output terminal *inside of () shows 5V Input terminal
VOUT
SOT223-4FHTSOP-J8
SOT223-4FHTSOP-J8 TO252-3
TO252-3
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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Operational Notes
1) Absolute maximum ratings
Exceeding the absolute maximum rating for supply voltage, operating temperature or other parameters can result in
damages to or destruction of the chip. In this event it also becomes impossible to determine the cause of the damage
(e.g. short circuit, open circuit, etc.). Therefore, if any special mode is being considered with values expected to exceed
the absolute maximum ratings, implementing physical safety measures, such as adding fuses, should be consid ered.
2) The electrical characteristics given in this specification may be influenced by conditions such as temperature, supply
voltage and external components. Transient characteristics should be sufficiently verified.
3) GND electric potential
Keep the GND pin potential at the lowest (minimum) level under any operating condition. Furthermore, ensure that,
including the transient, none of the pin’s voltages are less than the GND pin voltage.
4) GND wiring pattern
When both a small-signa l GND and a high current GND are present, single-point grounding (at the set standard point) is
recommended. This in order to separate the small-signal and high current patterns and to ensure that voltage changes
stemming from the wiring resistance and high current do not cause an y voltage change in the small-signal GND. Similarl y,
care must be taken to avoid wiring pattern fluctuations in any connected external component GND.
5) Inter-pin shorting and mounting errors
Ensure that when mounting the IC on the PCB the direction and position are correct. Incorrect mounting may result in
damaging the IC. Also, shorts caused by dust entering between the output, input and GND pin may result in damaging
the IC.
6) Inspection using the set board
The IC needs to be discharged after each inspection process as, while using the set board for inspection, connecting a
capacitor to a low-impedance pin may cause stress to the IC. As a protection from static electricity, ensure that the
assembly setup is grounded and take sufficient caution with transportation and storage. Also, make sure to turn off the
power supply when connecti ng and disconnecting the inspection equipment.
7) Power dissipation (Pd)
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute ma ximum rating of the Pd stated in this specific ation is when the
IC is mounted on a 70mm X 70mm X 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd ratin g.
8) Thermal design
The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin
should be allowed for in the thermal desi gn. On the revers e side of the p ackage this product has a n ex posed he at pad for
improving the heat dissipatio n. Use both the front and reverse side of the PCB to incre ase the heat dissipation patter n as
far as possible. The amount of heat generated depends on the voltage difference across the input and output, load
current, and bias current. Therefore, when actually using the chip, ensure that the generated heat does not exceed the
Pd rating.
Tjmax: maximum junction temperature=150°C, Ta: ambient temperature (°C), θja: junction-to-ambient thermal
resistance (°C/W), Pd: power dissipation rating (W), Pc: power consumption (W), VCC: input voltage,
VOUT: output voltage, IOUT: load current, Ib: bias current
Power dissipation rating Pd (W)=(TjmaxTa)/θja
Power consumption Pc (W)=(VCC-VOUT)×IOUTVCC×Ib
9) Rapid variation in VCC voltage and load current
In case of a rapidly changing input voltage, transients in the output voltage might occur due to the use of a MOSFET as
output transistor. Althou gh the actual appl ication might be the caus e of the transients, the IC input voltage, output curr ent
and temperature are also possible causes. In case problems arise within the actual operating range, use
countermeasures such as adjusting the outp ut capacitance.
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
10) Minute variation in output voltage
In case of using an application susceptible to minute changes to the output voltage due to noise, changes in input and
load current, etc., use countermeasures such as implementing filters.
11) Overcurrent protection circuit
This IC incorporates an integr ated overcurre nt protection circuit that is activated when the load is shorted. T his protection
circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in
applications characterized by continuous operation or transitioning of the pr otection circuit.
12) Thermal shutdown (TSD)
This IC incorporates and integr ated thermal shutdown circuit to prevent heat damage to the IC. Normal operati on should
be within the power dissipation rating, if however the rating is exceeded for a continued period, the junct ion temperature
(Tj) will rise and the TSD circuit wi ll be activated and turn all output pins OFF. After the Tj falls below the TSD threshold
the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set des ign or for any purpose other than protecting the IC from heat
damage.
13) In some applications, the VCC and pin potential might be reversed, possibly resulting in circuit internal damage or
damage to the elements. For example, while the external capacitor is charged, the VCC shorts to the GND. Use a
capacitor with a capacitance with less than 1000μF. We also recommend using reverse polarity diodes in series or a
bypass between all pins and the VCC pin.
14) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a
variety of parasitic elements.
For example, in case a resistor and a transistor are connected to the pins as sho wn in the figure below then:
The P/N junction functions as a parasitic diode when GND > pin A for the resistor, or GND > pin B for the transistor.
Also, when GND > pin B for the transistor (NPN), the parasitic diode described above combines with the N layer of the
other adjacent elements to operate as a parasitic NPN transistor.
Parasitic diodes inevitably occur in the structure of the IC. Their operation can result in mutual interference between
circuits and can cause malfunctions and, in turn, physical damage to or destructio n of the chip. Therefore do not employ
any method in which parasitic diodes can operate such as applying a voltage to an input pin that is lower than the
(P substrate) GND.
Figure 28. Example of the Parasitic Device Structures
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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Physical Dimension, Tape and Reel Information
Package Name HTSOP-J8
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
Datasheet
Datasheet
. 26/29 TSZ02201-0G1G0AN00010-1-2
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Physical Dimension, Tape and Reel Information
Package Name TO252-3
Direction of feed
1pin
Reel Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the lower left when you hold
reel on the left hand and you pull out the tape on the right hand
2000pcs
E2
( )
Datasheet
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BD7xxL2EFJ/FP/FP3-C
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Physical Dimension, Tape and Reel Information
Package Name SOT223-4F
Direction of Feed
Datasheet
Datasheet
. 28/29 TSZ02201-0G1G0AN00010-1-2
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Marking Diagrams (TOP VIEW)
Part Number
Marking Output Voltage (V) Package
D733L2 3.3 HTSOP-J8
BD733L2 TO252-3 /
SOT223-4F
D750L2 5.0 HTSOP-J8
BD750L2 TO252-3 /
SOT223-4F
TO252-3
HTSOP-J8
HTSOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TO252-3
(TOP VIEW) Part Number Marking
LOT Number
SOT223-4F (TOP VIEW)
Part Number Marking
LOT Number
1PIN
SOT223-4F
Datasheet
Datasheet
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BD7xxL2EFJ/FP/FP3-C
14.Jul.2014 Rev.006
Revision History
Date Revision Changes
21.Aug.2012 001 New Release
24.Sep.2012 002 New Release TO252-3 package.
14.Mar.2013 003
Page 1.Series name is changed.
Page 6. Append Thermal Resistance θja, θjc.
Page 8. Figure 5, Page 9. Figure 11 All Quie scent current are integrated into Bias Current.
Page 10. Figure 14, Page 11. Figure 15 All Quiescent current are integrated into Bias Current.
Page 12. Figure 21, Page 13. Figure 24 All Quiescent current are integrated into Bias Current.
Page 17, 18. Figure 25, 26, 27, 28
Power Dissipation is changed to be compliant with JEDEC standard.
Page 19, 20. Calculation examples are changed.
Page 25. “Application exampl e” is deleted.
Figure 29 Example of the Parasitic Device Structures” is renewed.
30.Sep.2013 004 AEC-Q100 Qualified
Page 28. Physical Quantity is changed.
01.May.20 14 005 TO263-3F is changed to the individual registration.
14.Jul.2014 006
Page 16. Output capacitor range was corrected.
Page 28. HTSOP-J8 Marking Diagrams was corrected.
Datasheet
Datasheet
Notice – SS Rev.002
© 2013 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred b y you or thir d parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASS CLASS CLASSb CLASS
CLASS CLASS
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe d esign against the physical injur y, damage to any property, which
a failure or malfunction of our Products may cause. T he following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expens es or losses arising from the
use of any ROHM’s Products under an y special or extraordinary envir onments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product perform ance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-produci ng comp onents, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flu x (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding nor mal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Po wer Dissipation (P d) dependi ng on Ambient temp erature (T a). When used i n sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range d escribed in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condi tion from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlor ine, bromine, etc.) flux is used, the residue of flu x may negatively affect prod uct
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specificati on
Datasheet
Datasheet
Notice – SS Rev.002
© 2013 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own indepe ndent verificati on and judgme nt in the use of such information
contained in this document. ROHM shall not be in an y way responsible or liable for any d amages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please t ake special care under dry con dition (e.g. Grounding of human body / equipment / sol der iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportati on
1. Product performance and soldere d conn ections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive g ases, i nclud ing Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommende d b y ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderabilit y of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommen de d storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products wit hin the specified time after ope ning a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products pl ease dispose them properly using an authorized industr y waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoi ng information or data will not infringe any int ellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including b ut not limited to, the developm ent of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
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