Figure 1. ADS-949 Functional Block Diagram
FEATURES
14-bit resolution
12.8MHz minimum sampling rate
No missing codes over full military temperature range
Ideal for both time and frequency-domain applications
Excellent THD (–81dB) and SNR (78dB)
Edge-triggered
Small, 32-pin, side-brazed, ceramic TDIP or SMT
Low-power, 2 Watts
Low cost
GENERAL DESCRIPTION
The low-cost ADS-949 is a 14-bit, 12.8MHz sampling A/D
converter. This device accurately samples full-scale input
signals up to Nyquist frequencies with no missing codes.
Excellent differential nonlinearity error (DNL), signal-to-noise
ratio (SNR), and total harmonic distortion (THD) make the ADS-
949 the ideal choice for both time-domain (CCD/FPA imaging,
scanners, process control) and frequency-domain (radar,
telecommunications, spectrum analysis) applications.
The functionally complete ADS-949 contains a fast-settling
sample/hold ampli er, a subranging A/D converter, an internal
reference, timing/control logic, and error-correction circuitry.
Digital input and output levels are TTL. The ADS-949 only
requires the rising edge of a start convert pulse to operate.
Requiring only +15V, +5V and –5V supplies, the ADS-949
typically dissipates just 2 Watts. The device is offered with a
Bipolar input range of ±2.5V and Unipolar range of 0 to 5 volts.
Models are available for use in either commercial (0 to +70°C)
or military (55 to +125°C) operating temperature ranges.
A proprietary, auto-calibrating, error-correcting circuit allows
the device to achieve specifi ed performance over the full
military temperature range.
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION PIN FUNCTION
1 VIN A 32 RANGE
2 VIN B 31 GAIN ADJUST
3 –5V 30 +5V ANALOG
4 OFFSET ADJ. 29 ANALOG GND
5 RANGE REF. 28 +15V
6 2.5V REF. 27 +5V DIGITAL
7 START CONVERT 26 DIGITAL GND
8 EOC 25 OVERFLOW
9 ENABLE 24 MSB
10 BIT 14 (LSB) 23 BIT 1 (MSB)
11 BIT 13 22 BIT 2
12 BIT 12 21 BIT 3
13 BIT 11 20 BIT 4
14 BIT 10 19 BIT 5
15 BIT 9 18 BIT 6
16 BIT 8 17 BIT 7
REF
DAC
REGISTER
REGISTER
OUTPUT REGISTER
10 BIT 14 (LSB)
11 BIT 13
12 BIT 12
13 BIT 11
14 BIT 10
15 BIT 9
16 BIT 8
17 BIT 7
18 BIT 6
19 BIT 5
20 BIT 4
21 BIT 3
22 BIT 2
23 BIT 1 (MSB)
24 MSB
TIMING AND
CONTROL LOGIC
OFFSET ADJUST 4
VIN A 1
START CONVERT 7
EOC 8
GAIN ADJUST 31
+5V ANALOG SUPPL 30
+5V DIGITAL SUPPL 27
V RANGE 32
–5.2V SUPPL 3
+15V SUPPL 28
ANALOG GROUND 29
DIGITAL GROUND 26
+
S/H
BUFFER
DIGITAL CORRECTION LOGIC
FLASH
ADC
1
FLASH
ADC
2
POWER AND GROUNDING
5
AMP
9 ENABLE
25 OVERFLOW
VIN B 2
2.5 V REF 6
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 1 of 8
+25°C 0 to +70°C –55 to +125°C
ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Bipolar Input Voltage Range ±1 ±2.5 ±1 — ±2.5 ±1 — ±2.5 Volts
Unipolar Input Voltage Range 0 to 2 0 to 5 0 to 2 0 to 5 0 to 2 0 to 5 Volts
Input Resistance (Vin A) 400 — 400 — 400 — Ω
Input Capacitance — 6 15 6 15 6 15 pF
DIGITAL INPUT
Logic Levels
Logic "1" +2.0 +2.0 — — +2.0 — — Volts
Logic "0" — +0.8 — +0.8 — +0.8 Volts
Logic Loading "1" +20 +20 +20 µA
Logic Loading "0" –20 –20 –20 µA
Start Convert Positive Pulse Width 50 — 50 — 50 — ns
STATIC PERFORMANCE
Resolution 14 — 14 — 14 — Bits
Integral Nonlinearity ±0.75 — ±0.75 — ±1 LSB
Differential Nonlinearity (fin = 10kHz) 0.95 ±0.5 +1.25 –0.95 ±0.5 +1.25 –0.95 ±0.5 +1.5 LSB
Full Scale Absolute Accuracy±0.15 ±0.4 ±0.15 ±0.4 ±0.4 ±0.8 %FSR
Bipolar Zero Error (Tech Note 2) ±0.1 ±0.3 ±0.1 ±0.3 ±0.3 ±0.6 %FSR
Gain Error (Tech Note 2) ±0.2 ±0.4 ±0.2 ±0.4 ±0.4 ±1.5 %
No Missing Codes (fin = 10kHz) 14 14 14 Bits
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 1MHz 83 –76 –83 –75 –79 –71 dB
1MHz to 2.5MHz –78 –72 –78 –72 –73 –68 dB
2.5MHz to 5MHz –76 –71 –76 –71 –71 –65 dB
Total Harmonic Distortion (–0.5dB)
dc to 1MHz –81 –74 –81 –74 –77 –70 dB
1MHz to 2.5MHz –76 –71 –76 –71 –72 –66 dB
2.5MHz to 5MHz –74 –69 –74 –69 –69 –63 dB
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 1MHz 72 78 72 78 70 78 dB
1MHz to 2.5MHz 72 77 72 77 70 77 dB
2.5MHz to 5MHz 72 76 72 76 70 76 dB
Signal-to-Noise Ratio
(& distortion, –0.5dB)
dc to 1MHz 70 77 70 74 68 73 dB
1MHz to 2.5MHz 70 74 70 74 66 71 dB
2.5MHz to 5MHz 69 73 69 73 65 70 dB
Noise 150 — 150 — 150 — µVrms
Two-tone Intermodulation
Distortion (fin = 2.45MHz,
1.975MHz, fs = 10MHz, –0.5dB) –82 –82 –82 dB
Input Bandwidth (–3dB)
Small Signal (–20dB input) 30 30 30 MHz
Large Signal (–0.5dB input) 20 20 20 MHz
Feedthrough Rejection (fin = 5MHz) 85 85 85 dB
Slew Rate±400 ±400 ±400 V/µs
Aperture Delay Time+5 +5 +5 ns
Aperture Uncertainty2 2 2 ps rms
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, +VDD = +5V, –VDD = –5V, +Vcc = +15V, 12.8MHz sampling rate, ±2.5V input range, and a minimum 3 minute warmup unless otherwise specifi ed.)
ABSOLUTE MAXIMUM RATINGS
PARAMETERS LIMITS UNITS
+5V Supply (Pins 27, 30) 0 to +6 Volts
+15V Supply (Pin 28) 0 to +16 Volts
–5V Supply (Pin 3) 0 to –5.5V Volts
Digital Input (Pin 7) –0.3 to +VDD +0.3 Volts
Analog Input (Pins 1, 2) ±5 Volts
Lead Temperature (10 seconds) +300 °C
PARAMETERS MIN. TYP. MAX. UNITS
Operating Temp. Range, Case
ADS-949MC, GC 0 +70 °C
ADS-949MM, GM, –55 +125 °C
Thermal Impedance
θjc — 6 °C/Watt
θca — 23 °C/Watt
Storage Temperature Range –65 +150 °C
Package Type 32-pin, side-brazed, ceramic TDIP or SMT
Weight 0.46 ounces (13 grams)
PHYSICAL/ENVIRONMENTAL
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 2 of 8
+25°C 0 to +70°C 55 to +125°C
DYNAMIC PERFORMANCE (Cont.) MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
S/H Acquisition Time
( to ±0.003%FSR, 5V step) 40 45 40 45 40 45 ns
Overvoltage Recovery Time 100 100 100 ns
A/D Conversion Rate 12.8 — — 12.8 12.8 MHz
DIGITAL OUTPUTS
Logic Levels
Logic "1" +2.4 — — +2.4 +2.4 Volts
Logic "0" +0.4 +0.4 +0.4 Volts
Logic Loading "1" 4 –4 –4 mA
Logic Loading "0" +4 +4 +4 mA
Output Coding
DIGITAL OUTPUTS
Power Supply Ranges
+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts
–5.2V Supply 4.75 5.2 –5.45 –4.75 –5.2 –5.45 4.9 –5.2 –5.45 Volts
+15V Supply +14.5 +15 +15.5 +14.5 +15 +15.5 +14.5 +15 +15.5 Volts
Power Supply Currents
+5V Supply — +250 +260 — +250 +260 +250 +260 mA
–5.2V Supply — –200 –210 — –200 –210 –200 –210 mA
+15V Supply +14.5 +15 +15.5 +14.5 +15 +15.5 +14.5 +15 +15.5 Volts
Power Dissipation2.0 2.25 2.0 2.25 2.0 2.25 Watts
Power Supply Rejection±0.1 ±0.1 ±0.1 %FSR/%V
Footnotes:
TECHNICAL NOTES
1. Obtaining fully specifi ed performance from the ADS-949
requires careful attention to pc card layout and power
supply decoupling. The device’s analog and digital ground
systems are connected to each other internally. For opti-
mal performance, tie all ground pins (26 and 29) directly
to a large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-949 achieves its specifi ed accuracies without
the need for external calibration. It is recommended that
the +5VA and +5VD supplies should be powered up from
the same source. If required, the device’s small initial
offset and gain errors can be reduced to zero using the
adjustment circuitry shown in Figure 2, 3.
When using this circuitry, or any similar offset and gain
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic 1) will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
4. A passive bandpass fi lter is used at the input of the
A/D for all production testing.
All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
Contact DATEL for other input voltage ranges.
A 50ns wide start convert pulse is used for all production testing. For
applications requiring less than an 12.8MHz sampling rate, wider start convert
pulses can be used. The rising edge of the start convert pulse needs to be as
sharp as possible (<10 ns). Otherwise, a degradation in performance can result
from a slow rising edge pulse.
Effective bits is equal to:
(SNR + Distortion) – 1.76 + 20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
Straight Binary, Offset Binary
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 3 of 8
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not
be implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figures 2 and 3 are guaranteed to
compensate for the ADS-949’s initial accuracy errors and may not
be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital output
codes. This can be accomplished by connecting LED’s to the
digital outputs and adjusting until certain LED’s “fl icker” equally
between on and off. Other approaches employ digital comparators
or microcontrollers to detect when the outputs change from one
code to the next.
Offset adjusting for the ADS-949 is normally accomplished at the
point where the MSB is a 1 and all other output bits are 0’s and
the LSB just changes from a 0 to a 1. This digital output transition
ideally occurs when the applied analog input is
+½ LSB (+153µV).
Gain adjusting is accomplished when all bits are 1’s and the LSB
just changes from a 1 to a 0. This transition ideally occurs when
the analog input is at +full scale minus 1½ LSB's (+2.49954V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 7) so the converter is continuously converting.
2. Apply +153µV to the ANALOG INPUT (pin 1).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB fl ickers between 0 and 1.
Gain Adjust Procedure
1. Apply +2.49954V to the ANALOG INPUT (pin 1).
2. Adjust the gain potentiometer until all output bits are 1’s and
the LSB fl ickers between 1 and 0.
3. To confi rm proper operation of the device, vary the input signal
to obtain the output coding listed in Table 2.
INPUT VOLTAGE ZERO ADJUST GAIN ADJUST
RANGE +½ LSB +FS –1½ LSB
±2.5V +153µV +2.49954V
Table 1. Gain and Zero Adjust
Figure 2. Typical ADS-949 Bipolar Connection Diagram
0.1µF
4.7µF
27
+5VD
29
AGND
3
5V
ADS-949
20k
9
4.7µF
+5VA
2
DGND
5V
+5V
1VIN A
4 OFFSET AD UST
7 START CONVERT
23
22
21
20
19
1
17
1
15
14
13
12
11
10
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT
BIT 7
BIT
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
BIPOLAR
ANALOG
INPUT
START
CONVERT
Bypass Pins 5, , 32, with a 4.7µF to Analog Ground.
Note The Voltage Value at Pin 32 (Range) sets the input voltage range of the ADS-949
eg If Pin (2.5V Reference Out) is tied to the Range Pin 32 (20k Pot is shorted), then
the input range of the ADS-949 becomes ±2.5V
If the 20k Pot is set at midrange then the input range of the ADS-949 becomes ±1.25V
+
ERO/
OFFSET
AD UST
5V
+5V
31 GAIN AD UST
GAIN
A
DUST
20
5V
2 VIN B
9 ENABLE
20k
2.5V REF
32 RANGE
+15V
2
+15V
+5VD
4.7µF
+
30
+5VA
0.1µF 0.1µF
4.7µF
+
0.1µF
+
5 RANGE REF
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 4 of 8
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered to
boards rather than socketed, and of course, minimal air fl ow over
the surface can greatly help reduce the package temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See page
1-183 of the DATEL Data Acquisition Components Catalog for
more information on the HS Series. Request DATEL Application
Note AN8, "Heat Sinks for DIP Data Converters", or contact
DATEL directly, for additional information.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specifi ed over operating temperature (case) ranges of 0 to +70°C
and –55 to +125°C. All room temperature (TA = +25°C) production
testing is performed without the use of heat sinks or forced air
cooling. Thermal impedance fi gures for each device are listed in
their respective specifi cation tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should be
used to ensure devices do not overheat. The ground and power
planes beneath the package, as well as all pcb signal runs to and
from the device, should be as heavy as possible to help conduct
heat away from the package.
Figure 3. Typical ADS-949 Unipolar Connection Diagram
Table 3. Output Coding
UNIPOLAR INPUT VOLT. OUTPUT CODING INPUT VOLT. BIPOLAR
SCALE 0 TO +5V MSB LSB MSB LSB ±2.5V SCALE
+FS – 1 LSB +4.999695 11 1111 1111 1111 01 1111 1111 1111 +2.499695 +FS – 1LSB
+7/8 FS +4.375000 11 1000 0000 0000 01 1000 0000 0000 +1.875000 +3/4FS
+3/4 FS +3.75000 11 0000 0000 0000 01 0000 0000 0000 +1.250000 +1/2FS
+1/2 FS +2.500000 10 0000 0000 0000 00 0000 0000 0000 0.000000 0
+1/4 FS +1.250000 01 0000 0000 0000 11 0000 0000 0000 –1.250000 –1/2FS
+1/8 FS +0.625000 00 1000 0000 0000 10 1000 0000 0000 –1.875000 –3/4FS
+1 LSB +0.000305 00 0000 0000 0001 10 0000 0000 0001 –2.499695 –FS+1LSB
0 0.000000 00 0000 0000 0000 10 0000 0000 0000 –2.500000 –FS
STRAIGHT BIN.
OFF. BINARY TWO'S COMP.
0.1 F
4.7 F
27
+5 D
29
AND
3
–5
ADS-949
20k
9
4.7 F
+5 A
26
DND
–5
+5
1IN A
4 OFFSET AD ST
7 START CON ERT
23
22
21
20
19
18
17
16
15
14
13
12
11
10
8
BIT 1 ( SB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
NIPOLAR
ANALO
INP T
START
CON ERT
+
ERO/
OFFSET
AD ST
–5
+5
31 AIN AD ST
AIN
A
DST
20
–5
2 IN B
9 ENABLE
20k
6 2.5 REF
32 RAN E
+15
28
+15
+5 D
4.7 F
+
30
+5 A
0.1 F 0.1 F
4.7 F
+
0.1 F
+
5
RAN E REF
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 5 of 8
Figure 4. FFT Analysis of ADS-949
(fs = 12.8MHz, fi n = 3.85MHz, Vin = –0.5dB, 16,384 point FFT)
Figure 5. ADS-949 Histogram
Figure 6. ADS-949 Timing Diagram
START
CONVERT
Minimum is 40ns
OUTPUT
DATA
ENABLED
EOC
N
Notes: 1. Scale is approximately 10ns per division. All values are Typical.
2. Rising edge of the start convert needs to be less than 10 ns.
DATA OUT
ENABLED
N+1
40ns
40ns
20ns
60ns
DATA N-3 DATA N-2 DATA N-1 DATA N
30ns
20ns
DATA N-3 DATA N-2 DATA N-1 DATA N
HZ HZ HZ HZ
ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 6 of 8
Figure 7. ADS-949 Evaluation Board Schematic (ADS-B949)
CONTACT DATEL FOR SCHEMATIC
MECHANICAL DIMENSIONS – STANDARD PACKAGE
INCHES (mm)
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ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
®®
DATEL 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
23 Feb 2012 MDA_ADS-949.B04 Page 7 of 8
Receptacles for PC board mounting can be ordered through AMP, Inc., Part # 3-331272-8 (Component Lead Socket),
32 required. For MIL-STD-883 product specifcation, contact DATEL.
MECHANICAL DIMENSIONS – SURFACE MOUNT PACKAGE
INCHES (mm)
OPERATING 32-PIN
MODEL TEMP. RANGE PACKAGE
ADS-949MC 0 to +70°C TDIP
ADS-949MM –55 to +125°C TDIP
ADS-949/883 –55 to +125°C TDIP
ADS-949GC 0 to +70°C SMT
ADS-949GM –55 to +125°C SMT
ORDERING INFORMATION
ACCESSORIES
ADS-B949 Evaluation Board (without ADS-949)
HS-32 Heat sink for ADS-949 TDIP models
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ADS 949
14 Bit, 12.8MHz Sampling A/D Converters
. makes no representation that the use of its products in the circuits described herein, or the use of other
technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not
imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifi cations are subject to change
without notice.
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23 Feb 2012 MDA_ADS-949.B04 Page 8 of 8