● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
DN2625
Features
Very low gate threshold voltage
Designed to be source-driven
Low switching losses
Low effective output capacitance
Designed for inductive loads
Well matched for low second harmonic when
driven by Supertex MD2130
Applications
Medical ultrasound beamforming
Ultrasonic array focusing transmitter
Piezoelectric transducer waveform drivers
High speed arbitrary waveform generator
Normally-on switches
Solid state relays
Constant current sources
Power supply circuits
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General Description
The Supertex DN2625 is a low threshold depletion-mode
(normally-on) transistor utilizing an advanced vertical DMOS
structure and Supertex’s well-proven silicon-gate manufacturing
process. This combination produces a device with the power
handling capabilities of bipolar transistors and with the high
input impedance and positive temperature coefficient inherent in
MOS devices. Characteristic of all MOS structures, this device
is free from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
The DN2625DK6-G contains two MOSFETs in an 8-lead, dual
pad DFN package. The DN2625K6-G in the 14-lead QFN
package is not recommended for new designs, but may continue
to be purchased for existing designs.
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage 250V
Drain-to-gate voltage 250V
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect
device reliability. All voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Ordering Information
Device
Package Options
BVDSX/ BVDGX
(V)
VGS(OFF)
(max)
(V)
IDS
(pulsed)
(VGS = 0.9V)
(min)
(A)
TO-252
(D-PAK)
8-Lead DFN
5.00x5.00mm body
0.90mm height (max)
1.27mm pitch (dual pad)
14-Lead QFN*
5.00x5.00mm body
1.00mm height (max)
1.27mm pitch
DN2625 DN2625K4-G DN2625DK6-G DN2625K6-G 250 -2.1 3.3
-G indicates package is RoHS compliant (‘Green’)
* This package is not recommended for new designs. For single MOSFETs use the TO-252 D-PAK (K4), for dual MOSFETs use the 8-Lead DFN (K6) (dual pad).
GATE
SOURCE
SOURCE
SOURCE
GATE
SOURCE
SOURCE
SOURCE
DRAIN DRAIN DRAIN
DRAIN DRAIN DRAIN
14-Lead QFN
(top view)
1
1
2
3
4
11
10
9
8
5 6 7
14 13 12
Pin Configurations
TO-252 D-PAK (K4)
14-Lead QFN (K6)
(top view)
This package is not recommended
for new designs.
8-Lead DFN
(K6) (dual pad)
(top view)
8
1
2
3
4
7
6
5
S1
G1
D1
S2
G2
D1
D2
D2
D1
D2
N-Channel Depletion-Mode Vertical DMOS
FET in Single and Dual Options