1/8August 2002
NEW DATASHEET ACCORDING TO PCN DSG/CT/1C02 MARKING: IRF530 @ .
IRF530
N-CHA NNE L 100 V - 0.115 Ω - 14A TO-220
LOW GATE CHARGE STripFET™ II POWER MOSF ET
■TYPICAL RDS(on) = 0.115Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■LOW GATE CHARGE
■HIGH CURRENT CAPABILITY
■175 oC OPERATING TEMPERATURE
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET™ process has specifically been
designed to minimize input capacitance and gate charge.
It is therefore suitable as primary switch in advanced
high-efficiency, high-frequency isolated DC-DC
converters for Telecom and Computer applications. It is
also intended for any applications with low gate drive
requirements.
APPLICATIONS
■HIGH CURRENT, HIGH SWITCHING SPEED
■SOLENOID AND RELAY DRI VERS
■REGULATOR
■DC-DC & DC-AC CONVERTERS
■MOTOR CONTROL, AUDIO AMPLIFIERS
■AUTOM OT IVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, etc.)
TYPE VDSS RDS(on) ID
IRF530 100 V <0.16 Ω14 A
123
TO-220
ABSOLUTE MAXIMUM RATINGS
(•) P ul se width li mited by safe operating area. (1) ISD ≤14A, di/dt ≤30 0A/ µ s , V DD ≤ V(BR)DSS, Tj ≤ TJMAX
(2) Starting Tj = 25 oC, ID = 14A, VDD = 50V
Symbol Parameter Value Unit
VDS Drain-so urce Voltag e (VGS = 0) 100 V
VDGR Drain-gate Voltage (RGS = 20 kΩ)100 V
VGS Gate- source Voltage ± 20 V
IDDrain Current (continuous) at TC = 25°C 14 A
IDDrain Current (continuous) at TC = 100°C 10 A
IDM(•) Drain Current (pulsed) 56 A
Ptot Total Dissipation at TC = 25°C 60 W
Derating Factor 0.4 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 20 V/ns
EAS (2) Single Pulse Avalanche Energy 70 mJ
Tstg Storage Temperature -55 to 175 °C
TjOperating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM