1PS8306C 11/13/08
Product Pin Configuration
Functional Table
Logic Block Diagram
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PI6C2510A
Phase-Lock Loop Clock Driver
with 10-Clock Outputs
Description
The PI6C2510A family is a low-skew, low-jitter, phase-lock loop
(PLL) clock driver, distributing high-frequency clock signals for
SDRAM and server applications. By connecting the feedback
FB_OUT output to the feedback FB_IN input, the propagation
delay from the CLK_IN input to any clock output will be nearly zero.
This zero-delay feature allows the CLK_IN input clock to be
distributed, providing one clock input to one bank of ten outputs,
with an output enable.
The PI6C2510A is designed to meet PC100 SDRAM Registered
DIMM Specification, for heavy load applications. For test pur-
poses, the PLL can be bypassed by strapping AVCC to ground.
The PI6C2510A family has the same pinouts as TI’s CDC2510A/
2510B, with enhanced rise/fall times, and allowing a Spread Spec-
trum clock input.
Features
High-Performance Phase-Lock Loop Clock Distribution that
meets 100/134 MHz Registered DIMM Synchronous DRAM
modules for server/workstation/PC applications
Allows Clock Input to have Spread Spectrum modulation for
EMI reduction
Zero Input-to-Output delay: Distribute One Clock Input
to one bank of ten outputs, with an output enable.
Same pinout as TI CDC2510/2510A
Low jitter: Cycle-to-Cycle jitter ±100ps max.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V VCC
Wide Clock Frequency Range:
Packaging
-24-pin TSSOP (L)
stupnIstuptuO
GNI_KLC]9:0[Y1TUO_BF
XL L L
LH L H
HH H H
G
10
CLK_IN
FB_IN
PLL
AVCC
FB_OUT
1Y[0:9]
CLK_IN
AVCC
VCC
1Y9
1Y8
GND
GND
1Y7
1Y6
1Y5
VCC
FB_IN
AGND
VCC
1Y0
1Y1
1Y2
GND
GND
1Y3
1Y4
VCC
G
FB_OUT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24-Pin
L
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PI6C2510A
Phase-Lock Loop Clock Driver
with 10 Clock Outputs
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VCC 22,41,01,2rewoP.ylppusrewoP
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Pin Functions
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3PS8306C 11/13/08
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PI6C2510A
Phase-Lock Loop Clock Driver
with 10 Clock Outputs
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DC Specifications
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CC
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C
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CC
DNGro6
Absolute maximum ratings over operating free-air temperature range.
Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
Recommended Operating Conditions
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CC
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V
HI
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LI
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V
I
egatlovtupnI0V
CC
T
A
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o
C
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I
HO
tnerrucpu-lluPV
TUO
V4.2=91
Am
tnerrucpu-lluPV
TUO
V0.2=23
I
LO
tnerrucnwod-lluPV
TUO
V8.0=82
tnerrucnwod-lluPV
TUO
V55.0=91
Electrical characteristics over recommended operating free-air temperature range.
Pull Up/Down Currents of PI6C2510A/PI2510A-134, VCC = 3.0V:
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PI6C2510A
Phase-Lock Loop Clock Driver
with 10 Clock Outputs
AC Specifications
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Timing requirements over recommended ranges of supply voltage and operating free-air temperature.
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CC
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zHM66dna NI_BF 051–051+
sp
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rotuptuO niTUO_BF 1+nKLC 001–001+
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002
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t
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t
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Switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL=30pF
Note: These switching parameters are guaranteed, but not production tested.
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5PS8306C 11/13/08
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PI6C2510A
Phase-Lock Loop Clock Driver
with 10 Clock Outputs
Pericom Semiconductor Corporation • 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
Package Mechanical Information:
Plastic 24-pin Thin Shrink Small-Outline Package (L package).
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Ordering Information
1
.303
.311
.047
1.20
.002
.006
SEATING
PLANE
.0256
BSC
.018
.030
.004
.008
.252
BSC
1
24
.169
.177
0.05
0.15
6.4
0.45
0.75
0.09
0.20
4.3
4.5
7.7
7.9
0.65 0.19
0.30
.007
.012
Max
DESCRIPTION: 24-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
DOCUMENT CONTROL NO.
PD - 1312
REVISION: E
DATE: 03/09/05
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AD
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. Number of transistors = TBD
3. E = Pb-free and Green
08-0298