RT9602 Dual Channel Synchronous-Rectified Buck MOSFET Driver General Description Features The RT9602 is a dual power channel MOSFET driver specifically designed to drive four power N-Channel MOSFETs in a synchronous-rectified buck converter topology. These drivers combined with RT9237/A and RT9241A/B series of Multi-Phase Buck PWM controllers provide a complete core voltage regulator solution for advanced microprocessors. z Drives Four N-Channel MOSFETs z Adaptive Shoot-Through Protection Internal Bootstrap Devices Small SOP-14 Package 5V to 12V Gate-Drive Voltages for Optimal Efficiency Tri-State Input for Bridge Shutdown Supply Under-Voltage Protection Power ON Over-Voltage Protection RoHS Compliant and 100% Lead (Pb)-Free The RT9602 can provide flexible gate driving for both high side and low side drivers. This gives more flexibility of MOSFET selection. The output drivers in the RT9602 have the capability to drive a 3000pF load with a 40nS propagation delay and 80nS transition time. This device implements bootstrapping on the upper gates with only a single external capacitor required for each power channel. This reduces implementation complexity and allows the use of higher performance, cost effective, N-Channel MOSFETs. Adaptive shoot-through protect-ion is integrated to prevent both MOSFETs from conducting simultaneously. The RT9602 can detect high side MOSFET drain-to-source electrical short at power on and pull the 12V power by low side MOS and cause power supply to go into over current shutdown to prevent damage of CPU. Ordering Information z z z z z z z Applications z z z Core Voltage Supplies for Intel Pentium(R) 4 and AMD(R) AthlonTM Microprocessors High Frequency Low Profile DC-DC Converters High Current Low Voltage DC-DC Converters Pin Configurations (TOP VIEW) PWM1 PWM2 GND LGATE1 PVCC PGND LGATE2 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC PHASE1 UGATE1 BOOT1 BOOT2 UGATE2 PHASE2 SOP-14 RT9602 Package Type S : SOP-14 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100%matte tin (Sn) plating. DS9602-08 March 2007 www.richtek.com 1 www.richtek.com 2 12V 2.4K 18K +5V 3K 66pF 15K 3 4 5 VID2 VID1 VID0 2.4K 2 VID3 VID0 VID1 VID2 0.1uF 10 9 ISN2 ISP2 GND VSEN PWM2 RT9241A/B SS DVD 8 ADJ 19 20 16 11 15 13 14 17 PWM1 18 ISP1 12 ISN1 VID4 VDD VID3 PGOOD COMP 7 FB 6 1 VID4 1uF 3K 3K 3K 3K +5V PGOOD 10K 12V VCORE 1.2uH x1500uF 2uH 1000uF x1500uF 2uH 1000uF PHB95N03LT 7 8 9 4 13 12 1uF 1uF PHB83N03LT 1uF PHB95N03LT PHB83N03LT 1uF PVCC 14 VCC 5 PGND GND PWM2 10 Optional BOOT2 LGATE2 PHASE2 UGATE2 LGATE1 RT9602 6 3 2 PHASE1 PWM1 1 UGATE1 11 BOOT1 Optional 1uF 100 12V RT9602 Typical Application Circuit DS9602-08 March 2007 RT9602 Functional Pin Description Pin No. Pin Name Pin Function 1 PWM1 Channel 1 PWM Input 2 PWM2 Channel 2 PWM Input 3 GND Ground Pin 4 LGATE1 Lower Gate Drive of Channel 1 5 PVCC Upper and Lower Gate Driver Power Rail 6 PGND Lower Gate Driver Ground Pin 7 LGATE2 Lower Gate Drive of Channel 2 8 PHASE2 9 UGATE2 Upper Gate Drive of Channel 2 10 BOOT2 Floating Bootstrap Supply Pin of Channel 2 11 BOOT1 Floating Bootstrap Supply Pin of Channel 1 12 UGATE1 Upper Gate Drive of Channel 1 13 PHASE1 14 VCC Connect this pin to phase point of channel 2. Phase point is the connection point of high side MOSFET source and low side MOSFET drain Connect this pin to phase point of channel 1. Phase point is the connection point of high side MOSFET source and low side MOSFET drain Control Logic Power Supply DS9602-08 March 2007 www.richtek.com 3 RT9602 Function Block Diagram VCC PVCC BOOT1 Internal 5V Shoot-Through Protection UGATE1 PHASE1 40K PWM1 Power-On OVP 40K PVCC Shoot-Through Protection Internal 5V Control Logic LGATE1 PGND PGND PVCC BOOT2 Shoot-Through Protection UGATE2 40K PHASE2 PWM2 Power-On OVP 40K PVCC Shoot-Through Protection GND Absolute Maximum Ratings LGATE2 PGND (Note 1) Supply Input Voltage, VCC ---------------------------------------------------------------------------z Supply Voltage, PVCC -------------------------------------------------------------------------------z BOOT Voltage, VBOOT-VPHASE ----------------------------------------------------------------------z Input Voltage, VPWM -----------------------------------------------------------------------------------z PHASE to GND DC ---------------------------------------------------------------------------------------------------------< 200ns --------------------------------------------------------------------------------------------------z BOOT to PHASE --------------------------------------------------------------------------------------z BOOT to GND DC ---------------------------------------------------------------------------------------------------------< 200ns --------------------------------------------------------------------------------------------------z UGATE ---------------------------------------------------------------------------------------------------z LGATE ---------------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 3) SOP-14, JA --------------------------------------------------------------------------------------------z Ambient Temperature ---------------------------------------------------------------------------------z Junction Temperature ---------------------------------------------------------------------------------z Storage Temperature Range ------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------z ESD Susceptibility (Note 2) HBM (Human Body Mode) --------------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------------z www.richtek.com 4 15V VCC + 0.3V 15V GND - 0.3V to 7V -5V to 15V -10V to 30V 15V -0.3V to VCC+15V -0.3V to 42V VPHASE - 0.3V to VBOOT + 0.3V GND - 0.3V to VPVCC + 0.3V 127.67C /W 0C to 70C 0C to 125C -40C to 150C 260C 2kV 200V DS9602-08 March 2007 RT9602 Electrical Characteristics Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Current Bias Supply Current IVCC fPWM = 250kHz, VPVCC = 12V, CBOOT = 0.1F, RPHASE = 20 -- 5.5 8 mA Power Supply Current IPVCC fPWM = 250kHz, VPVCC = 12V, CBOOT = 0.1F, RPHASE = 20 -- 5.5 10 mA VCC Rising Threshold 8.6 9.9 10.7 V Hysteresis 0.6 1.35 -- V Power-On Reset PWM Input Maximum Input Current VPWM = 0 or 5V 80 127 150 A PWM Floating Voltage Vcc = 12V 1.1 2.1 3.7 V PWM Rising Threshold 3.3 3.7 4.3 V PWM Falling Threshold 1.0 1.26 1.5 V UGATE Rise Time VPVCC = VVCC = 12V, 3nF load -- 30 -- ns LGATE Rise Time VPVCC = VVCC = 12V, 3nF load -- 30 -- ns UGATE Fall Time VPVCC = VVCC = 12V, 3nF load -- 40 -- ns LGATE Fall Time VPVCC = VVCC = 12V, 3nF load -- 30 -- ns UGATE Turn-Off Propagation Delay VVCC = VPVCC = 12V, 3nF load -- 60 -- ns LGATE Turn-Off Propagation Delay VVCC = VPVCC = 12V, 3nF load -- 45 -- ns 1.26 -- 3.7 V Shutdown Window Output Upper Drive Source RUGATE VVCC = 12V, VPVCC = 12V -- 1.75 3.0 Upper Drive Sink RUGATE VVCC = 12V, VPVCC = 12V -- 2.8 5.0 Lower Drive Source RLGATE VVCC = 12V, VPVCC = 12V -- 1.9 3.0 Lower Drive Sink RLGATE VVCC = VPVCC = 12V -- 1.6 3.0 Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. JA is measured in the natural convection at T A = 25C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. DS9602-08 March 2007 www.richtek.com 5 RT9602 Application Information The RT9602 has power on protection function which held UGATE and LGATE low before VCC up cross the rising threshold voltage. After the initialization, the PWM signal takes the control. The rising PWM signal first forces the LGATE signal turns low then UGATE signal is allowed to go high just after a non-overlapping time to avoid shootthrough current. The falling of PWM signal first forces UGATE to go low. When UGATE and PHASE signal reach a predetermined low level, LGATE signal is allowed to turn high. The non-overlapping function is also presented between UGATE and LGATE signal transient. The PWM signal is recognized as high if above rising threshold and as low if below falling threshold. Any signal level in this window is considered as tri-state, which causes turn-off of both high side and low-side MOSFET. When PWM input is floating (not connected), internal divider will pull the PWM to 1.9V to give the controller a recognizable level. The maximum sink/source capability of internal PWM reference is 60A. The PVCC pin provides flexibility of both high side and low side MOSFET gate drive voltages. If 8V, for example, is applied to PVCC, then high side MOSFET gate drive is 8V to 1.5V (approximately, internal diode plus series resistance voltage drop). The low side gate drive voltage is exactly 8V. The RT9602 implements a power on over-voltage protection function. If the PHASE voltage exceeds 1.5V at power on, the LGATE would be turn on to pull the PHASE low until the PHASE voltage goes below 1.5V. Such function can protect the CPU from damage by some short condition happened before power on, which is sometimes encountered in the M/B manufacturing line. Driving power MOSFETs The DC input impedance of the power MOSFET is extremely high. When Vgs at 12V (or 5V), the gate draws the current only few nanoamperes. Thus once the gate has been driven up to "ON"ON level, the current could be negligible. www.richtek.com 6 However, the capacitance at the gate to source terminal should be considered. It requires relatively large currents to drive the gate up and down 12V (or 5V) rapidly. It also required to switch drain current on and off with the required speed. The required gate drive currents are calculated as follows. D1 d1 Vi s1 Cgd1 L VO Cgs1 Igd1 Ig1 Cgd2 d2 Igs1 g1 Ig2 Igd2 g2 D2 Igs2 Cgs2 s2 GND Vg1 Vphase +12V t Vg2 +12V t Figure1. The gate driver must supply Igs to Cgs and Igd to Cgd In Figure 1, the current Ig1 and Ig2 are required to move the gate up to 12V.The operation consists of charging Cgd and Cgs. Cgs1 and Cgs2 are the capacitances from gate to source of the high side and the low side power MOSFETs, respectively. In general data sheets, the Cgs is referred as "Ciss" which is the input capacitance. Cgd1 and Cgd2 are the capacitances from gate to drain of the high side and the low side power MOSFETs, respectively and referred to the data sheets as "Crss," the reverse transfer capacitance. For example, tr1 and tr2 are the rising time of the high side and the low side power MOSFETs respectively, the required current Igs1 and Igs2, are showed below DS9602-08 March 2007 RT9602 lgs1 = Cgs1 dVg1 Cgs1x 12 = dt tr1 lgs2 = Cgs2 dVg2 Cgs2 x 12 = dt tr2 from equation. (3) and (4) (1) (2) -12 lgs1 = 380 x 10 x 12 = 0.326 (A) 14 x 10-9 lgs2 = According to the design of RT9602, before driving the gate of the high side MOSFET up to 12V (or 5V), the low side MOSFET has to be off; and the high side MOSFET is turned off before the low side is turned on. From Figure 1, the body diode "D2" had been turned on before high side MOSFETs turned on lgd1 = Cg1 dV = Cgd1 12V dt tr1 (3) 500 x 10-12 x (12+12) 30 x 10-9 (7) = 0.4(A) (8) the total current required from the gate driving source is Ig1 = Igs1+Igd1 = (1.428+0.326) = 1.745(A) (9) Ig2 = Igs2 +Igd2 = (0.88+0.4) = 1.28(A) (10) By a similar calculation, we can also get the sink current required from the turned off MOSFET. Layout Consider Before the low side MOSFET is turned on, the Cgd2 have been charged to Vi. Thus, as Cgd2 reverses its polarity and g2 is charged up to 12V, the required current is Figure 2. shows the schematic circuit of a two-phase synchronous-buck converter to implement the RT9602. The converter operates for the input rang from 5V to 12V. D1 R1 L1 lgd2 = Cgd2 dV = C Vi+12V gd2 dt tr2 (4) Vin 12V 1.2uH Cb1 1uF C2 1uF C1 1000uF 12 Q1 L2 It is helpful to calculate these currents in a typical case. Assume a synchronous rectified BUCK converter, input voltage Vi = 12V, Vg1 = Vg2 = 12V. The high side MOSFET is PHB83N03LT whose Ciss = 1660pF, Crss = 380pF,and tr = 14nS. The low side MOSFET is PHB95N03LT whose Ciss = 2200pF, Crss = 500pF, and tr = 30nS, from the equation (1) and (2) we can obtain PHB83N03LT lgs2 -12 = 2200 x 10 x 12 = 0.88 (A) 30 x 10-9 DS9602-08 March 2007 (5) UGATE1 PHASE1 14 VCC PVCC PWM1 C5 1500uF PHB95N03LT Q2 4 LGATE1 PWM2 9 C4 1uF C3 1000uF 8 Q3 L3 5 1 PWM1 7 2 PWM2 UGATE2 PHASE2 GND LGATE2 PGND 3 6 PHB83N03LT 2uH C6 1500uF 12V RT9602 Q4 Cb2 1uF PHB95N03LT -12 lgs1 = 1660 x 10 x 12 = 1.428 (A) 14 x 10-9 13 2uH 11 BOOT1 C7 10 1uF BOOT2 10 D2 V CORE Figure 2. Two- Phase Synchronous-Buck Converter Circuit (6) www.richtek.com 7 RT9602 When layout the PCB, it should be very careful. The powercircuit section is the most critical one. If not configured properly, it will generate a large amount of EMI. The junction of Q1, Q2, L2 and Q3, Q4, L4 should be very close. The connection from Q1, and Q3 drain to positive sides of C1, C2, C3, and C4; the connection from Q2, and Q4 source to the negative sides of C1, C2, C3, and C4 should be as short as possible. Next, the trace from Ugate1, Ugate2, Lgate1, and Lgate2 should also be short to decrease the noise of the driver output signals. Phase1 and phase2 signals from the junction of the power MOSFET, carrying the large gate drive current pulses, should be as heavy as the gate drive trace. The bypass capacitor C7 should be connected to PGND directly. Furthermore, the bootstrap capacitors (Cb1, Cb2) should always be placed as close to the pins of the IC as possible. Select the Bootstrap Capacitor Figure 3. shows part of the bootstrap circuit of RT9602. The VCB (the voltage difference between BOOT1 and PHASE1 on RT9602) provides a voltage to the gate of the high side power MOSFET. This supply needs to be ensured that the MOSFET can be driven. For this, the capacitance CB has to be selected properly. It is determined by following constraints. In practice, a low value capacitor C B will lead the overcharging that could damage the IC. Therefore to minimize the risk of overcharging and reducing the ripple on VCB, the bootstrap capacitor should not be smaller than 0.1F, and the larger the better. In general design, using 1F can provide better performance. At least one low-ESR capacitor should be used to provide good local de-coupling. Here, to adopt either a ceramic or tantalum capacitor is suitable. Power Dissipation For not exceeding the maximum allowable power dissipation to drive the IC beyond the maximum recommended operating junction temperature of 125C, it is necessary to calculate power dissipation appropriately. This dissipation is a function of switching frequency and total gate charge of the selected MOSFET. Figure 4. shows the power dissipation test circuit. CL and CU are the UGATE and LGATE load capacitors, respectively. The bootstrap capacitor value is 0.01F. +5V or +12V 0.01uF +5V or +12V UGATE1 1uF +12V 2N7000 CU PHASE1 LGATE1 1uF 2N7000 33 CL PVCC VIN PWM1 RT9602 0.01uF BOOT1 PWM2 + UGATE1 PHASE1 CB UGATE2 VCB - PVCC PGND PGND Figure 3. Part of Bootstrap Circuit of RT9602 CU PHASE2 GND LGATE1 2N7000 LGATE2 2N7000 33 CL Figure 4. RT9602 Power Dissipation Test Circuit Figure 5. shows the power dissipation of the RT9602 as a function of frequency and load capacitance. The value of the CU and CL are the same and the frequency is varied from 100kHz to 600kHz. PVCC and VCC is 12V and connected together. Figure 6.shows the same characterization for PVCC tied to 5V instead of 12V. www.richtek.com 8 DS9602-08 March 2007 RT9602 The method to improve the thermal transfer is to increase Power Dissipation vs. Frequency the PCB copper area around the RT9602, first. Then, adding a ground pad under IC to transfer the heat to the peripheral of the board. 800 CU=CL 700 =5nF CU=CL=4nF Power (mW) 600 CU=CL=3nF 500 Power on Over-Voltage Protection Function The RT9602 provides a protect function which can avoid some short condition happened before power on. CU=CL=2nF 400 300 CU=CL=1nF 200 100 PVcc=Vcc=12V 0 0 100 200 300 400 500 600 Frequency (kHz) Figure 5. Power Dissipation vs. Frequency (RT9602) The following discussion about the power on over-voltage protection function of RT9602 is based on the experiments of the high side MOSFET directly shorted to 12V. The test circuit as shown in the typical application circuit (with RT9241A/B dual-channel synchronous-rectified buck controller) the VCC and the phase signals are measured on the VCC pin and the phase pin of RT9602. The LGATE signal is measured on the gate terminal of MOSEFET. Power Dissipation vs. Frequency 250 CU=CL=4nF Power(mW) 240 230 CU=CL 220 =5nF VVcc > CU=CL=2nF PPEASE > CU=CL=1nF 210 lLGATE > 200 hrountCurrent > CU=CL=3nF 190 Through 12V 180 RT9809-20CV 170 Time (50ms) 50 100 150 200 250 300 350 400 450 Figure 7 High Side Direct Short Frequency(kHz) Figure 6. Power Dissipatin vs. Frequency, PVCC = 5V The operating junction temperature can be calculated from the power dissipation curves (Figure 5 and Figure 6). Assume the RT9602' s PVCC = VCC=12V, operating frequency is 200kHz, and the CU=CL=1.5nF which emulate the input capacitances of the high side and low side power MOSFETs. From Figure 5, the power dissipation is 500mW. In RT9602, the package thermal resistance JA is 127.67C/W, the operating junction temperature is calculated as: TJ = 127.67C/W x 500mW+ 25C = 88.84C where the 25C is the ambient temperature. DS9602-08 March 2007 (11) VVcc > PPEAS > lLGATE > l VCORE> Time (50ms) Figure 8. High Side Direct Short www.richtek.com 9 RT9602 VVcc > PPEASE > lLGATE > lPWM1 > Time (25ms) Figure 9. High Side Direct Short Referring to Figure 7, when VCC exceeds 1.5V, RT9602 turns on the LGATE to clamp the Phase through the low side MOSFET. During the turn-on of the low side MOSFET, the current of ATX 12V is limited at 25A although the maximum current of ATX 12V listed on the case of ATX is 15A. After the ATX 12V shuts down, the VCC falls slowly. Please note that the trigger point of RT9602 is at 1.5V VCC, and the clamped value of phase is at about 2.4V. Next, reference to Figure 8, it is obvious that since the Phase voltage increases during the power-on, the VCORE increases correspondingly, but is gradually decreased as LGATE and VCC decrease. In Figure 9, during the turn-on of the low side MOSFET, the VCC is much less than 12V, thus the RT9241A/B keeps the PWM signal at high impedance state. www.richtek.com 10 DS9602-08 March 2007 RT9602 Outline Dimension H A M J B F C I D Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 8.534 8.738 0.336 0.344 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.254 0.007 0.010 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 14-Lead SOP Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com DS9602-08 March 2007 www.richtek.com 11