IRF630S
N - CHANNEL 200V - 0.35Ω-9A-D
2
PAK
MESH OVERLAYMOSFET
■TYPICALRDS(on) = 0.35 Ω
■EXTREMELYHIGH dv/dt CAPABILITY
■100%AVALANCHE TESTED
■VERY LOW INTRINSIC CAPACITANCES
■GATECHARGE MINIMIZED
■FORTHROUGH-HOLE VERSIONCONTACT
SALESOFFICE
DESCRIPTION
This power MOSFET is designed using the
company’s consolidatedstrip layout-based MESH
OVERLAYprocess. This technology matches
and improves the performances compared with
standardpartsfrom various sources.
APPLICATIONS
■HIGHCURRENT SWITCHING
■UNINTERRUPTIBLE POWER SUPPLY(UPS)
■DC/DC COVERTERS FOR TELECOM,
INDUSTRIAL,AND LIGHTINGEQUIPMENT.
INTERNAL SCHEMATIC DIAGRAM
December 1998
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 200 V
VDGR Drain- gate Voltage (RGS =20kΩ) 200 V
VGS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C9A
I
D
Drain Current (continuous) at Tc=100o
C5.7A
I
DM(•) Drain Current (pulsed) 36 A
Ptot Total Dissipation at Tc=25o
C70W
Derating Factor 0.56 W/oC
dv/dt(1) Peak Diode Recovery voltage slope 5 V/ns
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulse width limited by safe operating area (1)I
SD ≤9A, di/dt ≤300 A/µs, VDD ≤V(BR)DSS,Tj≤T
JMAX
TYPE VDSS RDS(on) ID
IRF630S 200 V < 0.40 Ω9A
13
D
2
PAK
TO-263
(suffix ”T4”)
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THERMAL DATA
Rthj-case
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
1.47
62.5
0.5
300
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax) 9A
E
AS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =50V) 100 mJ
ELECTRICAL CHARACTERISTICS (Tcase =25oC unless otherwisespecified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µ
AV
GS = 0 200 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS =MaxRating T
c=125o
C1
50 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 30 V ±100 nA
ON(∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID= 250 µA 234V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D= 5 A 0.35 0.40 Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 10 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=5A 3 4 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 540
90
35
700
120
50
pF
pF
pF
IRF630S
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ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =100V I
D= 4.5 A
RG=4.7
Ω VGS =10V
(see test circuit, figure 3)
10
15 14
20 ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 160 V ID=9A V
GS =10V 31
7.5
9
45 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =160V I
D=9A
R
G=4.7 Ω VGS =10V
(see test circuit, figure 5)
12
12
25
17
17
35
ns
ns
ns
SOURCE DRAINDIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
9
36 A
A
VSD (∗)ForwardOnVoltage I
SD =9A V
GS =0 1.5 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =9A di/dt=100A/
µ
s
V
DD =50V T
j= 150 oC
(see test circuit, figure 5)
170
0.95
11
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
SafeOperating Area Thermal Impedance
IRF630S
3/8
OutputCharacteristics
Transconductance
Gate Chargevs Gate-sourceVoltage
Transfer Characteristics
Static Drain-source On Resistance
CapacitanceVariations
IRF630S
4/8
Normalized Gate ThresholdVoltage vs
Temperature
Source-drainDiode Forward Characteristics
Normalized On Resistancevs Temperature
IRF630S
5/8
Fig. 1: UnclampedInductiveLoadTest Circuit
Fig. 3: Switching Times Test CircuitsFor
Resistive Load
Fig. 1: UnclampedInductiveWaveform
Fig. 4: Gate Chargetest Circuit
Fig. 5: Test Circuit For InductiveLoad Switching
And Diode Recovery Times
IRF630S
6/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.3 4.6 0.169 0.181
A1 2.49 2.69 0.098 0.106
B 0.7 0.93 0.027 0.036
B2 1.25 1.4 0.049 0.055
C 0.45 0.6 0.017 0.023
C2 1.21 1.36 0.047 0.053
D 8.95 9.35 0.352 0.368
E 10 10.28 0.393 0.404
G 4.88 5.28 0.192 0.208
L 15 15.85 0.590 0.624
L2 1.27 1.4 0.050 0.055
L3 1.4 1.75 0.055 0.068
L2
L3
L
B2
B
G
EA
C2
D
C
A1
P011P6/C
TO-263 (D2PAK) MECHANICAL DATA
IRF630S
7/8
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in thispublication are
subject tochange without notice. Thispublication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components inlife support devices or systems without express written approval of STMicroelectronics.
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IRF630S
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