SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Features Applications Frequencies between 1 MHz and 110 MHz accurate to 6 decimal places Industrial, medical, automotive, avionics and other high temperature applications Operating temperature from -40C to 125C. For -55C option, refer to SiT2020 and SiT2021 Industrial sensors, PLC, motor servo, outdoor networking equipment, medical video cam, asset tracking systems, etc. Supply voltage of 1.8V or 2.5V to 3.3V Excellent total frequency stability as low as 20 ppm Low power consumption of 3.5 mA typical at 1.8V LVCMOS/LVTTL compatible output 5-pin SOT23-5 package: 2.9mm x 2.8mm RoHS and REACH compliant, Pb-free, Halogen-free and Antimony-free For AEC-Q100 clock generators, refer to SiT2024 and SiT2025 Electrical Specifications Table 1. Electrical Characteristics All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values are at 25C and nominal supply voltage. Parameters Symbol Min. Typ. Max. Unit Condition Frequency Range Output Frequency Range f 1 - 110 MHz F_stab -20 - +20 ppm -25 - +25 ppm -30 - +30 ppm -50 - +50 ppm Refer to Table 14 for the exact list of supported frequencies list of supported frequencies Frequency Stability and Aging Frequency Stability Inclusive of Initial tolerance at 25C, 1st year aging at 25C, and variations over operating temperature, rated power supply voltage and load (15 pF 10%). Operating Temperature Range Operating Temperature Range (ambient) T_use -40 - +105 C Extended Industrial -40 - +125 C Automotive Supply Voltage and Current Consumption Supply Voltage Current Consumption OE Disable Current Standby Current Vdd Idd I_od I_std 1.62 1.8 1.98 V 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.7 3.0 3.3 V 2.97 3.3 3.63 V 2.25 - 3.63 V - 3.8 4.7 mA No load condition, f = 20 MHz, Vdd = 2.8V, 3.0V or 3.3V - 3.6 4.5 mA No load condition, f = 20 MHz, Vdd = 2.5V - 3.5 4.5 mA No load condition, f = 20 MHz, Vdd = 1.8V - - 4.5 mA Vdd = 2.5V to 3.3V, OE = Low, Output in high Z state. - - 4.3 mA Vdd = 1.8V, OE = Low, Output in high Z state. - 2.6 8.5 A Vdd = 2.8V to 3.3V, ST = Low, Output is weakly pulled down - 1.4 5.5 A Vdd = 2.5V, ST = Low, Output is weakly pulled down 0.6 4.0 A Vdd = 1.8V, ST = Low, Output is weakly pulled down - LVCMOS Output Characteristics Duty Cycle Rise/Fall Time DC 45 - 55 % Tr, Tf - 1.0 2.0 ns All Vdds Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% - 1.3 2.5 ns Vdd =1.8V, 20% - 80% Vdd = 2.25V - 3.63V, 20% - 80% - 1.0 3 ns Output High Voltage VOH 90% - - Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V) IOH = -3 mA (Vdd = 2.8V or 2.5V) IOH = -2 mA (Vdd = 1.8V) Output Low Voltage VOL - - 10% Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V) IOL = 3 mA (Vdd = 2.8V or 2.5V) IOL = 2 mA (Vdd = 1.8V) SiTime Corporation Rev. 1.0 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Revised May 14, 2015 SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Table 1. Electrical Characteristics (continued) Parameters Symbol Min. Typ. Max. Unit Condition Input Characteristics Input High Voltage VIH 70% - - Vdd Input Low Voltage VIL - - 30% Vdd Pin 3, OE or ST Input Pull-up Impedence Z_in 50 87 150 k Pin 3, OE logic high or logic low, or ST logic high - - M Pin 3, ST logic low 2 Pin 3, OE or ST Startup and Resume Timing Startup Time T_start - - 5 ms Measured from the time Vdd reaches its rated minimum value T_oe - - 130 ns T_resume - - 5 ms f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * clock periods Measured from the time ST pin crosses 50% threshold f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V Enable/Disable Time Resume Time Jitter RMS Period Jitter T_jitt - 1.6 2.5 ps - 1.9 3 ps f = 75 MHz, Vdd = 1.8V 12 20 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V Peak-to-peak Period Jitter T_pk - - 14 25 ps f = 75 MHz, Vdd = 1.8V RMS Phase Jitter (random) T_phj - 0.5 0.8 ps f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz - 1.3 2 ps f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz Table 2. Pin Description Pin Symbol 1 GND Power 2 NC No Connect 3 OE/ ST/NC Top View Functionality Electrical ground 3 No connect Output Enable H[1]: specified frequency output L: output is high impedance. Only output driver is disabled. Standby H or Open[1]: specified frequency output L: output is low (weak pull down). Device goes to sleep mode. Supply current reduces to I_std. No Connect Any voltage between 0 and Vdd or Open[1]: Specified frequency output. Pin 3 has no function. 4 VDD Power Power supply voltage[2] 5 OUT Output Oscillator output Notes: 1. In OE or ST mode, a pull-up resistor of 10 k or less is recommended if pin 3 is not externally driven. If pin 3 needs to be left floating, use the NC option. 2. A capacitor of value 0.1 F or higher between Vdd and GND is required. Rev. 1.0 OE/ST/NC NC Page 2 of 12 2 GND 1 4 5 VDD OUT Figure 1. Pin Assignments www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice N Table 3. Absolute Maximum Limits Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Min. Max. Unit Storage Temperature Parameter -65 150 C Vdd -0.5 4 V Electrostatic Discharge - 2000 V Soldering Temperature (follow standard Pb free soldering guidelines) - 260 C Junction Temperature[3] - 150 C Note: 3. Exceeding this temperature for extended period of time may damage the device. Table 4. Thermal Consideration[4] JA, 4 Layer Board JC, Bottom 421 175 (C/W) Package SOT23-5 (C/W) Note: 4. Refer to JESD51 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table. Table 5. Maximum Operating Junction Temperature[5] Max Operating Temperature (ambient) Maximum Operating Junction Temperature 105C 115C 125C 135C Note: 5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature. Table 6. Environmental Compliance Parameter Condition/Test Method Mechanical Shock MIL-STD-883F, Method 2002 Mechanical Vibration MIL-STD-883F, Method 2007 Temperature Cycle JESD22, Method A104 Solderability MIL-STD-883F, Method 2003 Moisture Sensitivity Level MSL1 @ 260C Rev. 1.0 Page 3 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Test Circuit and Waveform[6] Vout Test Point Vdd Tr 5 15 pF (including probe and fixture capacitance) 4 1 2 Power Supply 0.1F 3 Tf 80% Vdd 50% 20% Vdd High Pulse (TH) Low Pulse (TL) Vdd 1k Period OE/ST Function Figure 2. Test Circuit Figure 3. Output Waveform Note: 6. Duty Cycle is computed as Duty Cycle = TH/Period. Timing Diagrams Vdd 90% Vdd Vdd T_start Pin 4 Voltage 50% Vdd T_resume ST Voltage [7] No Glitch during start up CLK Output CLK Output HZ HZ T_start: Time to start from power-off T_resume: Time to resume from ST Figure 4. Startup Timing (OE/ST Mode) Figure 5. Standby Resume Timing (ST Mode Only) u Vdd Vdd OE Voltage 50% Vdd OE Voltage 50% Vdd T_oe T_oe CLK Output CLK Output HZ HZ T_oe: Time to put the output in High Z mode T_oe: Time to re-enable the clock output Figure 6. OE Enable Timing (OE Mode Only) Figure 7. OE Disable Timing (OE Mode Only) Note: 7. SiT2018 has "no runt" pulses and "no glitch" output during startup or resume. Rev. 1.0 Page 4 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Performance Plots[8] 1.8 V 2.5 V 2.8 V 3V 3.3 V 6.0 DUT1 DUT2 DUT3 DUT4 DUT5 DUT6 DUT7 DUT8 DUT9 DUT10 DUT11 DUT12 DUT13 DUT14 DUT15 DUT16 DUT17 DUT18 DUT19 DUT20 25 5.5 20 15 Frequency (ppm) Idd (mA) 5.0 4.5 4.0 3.5 10 5 0 -5 -10 -15 -20 -25 3.0 0 20 40 60 80 100 55 35 15 Frequency (MHz) Figure 8. Idd vs Frequency 1.8 V 2.5 V 2.8 V 3.0 V 25 45 65 85 105 125 Figure 9. Frequency vs Temperature 3.3 V 1.8 V 2.5 V 2.8 V 3.0 V 3.3 V 55 4.0 54 3.5 53 3.0 52 Duty cycle (%) RMS period jitter (ps) 5 Temperature (C) 2.5 2.0 1.5 1.0 51 50 49 48 47 0.5 46 0.0 0 20 40 60 80 45 100 0 Frequency (MHz) 2.8 V 3.0 V 3.3 V 1.8 V 2.5 2.5 2.0 2.0 1.5 1.0 80 100 2.5 V 2.8 V 20 40 3.0 V 3.3 V 1.5 1.0 0.5 0.5 0.0 0.0 -40 -20 0 20 40 60 80 100 -40 120 Temperature (C) -20 0 60 80 100 120 Temperature (C) Figure 12. 20%-80% Rise Time vs Temperature Rev. 1.0 60 Figure 11. Duty Cycle vs Frequency Fall time (ns) Rise time (ns) 2.5 V 40 Frequency (MHz) Figure 10. RMS Period Jitter vs Frequency 1.8 V 20 Figure 13. 20%-80% Fall Time vs Temperature Page 5 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Performance Plots[8] 1.8 V 2.5 V 2.8 V 3.0 V 3.3 V 1.8 V 2.5 V 2.8 V 3.0 V 3.3 V 1.0 2.0 1.9 0.9 1.8 0.8 1.6 IPJ (ps) IPJ (ps) 1.7 1.5 1.4 1.3 0.7 0.6 0.5 1.2 0.4 1.1 1.0 0.3 10 20 30 40 50 60 70 80 90 100 110 10 Frequency (MHz) 20 30 40 50 60 70 80 90 100 110 Frequency (MHz) Figure 14. RMS Integrated Phase Jitter Random (12k to 20 MHz) vs Frequency[9] Figure 15. RMS Integrated Phase Jitter Random (900 kHz to 20 MHz) vs Frequency[9] Notes: 8. All plots are measured with 15 pF load at room temperature, unless otherwise stated. 9. Phase noise plots are measured with Agilent E5052B signal source analyzer. Integration range is up to 5 MHz for carrier frequencies up to 40 MHz. Rev. 1.0 Page 6 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Programmable Drive Strength The SiT2018 includes a programmable drive strength feature to provide a simple, flexible tool to optimize the clock rise/fall time for specific applications. Benefits from the programmable drive strength feature are: The SiT2018 can support up to 60 pF in maximum capacitive loads with drive strength settings. Refer to the Rise/Tall Time Tables (Table 7 to 11) to determine the proper drive strength for the desired combination of output load vs. rise/fall time SiT2018 Drive Strength Selection * Improves system radiated electromagnetic interference (EMI) by slowing down the clock rise/fall time * Improves the downstream clock receiver's (RX) jitter by decreasing (speeding up) the clock rise/fall time. * Ability to drive large capacitive loads while maintaining full swing with sharp edge rates. For more detailed information about rise/fall time control and drive strength selection, see the SiTime Application Notes section: http://www.sitime.com/support/application-notes. Tables 7 through 11 define the rise/fall time for a given capacitive load and supply voltage. EMI Reduction by Slowing Rise/Fall Time Figure 16 shows the harmonic power reduction as the rise/fall times are increased (slowed down). The rise/fall times are expressed as a ratio of the clock period. For the ratio of 0.05, the signal is very close to a square wave. For the ratio of 0.45, the rise/fall times are very close to near-triangular waveform. These results, for example, show that the 11th clock harmonic can be reduced by 35 dB if the rise/fall edge is increased from 5% of the period to 45% of the period. 4. The left-most column represents the part number code for the corresponding drive strength. 1. Select the table that matches the SiT2018 nominal supply voltage (1.8V, 2.5V, 2.8V, 3.0V, 3.3V). 2. Select the capacitive load column that matches the application requirement (5 pF to 60 pF) 3. Under the capacitive load column, select the desired rise/fall times. 5. Add the drive strength code to the part number for ordering purposes. Calculating Maximum Frequency Based on the rise and fall time data given in Tables 7 through 11, the maximum frequency the oscillator can operate with guaranteed full swing of the output voltage over temperature can be calculated as the following: trise=0.05 trise=0.1 trise=0.15 trise=0.2 10 Harmonic amplitude (dB) 0 M a x F re q u e n c y = trise=0.25 trise=0.3 trise=0.35 trise=0.4 trise=0.45 -10 -20 where Trf_20/80 is the typical value for 20%-80% rise/fall time. -30 Example 1 -40 -50 Calculate fMAX for the following condition: -60 -70 -80 1 5 x T rf_ 2 0 /8 0 1 3 5 7 9 11 Harm onic num ber Figure 16. Harmonic EMI reduction as a Function of Slower Rise/Fall Time Jitter Reduction with Faster Rise/Fall Time Power supply noise can be a source of jitter for the downstream chipset. One way to reduce this jitter is to speed up the rise/fall time of the input clock. Some chipsets may also require faster rise/fall time in order to reduce their sensitivity to this type of jitter. Refer to the Rise/Fall Time Tables (Table 7 to Table 11) to determine the proper drive strength. * Vdd = 1.8V (Table 7) * Capacitive Load: 30 pF * Desired Tr/f time = 3 ns (rise/fall time part number code = E) Part number for the above example: SiT2018BIES2-18E-66.666660 Drive strength code is inserted here. Default setting is "-" High Output Load Capability The rise/fall time of the input clock varies as a function of the actual capacitive load the clock drives. At any given drive strength, the rise/fall time becomes slower as the output load increases. As an example, for a 3.3V SiT2018 device with default drive strength setting, the typical rise/fall time is 1ns for 15 pF output load. The typical rise/fall time slows down to 2.6 ns when the output load increases to 45 pF. One can choose to speed up the rise/fall time to 1.83 ns by then increasing the drive strength setting on the SiT2018. Rev. 1.0 Page 7 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Rise/Fall Time (20% to 80%) vs CLOAD Tables Table 7. Vdd = 1.8V Rise/Fall Times for Specific CLOAD Table 8. Vdd = 2.5V Rise/Fall Times for Specific CLOAD Rise/Fall Time Typ (ns) Rise/Fall Time Typ (ns) Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF L A R B T E U F or "": default 6.16 3.19 2.11 1.65 0.93 0.78 0.70 0.65 11.61 6.35 4.31 3.23 1.91 1.66 1.48 1.30 22.00 11.00 7.65 5.79 3.32 2.94 2.64 2.40 31.27 16.01 10.77 8.18 4.66 4.09 3.68 3.35 39.91 21.52 14.47 11.08 6.48 5.74 5.09 4.56 L A R B T E or "": default U F 4.13 2.11 1.45 1.09 0.62 8.25 4.27 2.81 2.20 1.28 12.82 7.64 5.16 3.88 2.27 21.45 11.20 7.65 5.86 3.51 27.79 14.49 9.88 7.57 4.45 0.54 0.43 0.34 1.00 0.96 0.88 2.01 1.81 1.64 3.10 2.79 2.54 4.01 3.65 3.32 Table 9. Vdd = 2.8V Rise/Fall Times for Specific CLOAD Table 10. Vdd = 3.0V Rise/Fall Times for Specific CLOAD Rise/Fall Time Typ (ns) Rise/Fall Time Typ (ns) Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF L A R B T 3.77 1.94 1.29 0.97 0.55 7.54 3.90 2.57 2.00 1.12 12.28 7.03 4.72 3.54 2.08 19.57 10.24 7.01 5.43 3.22 25.27 13.34 9.06 6.93 4.08 E or "": default U F 0.44 0.34 0.29 1.00 0.88 0.81 1.83 1.64 1.48 2.82 2.52 2.29 3.67 3.30 2.99 L A R B T or "": default E U F 3.60 1.84 1.22 0.89 0.51 0.38 0.30 0.27 7.21 3.71 2.46 1.92 1.00 0.92 0.83 0.76 11.97 6.72 4.54 3.39 1.97 1.72 1.55 1.39 18.74 9.86 6.76 5.20 3.07 2.71 2.40 2.16 24.30 12.68 8.62 6.64 3.90 3.51 3.13 2.85 Table 11. Vdd = 3.3V Rise/Fall Times for Specific CLOAD Rise/Fall Time Typ (ns) Drive Strength \ CLOAD 5 pF 15 pF 30 pF 45 pF 60 pF L A R B 3.39 1.74 1.16 0.81 6.88 3.50 2.33 1.82 11.63 6.38 4.29 3.22 17.56 8.98 6.04 4.52 23.59 12.19 8.34 6.33 T or "": default E U F 0.46 0.33 0.28 0.25 1.00 0.87 0.79 0.72 1.86 1.64 1.46 1.31 2.60 2.30 2.05 1.83 3.84 3.35 2.93 2.61 Rev. 1.0 Page 8 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Pin 3 Configuration Options (OE, ST, or NC) Pin 3 of the SiT2018 can be factory-programmed to support three modes: Output Enable (OE), standby (ST) or No Connect (NC). In addition, the SiT2018 supports "no runt" pulses, and "no glitch" output during startup or resume as shown in the waveform captures in Figure 17 and Figure 18. Output Enable (OE) Mode In the OE mode, applying logic Low to the OE pin only disables the output driver and puts it in Hi-Z mode. The core of the device continues to operate normally. Power consumption is reduced due to the inactivity of the output. When the OE pin is pulled High, the output is typically enabled in <1s. Standby (ST) Mode In the ST mode, a device enters into the standby mode when Pin 3 pulled Low. All internal circuits of the device are turned off. The current is reduced to a standby current, typically in the range of a few A. When ST is pulled High, the device goes through the "resume" process, which can take up to 5 ms. Figure 17. Startup Waveform vs. Vdd No Connect (NC) Mode In the NC mode, the device always operates in its normal mode and outputs the specified frequency regardless of the logic level on pin 3. Table 12 below summarizes the key relevant parameters in the operation of the device in OE, ST, or NC mode. Table 12. OE vs. ST vs. NC OE ST NC Active current 20 MHz (max, 1.8V) 4.5 mA 4.5 mA 4.5 mA OE disable current (max. 1.8V) 4.3 mA N/A N/A N/A 0.6 uA N/A 130 ns N/A N/A N/A 5 ms N/A High Z weak pull-down N/A Standby current (typical 1.8V) OE enable time at 110 MHz (max) Resume time from standby (max, all frequency) Output driver in OE disable/standby mode Figure 18. Startup Waveform vs. Vdd (Zoomed-in View of Figure 17) Output on Startup and Resume The SiT2018 comes with gated output. Its clock output is accurate to the rated frequency stability within the first pulse from initial device startup or resume from the standby mode. Rev. 1.0 Page 9 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Dimensions and Patterns Package Size - Dimensions (Unit: mm)[10] Recommended Land Pattern (Unit: mm)[11] 2.90 x 2.80 mm SOT23-5 Notes: 10.Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of "Y" will depend on the assembly location of the device. 11. A capacitor value of 0.1 F between Vdd and GND is required Table 13. Dimension Table Symbol Min. Nom. A 0.90 1.25 Max. 1.45 A1 0.00 0.05 0.15 A2 0.90 1.10 1.30 b 0.35 0.40 0.50 c 0.08 0.15 0.20 D 2.80 2.90 3.00 E 2.60 2.80 3.00 E1 1.50 1.625 1.75 L 0.35 0.45 0.60 L1 0.60 REF e 0.95 BSC. e1 1.90 BSC. Rev. 1.0 0 2.5 8 Page 10 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Ordering Information The Part No. Guide is for reference only. To customize and build an exact part number, use the SiTime Part Number Generator. SiT2018BA -S2-18E -25.000025D Packing Method Part Family "SiT2018" "D": 8 mm Tape & Reel, 3ku reel "E": 8 mm Tape & Reel, 1ku reel Blank for Bulk Revision Letter "B" is the revision Frequency Refer to the Supported Frequencies Table below Temperature Range "E" Ext. Industrial -40C to 105C "A" Automotive -40C to 125C Feature Pin "E" for Output Enable "S" for Standby "N" for No Connect Output Drive Strength "-" Default (datasheet limits) See Tables 7 to 11 for rise/fall times "L" "A" "R" "B" Supply Voltage "18" for 1.8V 10% "25" for 2.5V 10% "28" for 2.8V 10% "30" for 3.0V 10% "33" for 3.3V 10% "XX" for 2.5V -10% to 3.3V +10% "T" "E" "U" "F" Package Size Frequency Stability "1" for 20 ppm "2" for 25 ppm "8" for 30 ppm "3" for 50 ppm "S" SOT23-5 (2.9 x 2.8 mm) Table 14. List of Supported Frequencies[12, 13] Frequency Range (-40 to +105C or -40 to +125C) Min. Max. 1.000000 MHz 61.222999 MHz 61.674001 MHz 69.795999 MHz 70.485001 MHz 79.062999 MHz 79.162001 MHz 81.427999 MHz 82.232001 MHz 91.833999 MHz 92.155001 MHz 94.248999 MHz 94.430001 MHz 94.874999 MHz 94.994001 MHz 97.713999 MHz 98.679001 MHz 110.000000 MHz Notes: 12. Any frequency within the min and max values in the above table are supported with 6 decimal places of accuracy. 13. Please contact SiTime for frequencies that are not listed in the tables above. Rev. 1.0 Page 11 of 12 www.sitime.com SiT2018B High Temp, Single-Chip, One-Output Clock Generator The Smart Timing Choice The Smart Timing Choice Table 15. Additional Information Document Description Download Link Time Machine II MEMS oscillator programmer http://www.sitime.com/support/time-machine-oscillator-programmer Field Programmable Oscillators Devices that can be programmable in the field by Time Machine II http://www.sitime.com/products/field-programmable-oscillators Manufacturing Notes Tape & Reel dimension, reflow profile and other manufacturing related info http://www.sitime.com/component/docman/doc_download/243-manufacturing-notes-for-sitime-oscillators Qualification Reports RoHS report, reliability reports, composition reports http://www.sitime.com/support/quality-and-reliability Additional performance data such as phase noise, current consumption and jitter for selected frequencies http://www.sitime.com/support/performance-measurement-report Performance Reports Termination Techniques Termination design recommendations http://www.sitime.com/support/application-notes Layout Techniques Layout recommendations http://www.sitime.com/support/application-notes Revision History Table 16. Datasheet Version and Change Log Version Release Date 1.0 5/14/15 Change Summary Final Production Release. (c) SiTime Corporation 2015. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress. 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Rev. 1.0 Page 12 of 12 www.sitime.com The Smart Timing Choice The Smart Timing Choice Supplemental Information The Supplemental Information section is not part of the datasheet and is for informational purposes only. SiTime Corporation 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com The Smart Timing Choice The Smart Timing Choice Silicon MEMS Outperforms Quartz SiTime Corporation Silicon MEMS Outperforms Quartz Rev. 1.1 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Revised October 5, 2013 Silicon MEMS Outperforms Quartz The Smart Timing Choice The Smart Timing Choice Best Reliability Best Electro Magnetic Susceptibility (EMS) Silicon is inherently more reliable than quartz. Unlike quartz suppliers, SiTime has in-house MEMS and analog CMOS expertise, which allows SiTime to develop the most reliable products. Figure 1 shows a comparison with quartz technology. SiTime's oscillators in plastic packages are up to 54 times more immune to external electromagnetic fields than quartz oscillators as shown in Figure 3. Why is SiTime Best in Class: * SiTime's MEMS resonators are vacuum sealed using an advanced EpiSealTM process, which eliminates foreign particles and improves long term aging and reliability * World-class MEMS and CMOS design expertise Why is SiTime Best in Class: * Internal differential architecture for best common mode noise rejection * Electrostatically driven MEMS resonator is more immune to EMS SiTime vs Quartz Electro Magnetic Susceptibility (EMS) Mean Time Between Failure (Million Hours) - 30 - 39 500 IDT (Fox) 38 SiTime 20X Better 28 Epson TXC 16 Pericom 14 Average Spurs (dB) SiTime - 40 - 40 - 42 - 43 - 45 - 50 - 60 SiTime 54X Better - 70 - 73 - 80 - 90 200 0 Kyocera 600 400 Figure 1. Reliability Comparison[1] Epson TXC CW SiLabs SiTime Figure 3. Electro Magnetic Susceptibility (EMS)[3] Best Aging Best Power Supply Noise Rejection Unlike quartz, MEMS oscillators have excellent long term aging performance which is why every new SiTime product specifies 10-year aging. A comparison is shown in Figure 2. SiTime's MEMS oscillators are more resilient against noise on the power supply. A comparison is shown in Figure 4. * SiTime's MEMS resonators are vacuum sealed using an advanced EpiSeal process, which eliminates foreign particles and improves long term aging and reliability * Inherently better immunity of electrostatically driven MEMS resonator SiTime MEMS vs. Quartz Aging 10 SiTime MEMS Oscillator Quartz Oscillator 8.0 Aging (PPM) 8 SiTime 2X Better 6 4 2 0 3.0 3.5 1.5 1-Year 10-Year Figure 2. Aging Comparison[2] Silicon MEMS Outperforms Quartz Rev. 1.1 Why is SiTime Best in Class: * On-chip regulators and internal differential architecture for common mode noise rejection * Best analog CMOS design expertise Additive Integrated Phase Jitter per mVp-p Injected Noise (ps/mv) Why is SiTime Best in Class: Power Supply Noise Rejection SiTIme 5.0 NDK Epson Kyocera 4.0 3.0 2.0 SiTime SiTime 3X Better 1.0 0.0 10 100 1,000 Power Supply Noise Frequency (kHz) 10,000 Figure 4. Power Supply Noise Rejection[4] www.sitime.com Silicon MEMS Outperforms Quartz The Smart Timing Choice The Smart Timing Choice Best Vibration Robustness Best Shock Robustness High-vibration environments are all around us. All electronics, from handheld devices to enterprise servers and storage systems are subject to vibration. Figure 5 shows a comparison of vibration robustness. SiTime's oscillators can withstand at least 50,000 g shock. They all maintain their electrical performance in operation during shock events. A comparison with quartz devices is shown in Figure 6. Why is SiTime Best in Class: Why is SiTime Best in Class: * The moving mass of SiTime's MEMS resonators is up to 3000 times smaller than quartz * Center-anchored MEMS resonator is the most robust design * The moving mass of SiTime's MEMS resonators is up to 3000 times smaller than quartz * Center-anchored MEMS resonator is the most robust design Vibration Sensitivity (ppb/g) TXC Epson Connor Winfield Kyocera SiLabs 100.00 10.00 1.00 SiTime Up to 30x Better 0.10 10 100 Vibration Frequency (Hz) Figure 5. Vibration Robustness[5] 1000 Peak Frequency Deviation (PPM) Vibration Sensitivity vs. Frequency SiTime 16 14 Differential XO Shock Robustness - 500 g 14.3 12.6 12 10 8 SiTime Up to 25x Better 6 3.9 4 2.9 2.5 2 0.6 0 Kyocera Epson TXC CW SiLabs SiTime Figure 6. Shock Robustness[6] Notes: 1. Data Source: Reliability documents of named companies. 2. Data source: SiTime and quartz oscillator devices datasheets. 3. Test conditions for Electro Magnetic Susceptibility (EMS): * According to IEC EN61000-4.3 (Electromagnetic compatibility standard) * Field strength: 3V/m * Radiated signal modulation: AM 1 kHz at 80% depth * Carrier frequency scan: 80 MHz - 1 GHz in 1% steps * Antenna polarization: Vertical * DUT position: Center aligned to antenna Devices used in this test: SiTime, SiT9120AC-1D2-33E156.250000 - MEMS based - 156.25 MHz Epson, EG-2102CA 156.2500M-PHPAL3 - SAW based - 156.25 MHz TXC, BB-156.250MBE-T - 3rd Overtone quartz based - 156.25 MHz Kyocera, KC7050T156.250P30E00 - SAW based - 156.25 MHz Connor Winfield (CW), P123-156.25M - 3rd overtone quartz based - 156.25 MHz SiLabs, Si590AB-BDG - 3rd overtone quartz based - 156.25 MHz 4. 50 mV pk-pk Sinusoidal voltage. Devices used in this test: SiTime, SiT8208AI-33-33E-25.000000, MEMS based - 25 MHz NDK, NZ2523SB-25.6M - quartz based - 25.6 MHz Kyocera, KC2016B25M0C1GE00 - quartz based - 25 MHz Epson, SG-310SCF-25M0-MB3 - quartz based - 25 MHz 5. Devices used in this test: same as EMS test stated in Note 3. 6. Test conditions for shock test: * MIL-STD-883F Method 2002 * Condition A: half sine wave shock pulse, 500-g, 1ms * Continuous frequency measurement in 100 s gate time for 10 seconds Devices used in this test: same as EMS test stated in Note 3 7. Additional data, including setup and detailed results, is available upon request to qualified customers. Please contact productsupport@sitime.com. Silicon MEMS Outperforms Quartz Rev. 1.1 www.sitime.com Document Feedback Form The Smart Timing Choice The Smart Timing Choice SiTime values your input in improving our documentation. Click here for our online feedback form or fill out and email the form below to productsupport@sitime.com. 1. Does the Electrical Characteristics table provide complete information? Yes No If No, what parameters are missing? _________________________________________________________________________________________________ 2. Is the organization of this document easy to follow? Yes No If "No," please suggest improvements that we can make: _________________________________________________________________________________________________ 3. Is there any application specific information that you would like to see in this document? (Check all that apply) EMI Termination recommendations Shock and vibration performance Other If "Other," please specify: _________________________________________________________________________________________________ 4. Are there any errors in this document? Yes No If "Yes", please specify (what and where): _________________________________________________________________________________________________ 5. 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