7-143
TO-243AA
(SOT-89)
BVDSS /R
DS(ON) VGS(th) ID(ON)
BVDGS (max) (max) (min) TO-92 TO-243AA* Die
-350V 25-2.4V -0.4A TP2535N3 TP2535ND
-400V 25-2.4V -0.4A TP2540N3 TP2540N8 TP2540ND
* Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
MIL visual screening available.
Ordering Information
TP2535
TP2540
Low Threshold
Package Options
Features
Low threshold — -2.4V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Order Number / Package
P-Channel Enhancement-Mode
Vertical DMOS FETs
Applications
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
Note: See Package Outline section for dimensions.
G D
SS G D
TO-92
D
7-144
TP2535/TP2540
Symbol Parameter Min Typ Max Unit Conditions
BVDSS TP2540 -400
TP2535 -350
VGS(th) Gate Threshold Voltage -1.0 -2.4 V VGS = VDS, ID = -1mA
VGS(th) Change in VGS(th) with Temperature 4.8 mV/°CV
GS = VDS, ID = -1mA
IGSS Gate Body Leakage -100 nA VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current -10 µAV
GS = 0V, VDS = Max Rating
VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON) ON-State Drain Current -0.2 -0.3 AVGS = -4.5V, VDS = -25V
-0.4 -1.1 VGS = -10V, VDS = -25V
RDS(ON) Static Drain-to-Source 20 30 VGS = -4.5V, ID = -100mA
ON-State Resistance 19 25 VGS = -10V, ID = -100mA
RDS(ON) Change in RDS(ON) with Temperature 0.75 %/°CV
GS = -10V, ID = -100mA
GFS Forward Transconductance 100 175 m VDS = -25V, ID = -100mA
CISS Input Capacitance 60 125
COSS Common Source Output Capacitance 20 70 pF
CRSS Reverse Transfer Capacitance 10 25
td(ON) Turn-ON Delay Time 10
trRise Time 10
td(OFF) Turn-OFF Delay Time 20
tfFall Time 13
VSD Diode Forward Voltage Drop -1.8 V VGS = 0V, ISD = -100mA
trr Reverse Recovery Time 300 ns VGS = 0V, ISD = -100mA
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Thermal Characteristics
VV
GS = 0V, ID = -2mA
-1.0 mA
Electrical Characteristics (@ 25°C unless otherwise specified)
ns
VGS = 0V, VDS = -25V
f = 1 MHz
VDD = -25V
ID = -0.4A
RGEN = 25
Switching Waveforms and Test Circuit
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja IDR*I
DRM
@ TA = 25°C°C/W °C/W
TO-92 -0.12A -0.6A 0.74W 125 170 -0.12A -0.6A
TO-243AA -0.4A -1.2A 1.6W15 78-0.4A -1.2A
* ID (continuous) is limited by max rated Tj.
Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Signficant PD increase possible on ceramic substrate.
Drain-to-Source
Breakdown Voltage
90%
10%
90%
90%
10% 10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
7-145
TP2535/TP2540
Maximum Rated Safe Operating Area
Output Characteristics
-2.0
-1.6
-1.2
-0.8
-0.4
0
Saturation Characteristics
-1.0
-0.8
-0.6
-0.4
-0.2
0
-1 -1000-100-10
Thermal Response Characteristics
Thermal Resistance (normalized)
Transconductance vs. Drain Current
0.5
0.4
0.3
0.2
0.1
00 -2.0-0.4
Power Dissipation vs. Ambient Temperature
0 15010050
2.0
1257525
0 -10 -20 -30 -50-40
-4V
0 -2 -4 -6 -10-8
- 6V
-6V
-8V - 8V
-0.8 -1.2 -1.6 0
TO-243AA
TO-92
T
A
= -55°C
25°C
1.0
- 4V
125°C
TO-243AA(pulsed)
TO-92 (pulsed)
TO-92 (DC)
TO-243AA (DC)
T
A
= 25°C
-0.1
-1.0
-10
-0.01
1.0
0.8
0.6
0.4
0.2
0
0.001 100.01 0.1 1
TO-243AA
T
A
= 25°C
P
D
= 1.6W
V
DS
(volts)
I
D
(amperes)
I
D
(amperes)
V
DS
(volts)
V
GS
=
-10V
V
GS
=
-10V
G
FS
(siemens)
I
D
(amperes) T
A
(°C)
P
D
(watts)
V
DS
= -25V
t
p
(seconds)V
DS
(volts)
I
D
(amperes)
TO-92
P
D
= 1W
T
C
= 25°C
Typical Performance Curves
7-146
TP2535/TP2540
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
V
GS
(volts)
T
j
GS(th)
V (normalized)
DS(ON)
R (normalized)
V
DS(th)
and R Variation with Temperature
C)°(
On-Resistance vs. Drain Current
(amperes)
D
(ohms)
DS(ON)
R
Variation with Temperature
DSS
DSS
BV (normalized)
C)°(T
j
Transfer Characteristics
V
GS
(volts)
I(amperes)
D
Capacitance vs. Drain-to-Source Voltage
200
C (picofarads)
V
DS
(volts)
I
BV
0 -10 -20 -30 -40
150
100
0
0-2-4-6-8-10
-2
-1.6
-1.2
-0.8
-0.4
0
-50 0 50 100 150
1.1
1.0
100
80
60
40
20
0
1.2
1.1
1.0
0.9
0.8
-10
-8
-6
-4
-2
0 0.4 0.8 1.2 1.6 2.0
-50 0 50 100 150
60pF
V
DS
= - 40V
V
DS
= - 10V
V
GS
= -4.5V
V
GS
= -10V
T= -55°C
A
V
DS
= - 25V
125°C
0 -0.4 -0.8 -1.2 -2.0-1.6
f = 1MHz
C
ISS
C
OSS
0.9
190 pF
2.5
2.0
1.5
1.0
0.5
0
(th)
V @ -1mA
25°C
50
0
C
RSS
R
DS(ON)
@ -10V, -0.1A
Typical Performance Curves