1
LTC4412
4412fa
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
Low Loss PowerPath
TM
Controller in ThinSOT
■
Very Low Loss Replacement for Power Supply
OR’ing Diodes
■
Minimal External Components
■
Automatic Switching Between DC Sources
■
Simplifies Load Sharing with Multiple Batteries
■
Low Quiescent Current: 11μA
■
3V to 28V AC/DC Adapter Voltage Range
■
2.5V to 28V Battery Voltage Range
■
Reverse Battery Protection
■
Drives Almost Any Size MOSFET for Wide Range of
Current Requirements
■
MOSFET Gate Protection Clamp
■
Manual Control Input
■
Low Profile (1mm) ThinSOT
TM
Package
■
Cellular Phones
■
Notebook and Handheld Computers
■
Digital Cameras
■
USB-Powered Peripherals
■
Uninterruptable Power Supplies
■
Logic Controlled Power Switch
The LTC
®
4412 controls an external P-channel MOSFET to
create a near ideal diode function for power switchover or
load sharing. This permits highly efficient OR’ing of mul-
tiple power sources for extended battery life and low self-
heating. When conducting, the voltage drop across the
MOSFET is typically 20mV. For applications with a wall
adapter or other auxiliary power source, the load is auto-
matically disconnected from the battery when the auxiliary
source is connected. Two or more LTC4412s may be
interconnected to allow load sharing between multiple
batteries or charging of multiple batteries from a single
charger.
The wide supply operating range supports operation from
one to six Li-Ion cells in series. The low quiescent current
(11μA typical) is independent of the load current. The gate
driver includes an internal voltage clamp for MOSFET
protection.
The STAT pin can be used to enable an auxiliary P-channel
MOSFET power switch when an auxiliary supply is
detected. This pin may also be used to indicate to a
microcontroller that an auxiliary supply is connected.
The
control (CTL) input enables the user to force the primary
MOSFET off and the STAT pin low.
The LTC4412 is available in a low profile (1mm) ThinSOT
package.
PowerPath and ThinSOT are trademarks of Linear Technology Corporation.
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412 C
OUT
TO LOAD
STATUS OUTPUT
LOW WHEN WALL
ADAPTER PRESENT
470k
4412 F01
V
CC
1N5819
FDN306P
BATTERY
CELL(S)
WALL
ADAPTER
INPUT
Figure 1. Automatic Switchover of Load Between a Battery and a Wall Adapter
FORWARD VOLTAGE (V)
0.02
0
CURRENT (A)
1
CONSTANT
RON
4412 F01b
0.5
CONSTANT
VOLTAGE SCHOTTKY
DIODE
LTC4412
LTC4412 vs Schottky Diode
Forward Voltage Drop
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
2
LTC4412
4412fa
(Note 1)
Supply Voltage (V
IN
) .................................. –14V to 36V
Voltage from V
IN
to SENSE ........................ –28V to 28V
Input Voltage
CTL ........................................................– 0.3V to 36V
SENSE .................................................... –14V to 36V
Output Voltage
GATE ..................... –0.3V to the Higher of V
IN
+ 0.3V
or SENSE + 0.3V
STAT .....................................................–0.3V to 36V
Operating Temperature Range
(Note 2) ............................................. – 40°C to 85°C
Junction Temperature........................................... 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ABSOLUTE MAXIMUM RATINGS
W
WW
U
T
JMAX
= 125°C, θ
JA
= 230°C/W
The ● denotes specifications which apply over the full operating
temperature range, unless otherwise noted specifications are at TA = 25°C, VIN = 12V, CTL and GND = 0V. Current into a pin is positive
and current out of a pin is negative. All voltages are referenced to GND, unless otherwise specified.
ELECTRICAL CHARACTERISTICS
VIN 1
GND 2
CTL 3
6 SENSE
5 GATE
4 STAT
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
, Operating Supply Range V
IN
and/or V
SENSE
Must Be in This Range ●2.5 28 V
V
SENSE
for Proper Operation
I
QFL
Quiescent Supply Current at Low Supply V
IN
= 3.6V. Measure Combined Current ●11 19 μA
While in Forward Regulation at V
IN
and SENSE Pins Averaged with
V
SENSE
= 3.5V and V
SENSE
= 3.6V (Note 3)
I
QFH
Quiescent Supply Current at High Supply V
IN
= 28V. Measure Combined Current ●15 26 μA
While in Forward Regulation at V
IN
and SENSE Pins Averaged with
V
SENSE
= 27.9V and V
SENSE
= 28V (Note 3)
I
QRL
Quiescent Supply Current at Low Supply V
IN
= 3.6V, V
SENSE
= 3.7V. Measure 10 19 μA
While in Reverse Turn-Off Combined Current of V
IN
and SENSE Pins
I
QRH
Quiescent Supply Current at High Supply V
IN
= 27.9V, V
SENSE
= 28V. Measure 16 28 μA
While in Reverse Turn-Off Combined Current of V
IN
and SENSE Pins
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4412ES6#PBF LTC4412ES6#TRPBF LTA2 6-Lead Plastic TSOT-23 –40°C to 85°C
LTC4412IS6#PBF LTC4412IS6#TRPBF LTA2 6-Lead Plastic TSOT-23 –40°C to 85°C
LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4412ES6 LTC4412ES6#TR LTA2 6-Lead Plastic TSOT-23 –40°C to 85°C
LTC4412IS6 LTC4412IS6#TR LTA2 6-Lead Plastic TSOT-23 –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is indicated by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
PI CO FIGURATIO
UUU
ORDER I FOR ATIO
UUW
3
LTC4412
4412fa
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4412E is guaranteed to meet performance specifications
from 0°C to 85°C operating temperature range. Specifications over the –
40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC4412IS6 is guaranteed over the –40°C to 85°C operating temperature
range.
Note 3: This results in the same supply current as would be observed with
an external P-channel MOSFET connected to the LTC4412 and operating in
forward regulation.
Note 4: V
IN
is held at 12V and GATE is forced to 10.5V. SENSE is set at
12V to measure the source current at GATE. SENSE is set at 11.9V to
measure sink current at GATE.
Note 5: V
IN
is held at 12V and SENSE is stepped from 12.2V to 11.8V to
trigger the event. GATE voltage is initially V
G(OFF)
.
Note 6: V
IN
is held at 12V and SENSE is stepped from 11.8V to 12.2V to
trigger the event. GATE voltage is initially internally clamped at V
G(ON)
.
Note 7: STAT is forced to V
IN
– 1.5V. SENSE is set at V
IN
– 0.1V to
measure the off current at STAT. SENSE is set V
IN
+ 0.1V to measure the
sink current at STAT.
Note 8: STAT is forced to 9V and V
IN
is held at 12V. SENSE is stepped
from 11.8V to 12.2V to measure the STAT turn-on time defined when I
STAT
reaches one half the measured I
S(SNK).
SENSE is stepped from 12.2V to
11.8V to measure the STAT turn-off time defined when I
STAT
reaches one
half the measured I
S(SNK) .
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
QCL
Quiescent Supply Current at Low Supply V
IN
= 3.6V, V
SENSE
= 0V, V
CTL
= 1V 7 13 μA
with CTL Active
I
QCH
Quiescent Supply Current at High Supply V
IN
= 28V, V
SENSE
= 0V, V
CTL
= 1V 12 20 μA
with CTL Active
I
LEAK
V
IN
and SENSE Pin Leakage Currents V
IN
= 28V, V
SENSE
= 0V; V
SENSE
= 28V, V
IN
= 0V –3 0 1 μA
When Other Pin Supplies Power V
IN
= 14V, V
SENSE
= –14V; V
SENSE
= 14V, V
IN
= –14V
PowerPath Controller
V
FR
PowerPath Switch Forward Regulation V
IN
– V
SENSE
, 2.5V ≤ V
IN
≤ 28V ●10 20 32 mV
Voltage
V
RTO
PowerPath Switch Reverse Turn-Off V
SENSE
– V
IN
, 2.5V ≤ V
IN
≤ 28V ●10 20 32 mV
Threshold Voltage
GATE and STAT Outputs
GATE Active Forward Regulation (Note 4)
I
G(SRC)
Source Current –1 –2.5 –5 μA
I
G(SNK)
Sink Current 25 50 85 μA
V
G(ON)
GATE Clamp Voltage Apply I
GATE
= 1μA, V
IN
= 12V, 6.3 7 7.7 V
V
SENSE
= 11.9V, Measure V
IN
– V
GATE
V
G(OFF)
GATE Off Voltage Apply I
GATE
= – 5μA, V
IN
= 12V, 0.13 0.25 V
V
SENSE
= 12.1V, Measure V
SENSE
– V
GATE
t
G(ON)
GATE Turn-On Time V
GS
< –3V, C
GATE
= 1nF (Note 5) 110 175 μs
t
G(OFF)
GATE Turn-Off Time V
GS
> –1.5V, C
GATE
= 1nF (Note 6) 13 22 μs
I
S(OFF)
STAT Off Current 2.5V ≤ V
IN
≤ 28V (Note 7) ●–1 0 1 μA
I
S(SNK)
STAT Sink Current 2.5V ≤ V
IN
≤ 28V (Note 7) ●61017 μA
t
S(ON)
STAT Turn-On Time (Note 8) 4.5 25 μs
t
S(OFF)
STAT Turn-Off Time (Note 8) 40 75 μs
CTL Input
V
IL
CTL Input Low Voltage 2.5V ≤ V
IN
≤ 28V ●0.5 0.35 V
V
IH
CTL Input High Voltage 2.5V ≤ V
IN
≤ 28V ●0.9 0.635 V
I
CTL
CTL Input Pull-Down Current 0.35V ≤ V
CTL
≤ 28V 1 3.5 5.5 μA
H
CTL
CTL Hysteresis 2.5V ≤ V
IN
≤ 28V 135 mV
The ● denotes specifications which apply over the full operating
temperature range, unless otherwise noted specifications are at TA = 25°C, VIN = 12V, CTL and GND = 0V. Current into a pin is positive
and current out of a pin is negative. All voltages are referenced to GND, unless otherwise specified.
ELECTRICAL CHARACTERISTICS
4
LTC4412
4412fa
VFR vs Temperature and
Supply Voltage
VRTO vs Temperature and
Supply Voltage
Normalized Quiescent Supply
Current vs Temperature
ILEAK vs Temperature VG(ON) vs Temperature VG(OFF) vs Temperature and IGATE
tG(ON) vs Temperature tG(OFF) vs Temperature IS(SNK) vs Temperature and VIN
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TEMPERATURE (°C)
–50
V
FR
(mV)
22
20
18 25 75
4412 G01
–25 0 50 100 125
V
IN
= 2.5V
V
IN
= 28V
TEMPERATURE (°C)
–50
V
RTO
(mV)
22
20
18 25 75
4412 G02
–25 0 50 100 125
V
IN
= 2.5V
V
IN
= 28V
TEMPERATURE (°C)
–50
CURRENT (μA)
1.05
1.0
0.95 25 75
4412 G03
–25 0 50 100 125
3.6V ≤ V
IN
≤ 28V
TEMPERATURE (°C)
–50
CURRENT (μA)
–0.20
–0.25
–0.30
–0.35 25 75
4412 G04
–25 0 50 100 125
TEMPERATURE (°C)
–50
VOLTAGE (V)
7.1
7.0
6.9 25 75
4412 G05
–25 0 50 100 125
8V ≤ V
IN
≤ 28V
I
GATE
= 1μA
TEMPERATURE (°C)
–50
VOLTAGE (V)
0.25
0.20
0.15
0.10
0.05
0
25 75
4412 G06
–25 0 50 100 125
2.5V ≤ V
IN
≤ 28V
I
GATE
= –10μA
I
GATE
= –5μA
I
GATE
= 0μA
TEMPERATURE (°C)
–50
TIME (μs)
120
110
100 25 75
4412 G07
–25 0 50 100 125
3.6V ≤ VIN ≤ 28V
CGATE = 1nF
TEMPERATURE (°C)
–50
TIME (μs)
13.5
13.0
12.5 25 75
4412 G08
–25 0 50 100 125
3.6V ≤ VIN ≤ 28V
CGATE = 1nF
TEMPERATURE (°C)
–50
CURRENT (μA)
10.5
10.0
9.5 25 75
4412 G09
–25 0 50 100 125
V
STAT
= V
IN
– 1.5V
V
IN
= 28V
V
IN
= 2.5V
5
LTC4412
4412fa
V
IN
(Pin 1): Primary Input Supply Voltage. Supplies power
to the internal circuitry and is one of two voltage sense
inputs to the internal analog controller (The other input to
the controller is the SENSE pin). This input is usually
supplied power from a battery or other power source
which supplies current to the load. This pin can be by-
passed to ground with a capacitor in the range of 0.1μF to
10μF if needed to suppress load transients.
GND (Pin 2): Ground. Provides a power return for all the
internal circuits.
CTL (Pin 3): Digital Control Input. A logical high input (V
IH
)
on this pin forces the gate to source voltage of the primary
P-channel MOSFET power switch to a small voltage (V
GOFF
).
This will turn the MOSFET off and no current will flow from
the primary power input at V
IN
if the MOSFET is configured
so that the drain to source diode does not forward bias. A
high input also forces the STAT pin to sink 10μA of current
(I
S(SNK)
). If the STAT pin is used to control an auxiliary P-
channel power switch, then a second active source of
power, such as an AC wall adaptor, will be connected to the
load (see Applications Information). An internal current
sink will pull the CTL pin voltage to ground (logical low) if
the pin is open.
UU
U
PI FU CTIO S
STAT (Pin 4): Open-Drain Output Status Pin. When the
SENSE pin is pulled above the V
IN
pin with an auxiliary
power source by about 20mV or more, the reverse turn-off
threshold (V
RTO
) is reached. The STAT pin will then go
from an open state to a 10μA current sink (I
S(SNK)
). The
STAT pin current sink can be used, along with an external
resistor, to turn on an auxiliary P-channel power switch
and/or signal the presence of an auxiliary power source to
a microcontroller.
GATE (Pin 5): Primary P-Channel MOSFET Power Switch
Gate Drive Pin. This pin is directed by the power controller
to maintain a forward regulation voltage (V
FR
) of 20mV
between the V
IN
and SENSE pins when an auxiliary power
source is not present. When an auxiliary power source is
connected, the GATE pin will pull up to the SENSE pin
voltage, turning off the primary P-channel power switch.
SENSE (Pin 6): Power Sense Input Pin. Supplies power to
the internal circuitry and is a voltage sense input to the
internal analog controller (The other input to the controller
is the V
IN
pin). This input is usually supplied power from
an auxiliary source such as an AC adapter or back-up
battery which also supplies current to the load.
BLOCK DIAGRA
W
–
+
1 6
SOURCE
POWER
VOLTAGE/CURRENT
REFERENCE
0.5V
POWER
LINEAR GATE
DRIVER AND
VOLTAGE CLAMP
A1
VIN SENSE
ANALOG CONTROLLER
–
+
C1
3
2
CTL
3.5μA
ON/OFF
10μA
*DRAIN-SOURCE DIODE OF MOSFET
STATUS
OUTPUT
4412 BD
ON/OFF
STAT
VCC
GATE
4
5
GND
OUTPUT
TO LOAD
SELECTOR
–
+
PRIMARY
SUPPLY
–
+
AUXILIARY
SUPPLY
–
+
6
LTC4412
4412fa
OPERATIO
U
Operation can best be understood by referring to the Block
Diagram, which illustrates the internal circuit blocks along
with the few external components, and the graph that
accompanies Figure 1. The terms primary and auxiliary are
arbitrary and may be changed to suit the application.
Operation begins when either or both power sources are
applied and the CTL control pin is below the input low
voltage of 0.35V (V
IL
). If only the primary supply is
present, the Power Source Selector will power the LTC4412
from the V
IN
pin. Amplifier A1 will deliver a current to the
Analog Controller block that is proportional to the voltage
difference in the V
IN
and SENSE pins. While the voltage on
SENSE is lower than V
IN
– 20mV (V
FR
), the Analog
Controller will instruct the Linear Gate Driver and Voltage
Clamp block to pull down the GATE pin voltage and turn on
the external P-channel MOSFET. The dynamic pull-down
current of 50μA (I
G(SNK)
) stops when the GATE voltage
reaches ground or the gate clamp voltage. The gate clamp
voltage is 7V (V
G(ON)
) below the higher of V
IN
or V
SENSE
.
As the SENSE voltage pulls up to V
IN
– 20mV, the LTC4412
will regulate the GATE voltage to maintain a 20mV differ-
ence between V
IN
and V
SENSE
which is also the V
DS
of the
MOSFET. The system is now in the forward regulation
mode and the load will be powered from the primary
supply. As the load current varies, the GATE voltage will be
controlled to maintain the 20mV difference. If the load
current exceeds the P-channel MOSFET’s ability to deliver
the current with a 20mV V
DS
the GATE voltage will clamp,
the MOSFET will behave as a fixed resistor and the forward
voltage will increase slightly. While the MOSFET is on the
STAT pin is an open circuit.
When an auxiliary supply is applied, the SENSE pin will be
pulled higher than the V
IN
pin through the external diode.
The Power Source Selector will power the LTC4412 from
the SENSE pin. As the SENSE voltage pulls above V
IN
–
20mV, the Analog Controller will instruct the Linear Gate
Driver and Voltage Clamp block to pull the GATE voltage up
to turn off the P-channel MOSFET. When the voltage on
SENSE is higher than V
IN
+ 20mV (V
RTO
),
the Analog
Controller will instruct the Linear Gate Driver and Voltage
Clamp block to rapidly pull the GATE pin voltage to the
SENSE pin voltage. This action will quickly finish turning
off the external P-channel MOSFET if it hasn’t already
turned completely off. For a clean transistion, the reverse
turn-off threshold has hysteresis to prevent uncertainty.
The system is now in the reverse turn-off mode. Power to
the load is being delivered through the external diode and
no current is drawn from the primary supply. The external
diode provides protection in case the auxiliary supply is
below the primary supply, sinks current to ground or is
connected reverse polarity. During the reverse turn-off
mode of operation the STAT pin will sink 10μA of current
(I
S(SNK)
) if connected. Note that the external MOSFET is
wired so that the drain to source diode will momentarily
forward bias when power is first applied to V
IN
and will
become reverse biased when an auxiliary supply is ap-
plied.
When the CTL (control) input is asserted high, the external
MOSFET will have its gate to source voltage forced to a
small voltage V
G(OFF)
and the STAT pin will sink 10μA of
current if connected. This feature is useful to allow control
input switching of the load between two power sources as
shown in Figure 4 or as a switchable high side driver as
shown in Figure 7. A 3.5μA internal pull- down current
(I
CTL
) on the CTL pin will insure a low level input if the pin
should become open.
7
LTC4412
4412fa
APPLICATIO S I FOR ATIO
WUUU
Introduction
The system designer will find the LTC4412 useful in a
variety of cost and space sensitive power control applica-
tions that include low loss diode OR’ing, fully automatic
switchover from a primary to an auxiliary source of power,
microcontroller controlled switchover from a primary to
an auxiliary source of power, load sharing between two or
more batteries, charging of multiple batteries from a
single charger and high side power switching.
External P-Channel MOSFET Transistor Selection
Important parameters for the selection of MOSFETs are
the maximum drain-source voltage V
DS(MAX),
threshold
voltage V
GS(VT)
and on-resistance R
DS(ON)
.
The maximum allowable drain-source voltage, V
DS(MAX),
must be high enough to withstand the maximum drain-
source voltage seen in the application.
The maximum gate drive voltage for the primary MOSFET
is set by the smaller of the V
IN
supply voltage or the internal
clamping voltage V
G(ON).
A logic level MOSFET is com-
monly used, but if a low supply voltage limits the gate
voltage, a sub-logic level threshold MOSFET should be
considered. The maximum gate drive voltage for the
auxiliary MOSFET, if used, is determined by the external
resistor connected to the STAT pin and the STAT pin sink
current.
As a general rule, select a MOSFET with a low enough
R
DS(ON)
to obtain the desired V
DS
while operating at full
load current and an achievable V
GS
. The MOSFET normally
operates in the linear region and acts like a voltage
controlled resistor. If the MOSFET is grossly undersized,
it can enter the saturation region and a large V
DS
may
result. However, the drain-source diode of the MOSFET, if
forward biased, will limit V
DS
. A large V
DS
, combined with
the load current, will likely result in excessively high
MOSFET power dissipation. Keep in mind that the LTC4412
will regulate the forward voltage drop across the primary
MOSFET at 20mV if R
DS(ON)
is low enough. The required
R
DS(ON)
can be calculated by dividing 0.02V by the load
current in amps. Achieving forward regulation will mini-
mize power loss and heat dissipation, but it is not a
necessity. If a forward voltage drop of more than 20mV is
acceptable then a smaller MOSFET can be used, but must
be sized compatible with the higher power dissipation.
Care should be taken to ensure that the power dissipated
is never allowed to rise above the manufacturer’s recom-
mended maximum level. The auxiliary MOSFET power
switch, if used, has similar considerations, but its V
GS
can
be tailored by resistor selection. When choosing the
resistor value consider the full range of STAT pin current
(I
S(SNK)
) that may flow through it.
V
IN
and SENSE Pin Bypass Capacitors
Many types of capacitors, ranging from 0.1μF to 10μF and
located close to the LTC4412, will provide adequate V
IN
bypassing if needed. Voltage droop can occur at the load
during a supply switchover because some time is required
to turn on the MOSFET power switch. Factors that deter-
mine the magnitude of the voltage droop include the
supply rise and fall times, the MOSFET’s characteristics,
the value of C
OUT
and the load current. Droop can be made
insignificant by the proper choice of C
OUT
,
since the droop
is inversely proportional to the capacitance. Bypass ca-
pacitance for the load also depends on the application’s
dynamic load requirements and typically ranges from 1μF
to 47μF. In all cases, the maximum droop is limited to the
drain source diode forward drop inside the MOSFET.
Caution must be exercised when using multilayer ceramic
capacitors. Because of the self resonance and high Q
characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions such as connecting a supply input to a hot
power source. To reduce the Q and prevent these tran-
sients from exceeding the LTC4412’s absolute maximum
voltage rating, the capacitor’s ESR can be increased by
adding up to several ohms of resistance in series with the
ceramic capacitor. Refer to Application Note 88.
The selected capacitance value and capacitor’s ESR can be
verified by observing V
IN
and SENSE for acceptable volt-
age transitions during dynamic conditions over the full
load current range. This should be checked with each
power source as well. Ringing may indicate an incorrect
bypass capacitor value and/or too low an ESR.
8
LTC4412
4412fa
V
IN
and SENSE Pin Usage
Since the analog controller’s thresholds are small (±20mV),
the V
IN
and SENSE pin connections should be made in a
way to avoid unwanted I • R drops in the power path. Both
pins are protected from negative voltages.
GATE Pin Usage
The GATE pin controls the external P-channel MOSFET
connected between the V
IN
and SENSE pins when the load
current is supplied by the power source at V
IN
. In this
mode of operation, the internal current source, which is
responsible for pulling the GATE pin up, is limited to a few
microamps (I
G(SRC)
). If external opposing leakage cur-
rents exceed this, the GATE pin voltage will reach the
clamp voltage (V
GON
) and V
DS
will be smaller. The internal
current sink, which is responsible for pulling the GATE pin
down, has a higher current capability (I
G(SNK)
). With an
auxiliary supply input pulling up on the SENSE pin and
exceeding the V
IN
pin voltage by 20mV (V
RTO
), the device
enters the reverse turn-off mode and a much stronger
current source is available to oppose external leakage
currents and turn off the MOSFET (V
GOFF
).
While in forward regulation, if the on resistance of the
MOSFET is too high to maintain forward regulation, the
GATE pin will maximize the MOSFET’s V
GS
to that of the
clamp voltage (V
GON
). The clamping action takes place
between the higher of V
IN
or V
SENSE
and the GATE pin.
Status Pin Usage
During normal operation, the open-drain STAT pin can be
biased at any voltage between ground and 28V regardless
of the supply voltage to the LTC4412. It is usually con-
nected to a resistor whose other end connects to a voltage
source. In the forward regulation mode, the STAT pin will
be open (I
S(OFF)
). When a wall adaptor input or other
auxiliary supply is connected to that input, and the voltage
on SENSE is higher than V
IN
+ 20mV (V
RTO
),
the system is
in the reverse turn-off mode. During this mode of opera-
tion the STAT pin will sink 10μA of current (I
S(SNK)
). This
will result in a voltage change across the resistor, depend-
ing on the resistance, which is useful to turn on an auxiliary
P-channel MOSFET or signal to a microcontroller that an
auxiliary power source is connected. External leakage
currents, if significant, should be accounted for when
determining the voltage across the resistor when the STAT
pin is either on or off.
Control Pin Usage
This is a digital control input pin with low threshold
voltages (V
IL,
V
IH
) for use with logic powered from as little
as 1V. During normal operation, the CTL pin can be biased
at any voltage between ground and 28V, regardless of the
supply voltage to the LTC4412. A logical high input on this
pin forces the gate to source voltage of the primary
P-channel MOSFET power switch to a small voltage (V
GOFF
).
This will turn the MOSFET off and no current will flow from
the primary power input at V
IN
if the MOSFET is configured
so that the drain to source diode is not forward biased. The
high input also forces the STAT pin to sink 10μA of current
(I
S(SNK)
). See the Typical Applications for various ex-
amples on using the STAT pin. A 3.5μA internal pull-down
current (I
CTL
) on the CTL pin will insure a logical low level
input if the pin should be open.
Protection
Most of the application circuits shown provide some
protection against supply faults such as shorted, low or
reversed supply inputs. The fault protection does not
protect shorted supplies but can isolate other supplies and
the load from faults. A necessary condition of this protec-
tion is for all components to have sufficient breakdown
voltages. In some cases, if protection of the auxiliary input
(sometimes referred to as the wall adapter input) is not
required, then the series diode or MOSFET may be elimi-
nated.
Internal protection for the LTC4412 is provided to prevent
damaging pin currents and excessive internal self heating
during a fault condition. These fault conditions can be a
result of any LTC4412 pins shorted to ground or to a power
source that is within the pin’s absolute maximum voltage
limits. Both the V
IN
and SENSE pins are capable of being
taken significantly below ground without current drain or
damage to the IC (see Absolute Maximum Voltage Limits).
This feature allows for reverse-battery condition without
current drain or damage. This internal protection is not
designed to prevent overcurrent or overheating of external
components.
APPLICATIO S I FOR ATIO
WUUU
9
LTC4412
4412fa
Automatic PowerPath Control
The applications shown in Figures 1, 2 and 3 are automatic
ideal diode controllers that require no assistance from a
microcontroller. Each of these will automatically connect
the higher supply voltage, after accounting for certain
diode forward voltage drops, to the load with application
of the higher supply voltage.
Figure 1 illustrates an application circuit for automatic
switchover of a load between a battery and a wall adapter
or other power input. With application of the battery, the
load will initially be pulled up by the drain-source diode of
the P-channel MOSFET. As the LTC4412 comes into
action, it will control the MOSFET’s gate to turn it on and
reduce the MOSFET’s voltage drop from a diode drop to
20mV. The system is now in the low loss forward regula-
tion mode. Should the wall adapter input be applied, the
Schottky diode will pull up the SENSE pin, connected to the
load, above the battery voltage and the LTC4412 will turn
the MOSFET off. The STAT pin will then sink current
indicating an auxiliary input is connected. The battery is
now supplying no load current and all the load current
flows through the Schottky diode. A silicon diode could be
used instead of the Schottky, but will result in higher
power dissipation and heating due to the higher forward
voltage drop.
Figure 2 illustrates an application circuit for automatic
switchover of load between a battery and a wall adapter
that features lowest power loss. Operation is similar to
Figure 1 except that an auxiliary P-channel MOSFET
replaces the diode. The STAT pin is used to turn on the
MOSFET once the SENSE pin voltage exceeds the battery
voltage by 20mV. When the wall adapter input is applied,
the drain-source diode of the auxiliary MOSFET will turn
on first to pull up the SENSE pin and turn off the primary
MOSFET followed by turning on of the auxiliary MOSFET.
Once the auxiliary MOSFET has turned on the voltage drop
across it can be very low depending on the MOSFET’s
characteristics.
Figure 3 illustrates an application circuit for the automatic
switchover of a load between a battery and a wall adapter
in the comparator mode. It also shows how a battery
charger can be connected. This circuit differs from Figure
1 in the way the SENSE pin is connected. The SENSE pin
is connected directly to the auxiliary power input and not
the load. This change forces the LTC4412’s control cir-
cuitry to operate in an open-loop comparator mode. While
the battery supplies the system, the GATE pin voltage will
be forced to its lowest clamped potential, instead of being
regulated to maintain a 20mV drop across the MOSFET.
This has the advantages of minimizing power loss in the
MOSFET by minimizing its R
ON
and not having the influ-
ence of a linear control loop’s dynamics. A possible
disadvantage is if the auxiliary input ramps up slow
enough the load voltage will initially droop before rising.
TYPICAL APPLICATIO S
U
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
PRIMARY
P-CHANNEL
MOSFET
C
OUT
TO LOAD
STATUS OUTPUT
DROPS WHEN A
WALL ADAPTER
IS PRESENT
470k
4412 F02
BATTERY
CELL(S)
WALL
ADAPTER
INPUT
*
*
AUXILIARY
P-CHANNEL
MOSFET
*DRAIN-SOURCE DIODE OF MOSFET
Figure 2. Automatic Switchover of Load Between a Battery and a
Wall Adapter with Auxiliary P-Channel MOSFET for Lowest Loss
VIN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
BATTERY
CHARGER
P-CHANNEL
MOSFET
COUT
TO LOAD
STATUS OUTPUT
IS LOW WHEN A
WALL ADAPTER
IS PRESENT
470k
*DRAIN-SOURCE DIODE OF MOSFET
4412 F03
VCC
BATTERY
CELL(S)
*
WALL
ADAPTER
INPUT
Figure 3. Automatic Switchover of Load Between
a Battery and a Wall Adapter in Comparator Mode
10
LTC4412
4412fa
TYPICAL APPLICATIO S
U
This is due to the SENSE pin voltage rising above the
battery voltage and turning off the MOSFET before the
Schottky diode turns on. The factors that determine the
magnitude of the voltage droop are the auxiliary input rise
time, the type of diode used, the value of C
OUT
and the load
current.
Ideal Diode Control with a Microcontroller
Figure 4 illustrates an application circuit for microcon-
troller monitoring and control of two power sources. The
microcontroller’s analog inputs, perhaps with the aid of
a resistor voltage divider, monitors each supply input and
commands the LTC4412 through the CTL input. Back-to-
back MOSFETs are used so that the drain-source diode
will not power the load when the MOSFET is turned off
(dual MOSFETs in one package are commercially avail-
able).
With a logical low input on the CTL pin, the primary input
supplies power to the load regardless of the auxiliary
voltage. When CTL is switched high, the auxiliary input
will power the load whether or not it is higher or lower
than the primary power voltage. Once the auxiliary is on,
the primary power can be removed and the auxiliary will
continue to power the load. Only when the primary
voltage is higher than the auxiliary voltage will taking CTL
low switch back to the primary power, otherwise the
auxiliary stays connected. When the primary power is
disconnected and V
IN
falls below V
LOAD
, it will turn on the
auxiliary MOSFET if CTL is low, but V
LOAD
must stay up
long enough for the MOSFET to turn on. At a minimum,
C
OUT
capacitance must be sized to hold up V
LOAD
until the
transistion between the sets of MOSFETs is complete.
Sufficient capacitance on the load and low or no capaci-
tance on V
IN
will help ensure this. If desired, this can be
avoided by use of a capacitor on V
IN
to ensure that V
IN
falls more slowly than V
LOAD
.
Load Sharing
Figure 5 illustrates an application circuit for dual battery
load sharing with automatic switchover of load from
batteries to wall adapter. Whichever battery can supply the
higher voltage will provide the load current until it is
discharged to the voltage of the other battery. The load will
then be shared between the two batteries according to the
capacity of each battery. The higher capacity battery will
provide proportionally higher current to the load. When a
wall adapter input is applied, both MOSFETs will turn off
and no load current will be drawn from the batteries. The
STAT pins provide information as to which input is supply-
ing the load current. This concept can be expanded to
more power inputs.
VIN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412 COUT
TO LOAD
STATUS IS HIGH
WHEN BAT1 IS
SUPPLYING
LOAD CURRENT
WHEN BOTH STATUS LINES ARE
HIGH, THEN BOTH BATTERIES ARE
SUPPLYING LOAD CURRENTS. WHEN
BOTH STATUS LINES ARE LOW THEN
WALL ADAPTER IS PRESENT
STATUS IS HIGH
WHEN BAT2 IS
SUPPLYING
LOAD CURRENT
470k
4412 F05
VCC
BAT1
WALL
ADAPTER
INPUT
VIN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
470k
VCC
BAT2
*
*
*DRAIN-SOURCE DIODE OF MOSFET
Figure 5. Dual Battery Load Sharing with Automatic
Switchover of Load from Batteries to Wall Adapter
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
*DRAIN-SOURCE DIODE OF MOSFET
PRIMARY
P-CHANNEL MOSFETS
C
OUT
TO LOAD
4412 F04
AUXILIARY POWER
SOURCE INPUT
*
*
*
*
PRIMARY
POWER
SOURCE INPUT
AUXILIARY
P-CHANNEL MOSFETS
470k
MICROCONTROLLER
0.1μF
Figure 4. Microcontroller Monitoring and Control
of Two Power Sources
11
LTC4412
4412fa
Multiple Battery Charging
Figure 6 illustrates an application circuit for automatic
dual battery charging from a single charger. Whichever
battery has the lower voltage will receive the charging
current until both battery voltages are equal, then both will
be charged. When both are charged simultaneously, the
higher capacity battery will get proportionally higher cur-
rent from the charger. For Li-Ion batteries, both batteries
will achieve the float voltage minus the forward regulation
voltage of 20mV. This concept can apply to more than two
batteries. The STAT pins provide information as to which
batteries are being charged. For intelligent control, the
CTL pin input can be used with a microcontroller and
back-to-back MOSFETs as shown in Figure 4. This allows
complete control for disconnection of the charger from
either battery.
TYPICAL APPLICATIO S
U
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
P-CHANNEL
MOSFET
SUPPLY
INPUT
LOGIC
INPUT
C
OUT
*
TO LOAD
4412 F07
*DRAIN-SOURCE DIODE OF MOSFET
0.1μF
Figure 7. Logic Controlled High Side Power Switch
High Side Power Switch
Figure 7 illustrates an application circuit for a logic con-
trolled high side power switch. When the CTL pin is a
logical low, the LTC4412 will turn on the MOSFET. Be-
cause the SENSE pin is grounded, the LTC4412 will apply
maximum clamped gate drive voltage to the MOSFET.
When the CTL pin is a logical high, the LTC4412 will turn
off the MOSFET by pulling its gate voltage up to the supply
input voltage and thus deny power to the load. The
MOSFET is connected with its source connected to the
power source. This disables the drain-source diode from
supplying voltage to the load when the MOSFET is off. Note
that if the load is powered from another source, then the
drain-source diode can forward bias and deliver current to
the power supply connected to the V
IN
pin.
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
TO LOAD OR
PowerPath
CONTROLLER
TO LOAD OR
PowerPath
CONTROLLER
STATUS IS HIGH
WHEN BAT1 IS
CHARGING
STATUS IS HIGH
WHEN BAT2 IS
CHARGING
470k
4412 F06
V
CC
*
*
BAT1
BATTERY
CHARGER
INPUT
470k
V
CC
BAT2
V
IN
GND
CTL
SENSE
GATE
STAT
1
2
3
6
5
4
LTC4412
*DRAIN-SOURCE DIODE OF MOSFET
0.1μF
Figure 6. Automatic Dual Battery Charging
from Single Charging Source
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12
LTC4412
4412fa
PART NUMBER DESCRIPTION COMMENTS
LTC1473 Dual PowerPath Switch Driver Switches and Isolates Sources Up to 30V
LTC1479 PowerPath Controller for Dual Battery Systems Complete PowerPath Management for Two Batteries; DC Power Source,
Charger and Backup
LTC1558/LTC1559 Back-Up Battery Controller with Programmable Output Adjustable Backup Voltage from 1.2V NiCd Button Cell,
Includes Boost Converter
LT®1579 300mA Dual Input Smart Battery Back-Up Regulator Maintains Output Regulation with Dual Inputs, 0.4V Dropout at 300mA
LTC1733/LTC1734 Monolithic Linear Li-Ion Chargers Thermal Regulation, No External MOSFET/Sense Resistor
LTC1960 Dual Battery Charger Selector with SPI Complete Dual Battery Charger/Selector System, 36-Lead SSOP
LTC1998 2.5μA, 1% Accurate Programmable Battery Detector Adjustable Trip Voltage/Hysteresis, ThinSOT
LTC4350 Hot Swappable Load Share Controller Allows N + 1 Redundant Supply, Equally Loads Multiple Power Supplies
Connected in Parallel
LTC4410 USB Power Manager in ThinSOT Enables Simultaneous Battery Charging and
Operation of USB Component Peripheral Devices
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2002
LT 0607 • PRINTED IN USA
RELATED PARTS
U
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302 REV B
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
