1/12April 2001
■HIGH SPE ED:
fMAX = 300MHz (TYP.) at VCC = 5V
■LOW POWER DISSIPATION:
ICC = 2µA(MAX.) at TA=25°C
■HIGH NOISE IMMUNIT Y:
VNIH = VNIL = 28 % VCC (MIN.)
■50Ω TRANSMISSION LINE DRIVING
CAPABILITY
■SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24m A (MIN)
■BALANCED PROPAGATI ON DELAYS:
tPLH ≅ tPHL
■OPERATIN G VOLTAGE RANGE:
VCC (O PR) = 2V to 6V
■PIN AND FUNCTION COMPAT IBLE WITH
74 SERIES 74
■IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C2MO S tecn ology.
A signal on the D INPUT is transferred to the Q
and Q OUTPUTS during the positive going
transition of the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
All inputs and outputs are equipped with
protection circuits aga inst static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP 74AC74B
SOP 74AC74M 74AC74MTR
TSSOP 74AC74TTR
TSSOPDIP SOP
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INPUT AND OUT PUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don’t Care
LOGIC DIAGRAM
Th i s l ogic dia gram has not be used to estimat e propagation del ays
PIN No SYMBOL NAME AND FUNCTION
1, 13 1CLR, 2CLR Asynchronous Reset -
Direct Input
2, 12 1D, 2D Data Inputs
3, 11 1CK, 2CK Clock Input
(LOW to HIGH, Edge
Triggered)
4, 10 1PR, 2PR Asynchronous Set - Direct
Input
5, 9 1Q, 2Q True Flip-Flop Outputs
6, 8 1Q, 2Q Complement Flip-Flop
Outputs
7 GND Ground (0V)
14 VCC Positive Supply Voltage
INPUTS OUTPUTS FUNCTION
CLR PR DCKQ Q
L H X X L H CLEAR
H L X X H L PRESET
LLXXHH
HHL LH
HHH HL
HHX Q
nQ
nNO CHANGE
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ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are t hose v alues beyond which damage to the device may occ ur. Functional operation under these conditions is
not implie d .
RECOMMENDE D OPERATING CONDITIONS
1) VIN from 30% to 70% of VCC
Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VIDC Input Voltage -0.5 to VCC + 0.5 V
VODC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IODC Output Current ± 50 mA
ICC or IGND DC VCC or Ground Curre nt ± 200 mA
Tstg Storage Temperature -65 to +150 °C
TLLead Temperature (10 sec) 300 °C
Symbol Parameter Value Unit
VCC Supply Voltage 2 to 6 V
VIInput Voltage 0 to VCC V
VOOutput Voltage 0 to VCC V
Top Operating Temperature -55 to 125 °C
dt/dv Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5V (note 1) 8 ns/V
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DC SPE CIFI CATI ONS
1) M aximum test du rat i on 2ms, one output loaded at time
2 ) I nciden t wave sw i tc hi ng is gu aranteed on tran sm i ssion l i nes with impedances a s l ow as 50Ω
Symbol Parameter
Test Condition Value
Unit
VCC
(V)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input
Voltage 3.0 VO = 0.1 V or
VCC-0.1V
2.1 1.5 2.1 2.1 V4.5 3.15 2.25 3.15 3.15
5.5 3.85 2.75 3.85 3.85
VIL Low Level Input
Voltage 3.0 VO = 0.1 V or
VCC-0.1V
1.5 0.9 0.9 0.9 V4.5 2.25 1.35 1.35 1.35
5.5 2.75 1.65 1.65 1.65
VOH High Level Output
Voltage 3.0 IO=-50 µA2.9 2.99 2.9 2.9
V
4.5 IO=-50 µA4.4 4.49 4.4 4.4
5.5 IO=-50 µA5.4 5.49 5.4 5.4
3.0 IO=-12 mA 2.56 2.46 2.4
4.5 IO=-24 mA 3.86 3.76 3.7
5.5 IO=-24 mA 4.86 4.76 4.7
VOL Low Level Output
Voltage 3.0 IO=50 µA0.002 0.1 0.1 0.1
V
4.5 IO=50 µA0.001 0.1 0.1 0.1
5.5 IO=50 µA0.001 0.1 0.1 0.1
3.0 IO=12 mA 0.36 0.44 0.5
4.5 IO=24 mA 0.36 0.44 0.5
5.5 IO=24 mA 0.36 0.44 0.5
IIInput Leakage
Current 5.5 VI = VCC or GND ± 0.1 ± 1 ± 1 µA
ICC Quiescent Supply
Current 5.5 VI = VCC or GND 22040µA
I
OLD Dynamic Output
Current (note 1, 2) 5.5 VOLD = 1.65 V max 75 50 mA
IOHD VOHD = 3.85 V min -75 -50 mA
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AC EL ECTRI CAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Inp u t tr = tf = 3ns)
(*) Vo l tage range i s 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACT ERISTICS
1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated f rom the operating current consumption without
lo ad. (Ref er to Test Circ ui t ). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per
Flip-Flop)
Symbol Parameter
Test Condition Value
Unit
VCC
(V)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
tPLH tPHL Propagation Delay
Time CK to Q or Q 3.3(*) 7.0 14.0 16.0 17.5 ns
5.0(**) 5.0 10.0 10.5 12.0
tPLH tPHL Propagation Delay
Time PR or CLR to
Q or Q
3.3(*) 6.0 12.0 13.5 14.0 ns
5.0(**) 4.5 9.5 10.5 10.5
tWPulse Width HIGH
or LOW, CK or PR
or CLR
3.3(*) 5.0 1.5 7.0 7.0 ns
5.0(**) 4.0 1.5 5.0 5.0
tsSetup Time D to CK
HIGH or LOW 3.3(*) 4.0 -0.2 4.0 4.0 ns
5.0(**) 3.0 -0.2 3.0 3.0
thHold Time D to CK
HIGH or LOW 3.3(*) 2.0 0.2 3.0 3.0 ns
5.0(**) 2.0 0.2 3.0 3.0
tREM Removal Time
PR or CLR to CK 3.3(*) 1.0 -1.0 1.0 1.0 ns
5.0(**) 1.0 -0.7 1.0 1.0
fMAX Maximum Clock
Frequency 3.3(*) 100 300 90 90 MHz
5.0(**) 140 300 130 130
Symbol Parameter
Test Condition Value
Unit
VCC
(V)
TA = 25°C -40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 5.0 3 pF
CPD Power Dissipation
Capacitance
(note 1)
5.0 fIN = 10MHz 35 pF
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TEST CIRCUIT
CL = 50p F or equiva l ent (i nclud es jig and probe ca pacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse ge nerator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES, CLOCK PULSE WIDTHS
(f=1MHz; 50% duty cycle)
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WAVEFORM 2: PROPAGATION DELAYS, RESET AND SET PULSE WIDTHS (f=1MHz; 50% duty
cycle)
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WAVEFOR M 3: RECO VER Y TIMES (f= 1 MHz; 50% duty cycle)
WAVEFORM 4: PULSE WIDTH
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DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 1.39 1.65 0.055 0.065
b0.5 0.020
b1 0.25 0.010
D200.787
E8.5 0.335
e2.54 0.100
e3 15.24 0.600
F7.10.280
I5.10.201
L3.3 0.130
Z 1.27 2.54 0.050 0.100
P001A
Plastic DIP-14 MECHANICAL DATA
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DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A1.750.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C0.5 0.019
c1 45 (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M0.680.026
S8 (max.)
P013G
SO-14 MECHANICAL DATA
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DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A1.10.433
A1 0.05 0.10 0.15 0.002 0.004 0.006
A2 0.85 0.9 0.95 0.335 0.354 0.374
b 0.19 0.30 0.0075 0.0118
c 0.09 0.20 0.0035 0.0079
D 4.9 5 5.1 0.193 0.197 0.201
E 6.25 6.4 6.5 0.246 0.252 0.256
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.02 56 BSC
K0
o4
o8
o0
o4
o8
o
L 0.50 0.60 0.70 0.020 0.024 0.028
cE
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1 L
K
e
TSSOP14 MECHANICAL DATA
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conseque nces of use of such i nformation nor for any infringement of patents or ot her rights of third parties which may result from
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