1
FEATURES APPLICATIONS
DESCRIPTION
R(BIAS)
IF(OUT)
L(COL)
C(BLK)
IF(IN)
C(BYP)
VS
6 5 4
1 2 3
C(BLK)
VS
THS9000
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
50 MHz to 400 MHz CASCADEABLE AMPLIFIER
•IF Amplifiers23
•High Dynamic Range
– TDMA: GSM, IS-136, EDGE/UWE-136– OIP
3
= 36 dBm
– CDMA: IS-95, UMTS, CDMA2000– NF < 4.5 dB
– Wireless Local Loops•Single-Supply Voltage
– Wireless LAN: IEEE802.11•High Speed
– V
S
= 3 V to 5 V– I
S
= Adjustable•Input/Output Impedance– 50 Ω
The THS9000 is a medium power, cascadeable, gain block optimized for high IF frequencies. The amplifierincorporates internal impedance matching to 50 Ω. The part mounted on the standard EVM achieves greaterthan 15-dB input and output return loss from 50 MHz to 325 MHz with V
S
= 5 V, R
(BIAS)
= 237 Ω, L
(COL)
= 470 nH.Design requires only two dc-blocking capacitors, one power-supply bypass capacitor, one RF choke, and onebias resistor.
FUNCTIONAL BLOCK DIAGRAM
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments Incorporated.3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICE
(1)
PACKAGE TYPE TRANSPORT MEDIA, QUANTITY
THS9000DRWT Tape and Reel, 2502 × 2 QFN
(2)THS9000DRWR Tape and Reel, 3000
(1) For the most current package and ordering information, see the Package Option Addendum at the endof this document, or see the TI Web site at www.ti.com .(2) The PowerPAD™ is electrically isolated from all other pins.
Over operating free-air temperature (unless otherwise noted)
(1)
THS9000 UNIT
Supply voltage, GND to V
S
5.5 VInput voltage GND to V
S
Continuous power dissipation See Dissipation Rating tableMaximum junction temperature, T
J
+150 ° CMaximum junction temperature, continuous operation, long term reliability, ° C+125T
J
(2)
Storage temperature, T
stg
– 65 to +150 ° CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds +300 ° CHBM 2000 VESD Ratings: CDM 1500 VMM 100 V
(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings maycause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These arestress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature mayresult in reduced reliability and/or lifetime of the device.
POWER RATING
(1)θ
JAPACKAGE
( ° C/W)
T
A
≤+25 ° C T
A
= +85 ° C
DRW
(2) (3)
91 1.1 W 440 mW
(1) Power rating is determined with a junction temperature of +125 ° C. Thermal management of the final PCB should strive to keep thejunction temperature at or below +125 ° C for best performance.(2) This data was taken using the JEDEC standard High-K test PCB.(3) The THS9000 incorporates a PowerPAD on the underside of the chip. This acts as a heatsink and must be connected to a thermallydissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature, which couldpermanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPADthermally-enhanced package.
MIN NOM MAX UNIT
Supply voltage 2.7 5 VOperating free-air temperature, T
A
– 40 +85 ° CSupply current 100 mA
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ELECTRICAL CHARACTERISTICS
1
2
3
VS
IF(IN)
GND
BIAS
L(COL)
IF(OUT)
6
5
4
VSL(COL)
IF(OUT)
GND
BIAS
IF(IN)
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
Typical Performance (V
S
= 5 V, R
(BIAS)
= 237 Ω, L
(COL)
= 470 nH) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
f = 50 MHz 15.9Gain dBf = 350 MHz 15.6f = 50 MHz 36OIP
3
dBmf = 350 MHz 35f = 50 MHz 20.81-dB compression dBmf = 350 MHz 20.6f = 50 MHz 15Input return loss dBf = 350 MHz 19.7f = 50 MHz 17.2Output return loss dBf = 350 MHz 15.1f = 50 MHz 21Reverse isolation dBf = 350 MHz 20f = 50 MHz 3.6Noise figure dBf = 350 MHz 4
PIN ASSIGNMENT
Terminal Functions
PIN NUMBERS NAME DESCRIPTION
1 IF
(IN)
Signal input2 GND Negative power-supply input3 BIAS Bias current adjustment input4 IF
(OUT)
Signal output5 L
(COL)
Output transistor load inductor6 V
S
Positive power-supply input
SIMPLIFIED SCHEMATIC
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TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
−20
−15
−10
−5
0
1 M 10 M 100 M 1 G
S22 − dB
f − Frequency − Hz
L(COL) = 470 nH
L(COL) = 330 nH
L(COL) = 68 nH
L(COL) = 220 nH
VS = 5 V,
R(BIAS) = 237W,
L(COL) = 100 nH
10
11
12
13
14
15
16
17
1 M 10 M 100 M 1 G
S21 − dB
f − Frequency − Hz
L(COL) = 330 nH
L(COL) = 470 nHL(COL) = 220 nH
L(COL) = 100 nH
L(COL) = 68 nH
VS = 5 V,
R(BIAS) = 237W,
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
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FIGURE
S21 Frequency response 1S22 Frequency response 2S11 Frequency response 3S12 Frequency response 4S21 vs R
(Bias)
5Output power vs Input power 6OIP
2
vs Frequency 7Noise figure vs Frequency 8OIP
3
vs Frequency 9I
S
Supply current vs R
(Bias)
10S21 Frequency response 11S22 Frequency response 12S11 Frequency response 13S12 Frequency response 14Noise figure vs Frequency 15OIP
2
vs Frequency 16Output power vs Input power 17OIP
3
vs Frequency 18
S-Parameters of THS9000 as mounted on the EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, and L
(COL)
= 68 nH to 470 nHat room temperature.
S21 FREQUENCY RESPONSE S22 FREQUENCY RESPONSE
Figure 1. Figure 2.
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−45
−40
−35
−30
−25
−20
−15
−10
−5
0
1 M 10 M 100 M 1 G
S11 − dB
f − Frequency − Hz
L(COL) = 68 nH
VS = 5 V,
R(BIAS) = 237W,
L(COL) = 470 nH
L(COL) = 330 nH
L(COL) = 220 nH
L(COL) = 100 nH
−40
−35
−30
−25
−20
−15
1 M 10 M 100 M 1 G
S12 − dB
f − Frequency − Hz
L(COL) = 68 nH
VS = 5 V,
R(BIAS) = 237W,
L(COL) = 470 nH
L(COL) = 330 nH
L(COL) = 100 nH
L(COL) = 220 nH
10
11
12
13
14
15
16
17
1 M 10 M 100 M 1 G
S21 − dB
f − Frequency − Hz
VS = 3 to 5 V,
R(BIAS) = Various,
L(COL) = 470 nH
R(BIAS) = 56.2 W,
VS = 3 V
R(BIAS) = 97.7W,
VS = 3 V
R(BIAS) = 174 W, VS = 3 V
R(BIAS) = 237 W,
VS = 5 V
R(BIAS) = 549 W, VS = 5 V
R(BIAS) = 340 W,
VS = 5 V
10
11
12
13
14
15
16
17
18
19
20
21
22
−6 −4 −2 0 2 4 6 8 10 12
PI − Input Power − dBm
VS = 5 V, IS = 97 mA
VS = 5 V, IS = 71 mA
VS = 3 V, IS = 69 mA
VS = 3 V, IS = 49 mA
PO− Output Power − dBm
VS = 3 V, IS = 91 mA
14
VS = 5 V, IS = 48 mA
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
S11 FREQUENCY RESPONSE S12 FREQUENCY RESPONSE
Figure 3. Figure 4.
S-Parameters of THS9000 as mounted on the EVM with V
S
= 3 V and 5 V, R
(BIAS)
= various, and L
(COL)
= 470 nHat room temp.
S21 OUTPUT POWERvs vsR
(BIAS)
INPUT POWER
Figure 5. Figure 6.
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34
36
38
40
42
44
46
48
50
0 50 100 200 250 300
OIP2− dBm
f − Frequency − MHz
VS = 5 V, IS = 71 mA
VS = 3 V,
IS = 91 mA
VS = 3 V, IS = 49 mA
VS = 5 V, IS = 48 mA
VS = 3 V,
IS = 69 mA
VS = 5 V,
IS = 97 mA
150
24
26
28
30
32
34
36
38
40
0100 200 300 400 500
VS = 5 V, IS = 48 mA
VS = 3 V, IS = 69 mA
OIP3− dBm
f − Frequency − MHz
VS = 5 V, IS = 97 mA
VS = 5 V, IS = 71 mA
VS = 3 V, IS = 91 mA
VS = 3 V, IS = 49 mA
20
40
60
80
100
120
140
160
180
200
50 150 250 350 450 550
I − Supply Current − mA
S
R(BIAS) − W
VS = 5 V
VS = 3 V
THS9000
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OIP
2
NOISE FIGUREvs vsFREQUENCY FREQUENCY
Figure 7. Figure 8.
OIP
3
SUPPLY CURRENTvs vsFREQUENCY R
(BIAS)
Figure 9. Figure 10.
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−20
−15
−10
−5
0
1 M 10 M 100 M 1 G
S22 − dB
f − Frequency − Hz
TA = 255C
TA = 855C
TA = −455C
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
10
11
12
13
14
15
16
17
1 M 10 M 100 M 1 G
TA = 255C
f − Frequency − Hz
TA = 855C
VS = 5 V,
R(BIAS) = 327 W,
L(COL) = 470 nH
S21 − S-Parameters − dB
TA = −455C
−40
−35
−30
−25
−20
−15
1 M 10 M 100 M 1 G
S12 − dB
f − Frequency − Hz
TA = 255C
TA = 855C
TA = −455C
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
−45
−40
−35
−30
−25
−20
−15
−10
−5
0
1 M 10 M 100 M 1 G
S11 − dB
f − Frequency − Hz
TA = 855C
TA = −455C
TA = 255C
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
THS9000 as mounted on the EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, and L
(COL)
= 470 nH at +40 ° C, +25 ° C, and+85 ° C.
S21 FREQUENCY RESPONSE S22 FREQUENCY RESPONSE
Figure 11. Figure 12.
S11 FREQUENCY RESPONSE S12 FREQUENCY RESPONSE
Figure 13. Figure 14.
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3
4
5
6
0 100 200 300 400 500
TA = 855C
TA = −455C
Noise Figure − dB
f − Frequency − MHz
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
3.5
4.5
5.5
TA = 255C
40
41
42
43
44
45
46
47
48
49
50
50 100 150 200 250 300
TA = 855C
TA = 255C
TA = −455C
OIP2− dBm
f − Frequency − MHz
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
32
33
34
35
36
37
38
39
40
50 100 150 200 250 300 350 400 450 500
TA = 255C
TA = 855C
OIP3− dBm
f − Frequency − MHz
TA = −455C
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
14
16
18
20
22
−2 0 2 4 6 8 10 12
TA = −455C
PI − Input Power − dBm
PO− Output Power − dBm
TA = 255C
TA = 855C
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
f = 100 MHz
15
17
19
21
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
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NOISE FIGURE OIP
2vs vsFREQUENCY FREQUENCY
Figure 15. Figure 16.
OUTPUT POWER OIP
3vs vsINPUT POWER FREQUENCY
Figure 17. Figure 18.
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TYPICAL CHARACTERISTICS
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
S-Parameters Tables of THS9000 with EVM De-Embedded
V
S
= 5 V, R
(BIAS)
= 237 Ω, L
(COL)
= 470 nH
S21 S11 S22 S12
FREQUENCY GAIN (dB) PHASE ( ° ) GAIN (dB) PHASE ( ° ) GAIN (dB) PHASE ( ° ) GAIN (dB) PHASE ( ° )(MHz)
1.0 – 4.2 – 169.5 – 2.4 – 0.9 – 1.9 158.1 – 63.1 167.05.0 11.3 – 124.5 – 1.5 – 14.5 – 2.6 138.0 – 32.9 122.410.2 15.8 – 147.8 – 2.2 – 42.3 – 5.0 101.0 – 24.0 80.419.7 16.4 – 169.4 – 6.5 – 69.7 – 10.5 66.6 – 21.3 41.650.1 16.0 177.2 – 15.6 – 91.4 – 16.7 30.1 – 20.7 14.469.7 15.9 173.5 – 19.8 – 97.7 – 17.8 17.7 – 20.7 9.1102.4 15.9 168.4 – 26.9 – 102.6 – 18.2 4.3 – 20.7 4.4150.5 15.8 162.0 – 39.0 14.1 – 18.1 – 8.6 – 20.7 – 0.7198.1 15.7 155.8 – 27.6 50.8 – 17.4 – 19.6 – 20.7 – 1.7246.9 15.7 149.6 – 23.7 40.6 – 16.4 – 26.7 – 20.7 – 3.5307.6 15.6 141.9 – 19.8 33.1 – 14.9 – 37.2 – 20.6 – 5.7362.8 15.6 134.7 – 17.3 24.7 – 13.3 – 44.3 – 20.4 – 7.7405.0 15.6 129.2 – 15.5 20.3 – 12.1 – 51.0 – 20.2 – 10.0452.2 15.6 122.3 – 13.8 14.7 – 10.6 – 58.1 – 19.9 – 12.5504.7 15.5 114.9 – 11.8 6.3 – 9.0 – 66.5 – 19.7 – 16.2563.4 15.4 105.8 – 9.7 – 2.9 – 7.2 – 77.5 – 19.4 – 22.4595.3 15.3 100.5 – 8.6 – 9.1 – 6.3 – 83.6 – 19.3 – 26.2664.5 14.9 88.7 – 6.3 – 24.2 – 4.4 – 99.7 – 19.3 – 36.7702.1 14.6 81.0 – 5.3 – 33.2 – 3.7 – 109.2 – 19.6 – 43.4741.8 14.1 76.3 – 4.4 – 42.9 – 3.0 – 118.8 – 19.9 – 50.2828.1 12.7 60.2 – 2.9 – 65.5 – 2.3 – 142.8 – 21.7 – 69.2874.9 11.2 51.0 – 2.5 – 77.9 – 2.5 – 155.0 – 23.6 – 75.0924.4 10.1 50.2 – 2.4 – 90.4 – 3.1 – 166.0 – 25.8 – 85.2976.7 8.8 51.8 – 2.5 – – 100.7 – 4.3 – 173.7 – 28.4 – 78.91031.9 9.2 58.2 – 2.6 – 108.7 – 4.7 – 175.2 – 29.7 – 68.71090.3 8.9 48.0 – 2.5 – 115.2 – 4.4 – 164.7 – 31.4 – 69.11151.9 8.8 39.9 – 2.3 – 123.3 – 3.5 – 175.4 – 33.6 – 83.41217.1 8.0 27.7 – 2.1 – 132.0 – 3.0 175.3 – 38.2 – 81.41285.9 7.0 30.5 – 2.0 – 140.7 – 2.8 168.7 – 42.3 – 25.51358.6 5.6 20.6 – 1.9 – 149.4 – 2.9 159.1 – 42.2 41.61435.5 4.3 19.5 – 1.8 – 159.4 – 3.0 151.3 – 38.7 63.31516.6 3.4 17.7 – 1.9 – 168.3 – 3.2 144.7 – 33.6 62.41602.4 2.8 16.5 – 2.0 – 177.2 – 3.5 138.2 – 30.5 59.61693.0 2.2 8.6 – 2.1 174.0 – 3.8 131.4 – 28.1 56.21788.8 1.4 – 0.7 – 2.2 165.4 – 4.1 124.6 – 26.2 50.41889.9 0.5 – 4.1 – 2.3 157.0 – 4.5 118.2 – 24.7 42.41996.8 – 0.6 – 4.5 – 2.6 150.0 – 4.9 111.2 – 24.2 39.5
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APPLICATION INFORMATION
10
11
12
13
14
15
16
1 M 10 M 100 M 1 G −30
−25
−20
−15
−10
−5
0
5
S21 − dB
f − Frequency − Hz
S21
S22
S12
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 68 nH
S11, S12, S22 − dB
S11
10
11
12
13
14
15
16
17
1 M 10 M 100 M 1 G −30
−25
−20
−15
−10
−5
0
5
S12
f − Frequency − Hz
S21
S11
S22
VS = 5 V,
R(BIAS) = 237 W,
L(COL) = 470 nH
S21 − dB
S11, S12, S22 − dB
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
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The THS9000 is a medium power, cascadeable, amplifier optimized for high intermediate frequencies in radios.The amplifier is unconditionally stable and the design requires only two dc-blocking capacitors, one power-supplybypass capacitor, one RF choke, and one bias resistor. Refer to Figure 25 for the circuit diagram.
The THS9000 operates with a power-supply voltage ranging from 2.5 V to 5.5 V.
The value of R
(BIAS)
sets the bias current to the amplifier. Refer to Figure 10 . This allows the designer to trade-offlinearity versus power consumption. R
(BIAS)
can be removed without damage to the device.
Component selection of C
(BYP)
, C
IN
, and C
OUT
is not critical. The values shown in Figure 25 were used for all thedata shown in this data sheet.
The amplifier incorporates internal impedance matching to 50 Ωthat can be adjusted for various frequencies ofoperation by proper selection of L
(COL)
.
Figure 19 shows the s-parameters of the part mounted on the standard EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, andL
(COL)
= 470 nH. With this configuration, the part is very broadband, and achieves greater than 15-dB input andoutput return loss from 50 MHz to 325 MHz.
Figure 20 shows the S-parameters of the part mounted on the standard EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, andL
(COL)
= 68 nH. With this configuration, the part achieves greater than 15-dB input and output return loss from250 MHz to 400 MHz.
Figure 19. S-Parameters of THS9000 mounted on the Figure 20. S-Parameters of THS9000 mounted on thestandard EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, standard EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω,and L
(COL)
= 470 nH and L
(COL)
= 68 nH
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THS9000
LNA 2 Mixer IF SAW PGA
IF Amp 2
LNA 1 ADC
RX LO LO Drive
Amp 2
LO Drive
Amp 1
IF SAW
2x for Diversity
900 MHz − 2 GHz 900 MHz − 2 GHz
Image Rejection
Filter IF Amp 1
2nd IF
Amp2
THS9000
2x for Diversity
LNA 2
Image Reject
Filter 1st Mixer 1st IF SAWPGA
1st IF Amp
LNA 1 ADC
RX LO 1 LO1 Drive
Amp 2
LO1 Drive
Amp 1
2nd Mixer
RX LO2 LO2 Drive
Amp 2
LO2 Drive
Amp 1
2nd IF Amp1
2nd IF SAWAlias Filter
900 MHz − 2 GHz 100 MHz − 300 MHz 20 MHz − 70 MHz
THS9000
2x for Diversity
BB Amp Alias Filter IF SAW PGA
1st IF amp PA
DAC
RX LO1 LO1 Drive
Amp 2
LO1 Drive
Amp 1 RX LO2 LO2 Drive
Amp 2
LO2 Drive
Amp 1
1st Mixer 2nd Mixer
BB 100 MHz − 300 MHz 900 MHz − 2 GHz
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
Figure 21 shows an example of a single conversion receiver architecture and where the THS9000 would typicallybe used.
Figure 21. Example Single Conversion Receiver Architecture
Figure 22 shows an example of a dual conversion receiver architecture and where the THS9000 would typicallybe used.
Figure 22. Example Dual Conversion Receiver Architecture
Figure 23 shows an example of a dual conversion transmitter architecture and where the THS9000 wouldtypically be used.
Figure 23. Example Dual Conversion Transmitter Architecture
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RED =
GREEN =
SAWTHS9000
SAW
140 MHz
140 MHz SAW: Sawtek #854916
SAW + THS9000
SAW Only
R(BIAS)
L(COL)
IF(IN)
C(BYP)
VS
6 5 4
1 2 3
THS9000
IF(OUT)
CO
1 nF
0.1 mF
CI
VS
1 nF
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
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Figure 24 shows the THS9000 and Sawtek #854916 SAW filter frequency response along with the frequencyresponse of the SAW filter alone. The SAW filter has a center frequency of 140 MHz with 10-MHz bandwidth and8-dB insertion loss. It can be seen that the frequency response with the THS9000 is the same as with the SAWexcept for a 15-dB gain. The THS9000 is mounted on the standard EVM with V
S
= 5 V, R
(BIAS)
= 237 Ω, andL
(COL)
= 470 nH. Note the amplifier does not add artifacts to the signal.
Figure 24. Frequency Response of the THS9000 and SAW Filter, and SAW Filter Only
Figure 25. THS9000 Recommended Circuit (used for all tests)
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Evaluation Module
Bill Of Materials
THS9000
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.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
Table 1 is the bill of materials, and Figure 26 and Figure 27 show the EVM layout.
ITEM DESCRIPTION REF DES QTY PART NUMBER
(1)
1 Cap, 0.1 µF, ceramic, X7R, 50 V C1 1 (AVX) 08055C104KAT2A2 Cap, 1000 pF, ceramic, NPO, 100 V C2, C3 2 (AVX) 08051A102JAT2A3 Inductor, 470 nH, 5% L1 1 (Coilcraft) 0805CS-471XJBC4 Resistor, 237 Ω, 1/8 W, 1% R1 1 (Phycomp) 9C08052A2370FKHFT5 Open TR1 16 Jack, banana receptance, 0.25" dia. J3, J4 2 (SPC) 8137 Connector, edge, SMA PCB jack J1, J2 2 (Johnson) 142-0701-8018 Standoff, 4-40 Hex, 0.625" Length 4 (KEYSTONE) 18089 Screw, Phillips, 4-40, .250" 4 SHR-0440-016-SN10 IC, THS9000 U1 1 (TI) THS9000DRD11 Board, printed-circuit 1 (TI) EDGE # 6453521 Rev.A
(1) The manufacturer ' s part numbers are used for test purposes only.
Figure 26. EVM Top Layout
Figure 27. EVM Bottom Layout
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): THS9000
0.110
(2,79)
0.050
(1,27)
0.025
(0,64) 0.010
vias
(0,254)
0.028
(0,711)
0.032
(0,81)
0.011
(0,28)
0.015
(0,381)
0.140
(3,56)
0.080
(2,03)
THS9000
SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008 ..........................................................................................................................................
www.ti.com
Figure 28. THS9000 Recommended Footprint dimensions are in inches (millimeters)
14 Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): THS9000
THS9000
www.ti.com
.......................................................................................................................................... SLOS425D – DECEMBER 2003 – REVISED OCTOBER 2008
Revision History
Changes from Revision C (February 2007) to Revision D ............................................................................................. Page
•Removed the DRD ordering options from the Available Options table ................................................................................. 2•Formatted the Absolute Maximum Ratings table to current standards.................................................................................. 2•Deleted DRD row from the Dissipation Rating table .............................................................................................................. 2
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): THS9000
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
THS9000DRDR OBSOLETE SON DRD 6 TBD Call TI Call TI
THS9000DRDT OBSOLETE SON DRD 6 TBD Call TI Call TI
THS9000DRWR ACTIVE VSON DRW 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS9000DRWRG4 ACTIVE VSON DRW 6 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS9000DRWT ACTIVE VSON DRW 6 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS9000DRWTG4 ACTIVE VSON DRW 6 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
THS9000DRWR VSON DRW 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
THS9000DRWT VSON DRW 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Feb-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
THS9000DRWR VSON DRW 6 3000 195.0 200.0 45.0
THS9000DRWT VSON DRW 6 250 195.0 200.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Feb-2011
Pack Materials-Page 2
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