FEATURES
DVERY LOW NOISE: 0.7nV//Hz
DLOW-NOISE PREAMP (LNP)
− Active Termination
− Programmable Gains: 3, 12, 18, 22dB
− Programmable Input Impedance (RF)
− Buffered, Differential Outputs for CW
Processing
− Excellent Input Signal Handling
Capabilities
DLOW-NOISE VARIABLE-GAIN AMPLIFIER
− High/Low-Mode (0/+6dB)
− 52dB Gain Control Range
− Linear Control Response: 22dB/V
− Switchable Differential Inputs
− Adjustable Output Clipping-Level
DBANDWIDTH: 42MHz
DHARMONIC DISTORTION: −55dB
D5V SINGLE SUPPLY
DLOW-POWER: 154mW/Channel
DPOWER-DOWN MODES
APPLICATIONS
DMEDICAL AND INDUSTRIAL ULTRASOUND
SYSTEMS
− Suitable for 10-Bit and 12-Bit Systems
DTEST EQUIPMENT
DESCRIPTION
The VCA2615 is a dual-channel, variable gain amplifier
consisting of a Low-Noise Preamplifier (LNP) and a Variable-
Gain Amplifier (VGA). This combination along with the device
features makes it well-suited for a variety of ultrasound
systems.
The LNP offers a high level of flexibility to adapt to a wide range
of systems and probes. The LNP gain can be programmed to
one of four settings (3dB, 12dB, 18dB, 22dB), while
maintaining excellent noise and signal handling
characteristics. The input impedance of the LNP can be
controlled by selecting one of the built-in feedback resistors.
This active termination allows the user to closely match the
LNP to a given source impedance, resulting in optimized
overall system noise performance. The differential LNP
outputs are provided either as b u ffered outputs for further CW
processing, or fed directly into the variable-gain amplifier
(VGA). Alternatively, an external signal can be applied to the
differential VGA inputs through a programmable switch.
Following a linear-in-dB response, the gain of the VGA can be
varied over a 52dB range with a 0.2V to 2.5V control voltage
common to both channels of the VCA2615. In addition, the
overall gain can be switched between a 0dB and +6dB
postgain, allowing the user to optimize the output swing of
VCA2615 for a variety of high-speed Analog-to-Digital
Converters (ADCs). As a means to improve system overload
recovery time, the VCA2615 provides an internal clipping
function where an externally applied voltage sets the desired
clipping level.
The VCA2615 operates on a single +5V supply and is
available in a small QFN-48 (7x7mm) or TQFP package.
MUX
52dB
Range
Feedback
Resistors
(3, 12, 18, 22dB)
LNP
+1
1/2 VCA2615
LNPIN+
LNPOUT−
FB1 FB2 FB3 FB4
+1
LNPOUT+VCAIN+VCAIN−H/L
(0dB or
+6dB)
G1 G1 VCNTL VCLMP
VCAINSEL
LNPIN−
VCAOUT+
VCAOUT−
VGA
VCA2615
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
Dual, Low-Noise
Variable-Gain Amplifier with Preamp
www.ti.com
Copyright 2005−2008, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
! !
All trademarks are the property of their respective owners.
"#$%&
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
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2
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply (VDD) +6V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Inputs −0.3V to (+VS + 0.3V). . . . . . . . . . . . . . . . . . . . . . . .
Logic Inputs −0.3V to (+VS + 0.3V). . . . . . . . . . . . . . . . . . . . . . . . . .
Case Temperature +100°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature −40°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
This integrated circuit can be damaged by ESD.
Texas Instruments recommends that all
integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION (1)
PRODUCT PACKAGE-LEAD PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE PACKAGE
MARKING ORDERING NUMBER TRANSPORT MEDIA,
QUANTITY
QFN-48
RGZ
−40°C to +85°C
VCA2615
VCA2615RGZR Tape and Reel, 2500
VCA2615
QFN-48 RGZ −40°C to +85°C VCA2615 VCA2615RGZT Tape and Reel, 250
VCA2615
TQFP-48
PFB
−40°C to +85°C
VCA2615
VCA2615PFBR Tape and Reel, 1000
TQFP-48 PFB −40°C to +85°C VCA2615 VCA2615PFBT Tape and Reel, 250
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website
at www.ti.com.
FUNCTIONAL BLOCK DIAGRAM
INPUTB
Feedback
Network
Gain
Control
Logic
LNPOUT−BVCAIN−BLNPOUT+B
LNP
VCAIN+B H/L VCLMP VCNTL
VCAOUT+B
VCAOUT−B
VCAOUT+A
VCAOUT−A
VCAINSEL
CEXTB2
CEXTB1
CEXTA2
CEXTA1
VGA
INPUTA
FB1
FB2
FB3
FB4
G1
G2
Feedback
Network
Gain
Control
Logic
LNPOUT−AVCAIN−A
LNP Buffer
Buffer
VCAIN+ALNPOUT+A
VGA
Buffer
Buffer
"#$%&
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
www.ti.com
3
ELECTRICAL CHARACTERISTICS
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
VCA2615
PARAMETER CONDITIONS MIN TYP MAX UNIT
PREAMPLIFIER (LNP and Buffer)
Input Resistance, RIN With Active Feedback Termination See Note(1) kΩ
Input Resistance Feedback Termination Open 100 kΩ
Input Capacitance 45 pF
Maximum Input Voltage LNP Gain (G1, G2) = 00 − Linear Operation(2) 2.3 VPP
LNP Gain (G1, G2) = 01 − Linear Operation(2) 0.78 VPP
LNP Gain (G1, G2) = 10 − Linear Operation(2) 0.39 VPP
LNP Gain (G1, G2) = 11 − Linear Operation(2) 0.23 VPP
Maximum Input Voltage Any LNP Gain − Overload (symmetrical clipping) 5 VPP
Input Voltage Noise RS = 0Ω; Includes Buffer Noise, LNP Gain = 11 0.8 nV/√Hz
Input Current Noise 1 pA/√Hz
Bandwidth 50 MHz
2nd-Harmonic Distortion fIN = 5MHz −55 dBc
3rd-Harmonic Distortion fIN = 5MHz −55 dBc
LNP Gain Change Response Time LNP Gain 00 to 11; to 90% Signal Level 0.1 µs
BUFFER (LNPOUT+A/B, LNPOUT−A/B)
Output Signal Range(2) RL > = 500Ω3.3 VPP
Output Common-Mode Voltage 1.85 V
Output Short-Circuit Current 60 mA
Output Impedance 3Ω
ACTIVE TERMINATION
Feedback Resistance(3), RFFB (1-4) = 0111 1500 Ω
FB (1-4) = 1011 1000 Ω
FB (1-4) = 1101 500 Ω
FB (1-4) = 1110 250 Ω
FB (1-4) = 0000 130 Ω
VARIABLE-GAIN AMPLIFIER (VGA)
Peak Input Voltage Linear Operation(2), VCNTL = 0.7V 2 VPP
Upper −3dB Bandwidth 50 MHz
2nd-Harmonic Distortion VCNTL = 2.5V, 1VPP Differential Output −60 dBc
3rd-Harmonic Distortion VCNTL = 2.5V, 1VPP Differential Output −63 dBc
Slew-Rate ±100 V/µs
PREAMPLIFIER AND VARIABLE-GAIN
AMPLIFIER (LNP AND VGA)
Input Voltage Noise 0.7 nV/√Hz
Clipping Voltage Range (VCLMP)0.25 to 2.6 V
Clipping Voltage Variation VCLMP = 0.5V, VCAOUT = 1.0VPP ±50 mV
Output Impedance fIN = 5MHz, Single-Ended, Either Output 3Ω
Output Short-Circuit Current 60 mA
Overload Distortion (2nd-Harmonic) VIN = 250mVPP −44 dBc
Crosstalk fIN = 5MHz −70 dBc
Delay Matching ±1 ns
Overload Recovery Time 25 ns
Maximum Output Load 100 Ω
Maximum Capacitive Output Loading 50Ω in Series 80 pF
Maximum Output Signal(2) 6 VPP
Output Common-Mode Voltage 2.5 V
2nd-Harmonic Distortion Input Signal = 5MHz, VCNTL = 1V −45 −55 dB
3rd-Harmonic Distortion Input Signal = 5MHz, VCNTL = 1V −45 −55 dB
Upper −3dB Bandwidth VCNTL = 2.5V 42 MHz
(1)
RIN +RF
(1)ALNP
2)
(2) 2nd−harmonic, 3rd-harmonic distortion less than or equal to −30dBc.
(3) See Table 5.
(4) Referred to best-fit dB linear curve.
(5) Parameters ensured by design; not production tested.
(6) Do not leave inputs floating; no internal pull-up/pull-down resistors.
"#$%&
SBOS316D − JULY 2005 − REVISED OCTOBER 2008
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
PARAMETER UNIT
VCA2615
CONDITIONS
PARAMETER UNIT
MAXTYPMIN
CONDITIONS
ACCURACY
Gain Slope VCNTL = 0.4V to 2.0V 22 dB/V
Gain Error(4) VCNTL = 0.4V to 2.0V −1.5 ±0.9 +1.5 dB
Gain Range VCNTL = 0.2V to 2.5V 52 dB
Gain Range VCNTL = 0.4V to 2.0V 36.5 dB
Gain Range (H/L) H/L = 0 (+6dB); VGA High Gain; VCNTL = 0.2V to 2.5V −12 to +40 dB
H/L = 1 (0dB); VGA Low Gain; VCNTL = 0.2V to 2.5V −18 to +34 dB
Output Offset Voltage, Differential ±50 mV
Channel-to-Channel Gain Matching VCNTL = 0.4V to 2.0V, CHA to CHB ±0.33 dB
GAIN CONTROL INTERFACE (VCNTL)
Input Voltage Range 0.2 to 2.5 V
Input Resistance
Response Time
1 MΩ
Input Resistance
Response Time VCNTL = 0.2V to 2V; to 90% Signal Level 0.6 µs
DIGITAL INPUTS(5), (6)
(G1, G2, PDL, PDV, H/L, FB1-FB4, VCAINSEL)
VIH, High-Level Input Voltage 2.0 V
VIL, Low-Level Input Voltage 0.8 V
Input Resistance 1 MΩ
Input Capacitance 5 pF
POWER SUPPLY
Supply Voltage 4.75 5.0 5.25 V
Power-Up Response Time 25 µs
Power-Down Response Time 2µs
Total Power Dissipation PDV, PDL = 1 308 350 mW
VGA Power-Down PDV = 0, PDL = 1 236 mW
LNP Power-Down PDL = 0, PDV = 1 95 mW
THERMAL CHARACTERISTICS
Temperature Range Ambient, Operating −40 +85 °C
Thermal Resistance, qJA QFN−48 Soldered Pad; Four-Layer PCB with Thermal Vias 29.1 °C/W
qJC 2.2 °C/W
qJA TQFP−48 58 °C/W
(1)
RIN +RF
(1)ALNP
2)
(2) 2nd−harmonic, 3rd-harmonic distortion less than or equal to −30dBc.
(3) See Table 5.
(4) Referred to best-fit dB linear curve.
(5) Parameters ensured by design; not production tested.
(6) Do not leave inputs floating; no internal pull-up/pull-down resistors.
"#$%&
SBOS316D − JULY 2005 − REVISED OCTOBER 2008
www.ti.com
5
PIN CONFIGURATION
VDDA
CEXTA1
CEXTA2
VCAIN−A
VCAIN+A
LNPOUT−A
LNPOUT+A
NC
VB
VDDAL
GNDAL
LNPIN−A
VDDB
CEXTB1
CEXTB2
VCAIN−B
VCAIN+B
LNPOUT−B
LNPOUT+B
NC
NC
VDDBL
GNDBL
LNPIN−B
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
VCA2615
(Thermal Pad tied to
Ground Potential,
QFN only)
GNDA
VCAOUT−A
VCAOUT+A
FB4
VCAINSEL
VCNTL
FB3
FB2
FB1
VCAOUT+B
VCAOUT−B
GNDB
48
47
46
45
44
43
42
41
40
39
38
37
G1
G2
VDDA
LNPIN+A
VDDR
VCLMP
VCM
GNDR
LNPIN+B
PDL
PDV
H/L
13
14
15
16
17
18
19
20
21
22
23
24
PIN CONFIGURATION
PIN DESIGNATOR DESCRIPTION PIN DESIGNATOR DESCRIPTION
1 VDDAChannel A + Supply 25 LNPIN−B Channel B LNP Inverting Input
2 CEXTA1 External Capacitor 26 GNDBL GND B Channel LNP
3 CEXTA2 External Capacitor 27 VDDBL VDD B Channel LNP
4 VCAIN−A Channel A VCA Negative Input 28 NC Do Not Connect
5 VCAIN+A Channel A VCA Positive Input 29 NC Do Not Connect
6 LNPOUT−A Channel A LNP Negative Output 30 LNPOUT+B Channel B LNP Positive Output
7 LNPOUT+A Channel A LNP Positive Output 31 LNPOUT−B Channel B LNP Negative Output
8 NC Do Not Connect 32 VCAIN+B Channel B VCA Positive Input
9 VB 0.01µF Bypass 33 VCAIN−B Channel B VCA Negative Input
10 VDDAL VDD A Channel LNP 34 CEXTB2 External Capacitor
11 GNDAL GND A Channel LNP 35 CEXTB1 External Capacitor
12 LNPIN−A Channel A LNP Inverting Input 36 VDDBChannel B + Supply
13 G1 LNP Gain Setting Pin (MSB) 37 GNDB Channel B Ground
14 G2 LNP Gain Setting Pin (LSB) 38 VCAOUT−B Channel B VCA Negative Output
15 VDDASupply Pin for Gain Setting 39 VCAOUT+B Channel B VCA Positive Output
16 LNPIN+A Channel A LNP Noninverting Input 40 FB1 Feedback Control Pin
17 VDDRSupply for Internal Reference 41 FB2 Feedback Control Pin
18 VCLMP VCA Clamp Voltage Setting Pin 42 FB3 Feedback Control Pin
19 VCM 0.1µF Bypass 43 VCNTL VCA Control Voltage Input
20 GNDR Ground for Internal Reference 44 VCAINSEL VCA Input Select, Hi = External
21 LNPIN+B Channel B LNP Noninverting Input 45 FB4 Feedback Control Pin
22 PDL Power Down LNPs 46 VCAOUT+A Channel A VCA Positive Pin
23 PDV Power Down VCAs 47 VCAOUT−A Channel A VCA Negative Pin
24 H/L VCA High/Low Gain Mode 48 GNDA Channel A Ground
"#$%&
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
www.ti.com
6
TYPICAL CHARACTERISTICS
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 1
GAIN vs V
CNTL
(Lo VGA Gain)
VCNTL (V)
0
0.1
Gain (dB)
60
55
50
45
40
35
30
25
20
15
10
5
0
−5
−10
−15
−20
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 01
LNP 00
Figure 2
GAIN vs V
CNTL
(Hi VGA Gain)
VCNTL (V)
0
0.1
Gain (dB)
65
60
55
50
45
40
35
30
25
20
15
10
5
0
−5
−10
−15
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 01
LNP 00
Figure 3
GAIN ERROR vs V
CNTL
(Lo VGA Gain)
VCNTL (V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
Gain (dB)
2.0
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
LNP 00
LNP 01
LNP 10
LNP 11
Figure 4
GAIN ERROR vs V
CNTL
(Hi VGA Gain)
VCNTL (V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
Gain (dB)
2.0
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
LNP 00
LNP 01
LNP 10
LNP 11
Figure 5
GAIN ERROR vs V
CNTL
VCNTL (V)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
Gain Error (dB)
2.0
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
1MHz
2MHz
5MHz
10MHz
Figure 6
GAIN ERROR vs VCNTL vs TEMPERATURE
VCNTL (V)
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
Gain Error (dB)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
−1.4
−1.6
−1.8
−2.0
+25_C
−40_C
+85_C
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www.ti.com
7
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 7
−0.56
−0.49
−0.42
GAIN MATCHING, CHA to CHB
VCNTL =0.4V
DeltaGain(dB)
Units
60
50
40
30
20
10
0
−0.35
−0.28
−0.21
−0.14
−0.07
−0.00
0.07
0.21
0.14
0.28
0.35
0.42
0.49
Figure 8
−0.53
−0.47
−0.41
GAIN MATCHING, CHA to CHB
VCNTL =2.0V
DeltaGain(dB)
Units
60
50
40
30
20
10
0
−0.35
−0.29
−0.23
−0.17
−0.11
−0.05
0.01
0.13
0.07
0.19
0.25
0.31
0.37
Figure 9
25
20
15
10
5
0
−5
GAIN vs FREQUENCY
(VCNTL = 0.7V, Lo VGA Gain)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
LNP = 10
LNP = 00
LNP = 11
LNP = 01
Figure 10
30
25
20
15
10
5
0
GAIN vs FREQUENCY
(VCNTL = 0.7V, Hi VGA Gain)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
LNP = 11
LNP = 10
LNP= 00
LNP = 01
Figure 11
60
55
50
45
40
35
30
25
20
15
10
5
0
GAIN vs FREQUENCY
(VCNTL =2.5V,LoVGAGain)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
LNP = 11
LNP = 10
LNP = 01
LNP = 00
Figure 12
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
GAIN vs FREQUENCY
(VCNTL = 2.5V, Hi VGA Gain)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
LNP = 11
LNP = 10
LNP = 01
LNP = 00
"#$%&
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
www.ti.com
8
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 13
25
20
15
10
5
0
−5
GAIN vs FREQUENCY
(LNP Only)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
LNP = 11
LNP = 10
LNP = 00
LNP = 01
Figure 14
45
40
35
30
25
20
15
10
5
0
−5
−10
GAIN vs FREQUENCY
(VGA Only)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
Hi Gain,
VCNTL 2.5V
Lo Gain,
VCNTL 2.5V
Lo Gain,
VCNTL 0.7V
Hi Gain,
VCNTL 0.7V
Figure 15
64
63
62
61
60
59
58
57
56
55
GAIN vs FREQUENCY
(LNP (G1, G2) = 11, Various VGA Gain Capacitors)
Frequency (MHz)
0.1 1 10 100
Gain (dB)
3.9µF
0.1µF
0.022µF
4700pF
Figure 16
OUTPUT−REFERRED NOISE vs V
CNTL
(VGA Lo Gain, RS=0
Ω
)
VCNTL (V)
0.2
0.3
Noise (nV/√Hz)
1000
100
10
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 01
LNP 00
Figure 17
OUTPUT−REFERRED NOISE vs V
CNTL
(VGA Hi Gain, RS=0Ω)
VCNTL (V)
Noise (nV/√Hz)
1000
100
10
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 00
LNP 01
Figure 18
1000
100
10
1
0.1
INPUT−REFERRED NOISE vs V
CNTL
(LNP and VGA, Lo VGA Gain, RS=0
Ω
)
VCNTL (V)
Noise (nV/√Hz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 00 LNP 01
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www.ti.com
9
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 19
1000
100
10
1
0.1
INPUT−REFERRED NOISE vs V
CNTL
(Hi VGA Gain, RS=0Ω)
VCNTL (V)
Noise (nV/√Hz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 00 LNP01
Figure 20
100
10
1
NOISE FIGURE vs V
CNTL
(Lo VGA Gain, RS=0Ω)
VCNTL (V)
Noise Figure (dB)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 00
LNP 01
Figure 21
100
10
1
NOISE FIGURE vs V
CNTL
(Hi VGA Gain, RS=0Ω)
VCNTL (V)
Noise Figure (dB)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
LNP 11
LNP 10
LNP 00
LNP 01
Figure 22
1000
100
10
1
OUTPUT−REFERRED NOISE vs V
CNTL
(VGA Only, RS=0
Ω
)
VCNTL (V)
Noise (nV/√Hz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Figure 23
1000
100
10
1
INPUT−REFERRED NOISE vs V
CNTL
(VGA Only)
VCNTL (V)
Noise (nV/√Hz)
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
High Gain
Lo Gain
Figure 24
10
1
INPUT−REFERRED NOISE vs FREQUENCY
(VGA Only)
Frequency (MHz)
110
Noise (nV/√Hz)
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TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 25
10
1
0.1
INPUT−REFERRED NOISE vs FREQUENCY
(LNP Only)
Frequency (MHz)
110
Noise (nV/√Hz)
LNP 11
LNP 10
LNP 00
LNP 01
Figure 26
−50
−52
−54
−56
−58
−60
−62
−64
−66
−68
−70
DISTORTION vs FREQUENCY
(2nd−Harmonic, Lo VGA Gain)
Frequency (MHz)
110
Distortion (dB)
LNP 11
LNP 10
LNP 01 LNP 00
Figure 27
−40
−45
−50
−55
−60
DISTORTION vs FREQUENCY
(3rd−Harmonic,Lo VGA Gain)
Frequency (MHz)
110
Distortion (dB)
LNP 11
LNP 10
LNP 01
LNP 00
Figure 28
−50
−52
−54
−56
−58
−60
−62
−64
−66
−68
−70
DISTORTION vs FREQUENCY
(2nd−Harmonic, Hi VGA Gain)
Frequency (MHz)
110
Distortion (dB)
LNP 11
LNP 10
LNP 01
LNP 00
Figure 29
−40
−45
−50
−55
−60
−65
−70
DISTORTION vs FREQUENCY
(3rd−Harmonic, Hi VGA Gain)
Frequency (MHz)
110
Distortion (dB)
LNP 11
LNP 10
LNP 01
LNP 00
Figure 30
−30
−35
−40
−45
−50
−55
−60
−65
−70
2nd−HARMONIC DISTORTION vs V
CNTL
(Lo VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
LNP 00
LNP 01
LNP 11
LNP10
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11
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 31
−30
−35
−40
−45
−50
−55
−60
−65
−70
3rd−HARMONIC DISTORTION vs V
CNTL
(Lo VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
LNP 00
LNP 01
LNP 10
LNP 11
Figure 32
−30
−35
−40
−45
−50
−55
−60
−65
−70
2nd−HARMONIC DISTORTION vs V
CNTL
(Hi VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
LNP 00
LNP 10
LNP 01
LNP 11
Figure 33
−30
−35
−40
−45
−50
−55
−60
−65
−70
3rd−HARMONIC DISTORTION vs V
CNTL
(Hi VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
LNP 00
LNP 01
LNP 10
LNP 11
Figure 34
−30
−35
−40
−45
−50
−55
−60
−65
−70
DISTORTION vs VCA Output Voltage
VCA Output (VPP)
0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
Distortion (dB)
3rd−Harmonic
2nd−Harmonic
Figure 35
−30
−35
−40
−45
−50
−55
−60
−65
−70
−75
−80
DISTORTION vs LNP Gain
(LNP Only)
LNP Gain (G1, G2)
00 01 10 11
Distortion (dB)
2nd−Harmonic
3rd−Harmonic
Figure 36
−20
−30
−40
−50
−60
−70
−80
DISTORTION vs V
CNTL
(VGA Only, SE In/Diff Out, Lo Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
2nd−Harmonic
3rd−Harmonic
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12
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 37
−30
−35
−40
−45
−50
−55
−60
−65
−70
DISTORTION vs V
CNTL
(VGAOnly, SE In/Diff Out, Hi Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.3
1.2
1.4
1.5
1.6
1.7
1.9
1.8
2.0
2.1
2.2
2.3
2.4
2.5
Distortion (dB)
3rd−Harmonic
2nd−Harmonic
Figure 38
−30
−35
−40
−45
−50
−55
−60
−65
−70
−75
−80
DISTORTION vs OUTPUT LOAD RESISTANCE
RLOAD(Ω)
15050
Distortion (dB)
250 350 450 550 650 750 850 950 1050
2nd−Harmonic
3rd−Harmonic
Figure 39
−60
−62
−64
−66
−68
−70
−72
−74
−76
−78
−80
CROSSTALK vs V
CNTL
(Lo VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Crosstalk (dB)
LNP 00
LNP 01
LNP 10
LNP 11
Figure 40
−60
−62
−64
−66
−68
−70
−72
−74
−76
−78
−80
CROSSTALK vs V
CNTL
(Hi VGA Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Crosstalk (dB)
LNP 00
LNP 01
LNP 10
LNP 11
Figure 41
−50
−54
−58
−62
−66
−70
−74
−78
−82
−86
−90
CROSSTALK vs V
CNTL
(VOUT =2V
PP, Hi−Gain)
VCNTL (V)
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Crosstalk (dB)
10MHz
5MHz
2MHz
1MHz
Figure 42
TOTAL POWER vs TEMPERATURE
Temperature(_C)
−40
−35
−30
−25
−20
−15
−10
−5
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
Power (mW)
314
313
312
311
310
309
308
307
306
305
304
303
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www.ti.com
13
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 43
LNP POWER vs TEMPERATURE
Temperature(_C)
−40
−35
−30
−25
−20
−15
−10
−5
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
Power Dissipation (mW)
239
238
237
236
235
234
233
Figure 44
VGA POWER vs TEMPERATURE
Temperature (_C)
−40
−35
−30
−25
−20
−15
−10
−5
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
VGA Power Dissipation (mW)
96.0
95.5
95.0
94.5
94.0
Figure 45
DISTORTION vs TEMPERATURE
Temperature(_C)
−40
−35
−30
−25
−20
−15
−10
−5
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
Distortion (dB)
−60
−59
−58
−57
−56
−55
−54
−53
−52
2nd−Harmonic
3rd−Harmonic
Figure 46
GAIN vs VCNTL vs TEMPERATURE
VCNTL (V)
0.4 0.5
Gain (dB)
50
45
40
35
30
25
20
15
10
5
00.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
+25_C
+85_C
−40_C
Figure 47
OVERLOAD DISTORTION
2nd−HARMONIC
VIN (V)
0.25
2nd−Harmonic (dB)
−30
−31
−32
−33
−34
−35
−36
−37
−38
−39
−40
−41
−42
−43
−44
−45
−46 0.50 0.75 1.00
Figure 48
V
OUT
vs V
CLAMP
(100mVPP,S/EInput)
VCLAMP (V)
0.2
0.3
VOUT (PP)
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
H/L = 0
H/L = 1
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14
TYPICAL CHARACTERISTICS (continued)
All specifications at TA = +25°C, VDD = 5V, load resistance = 500Ω on each output to ground; the input to the preamp (LNP) is single-ended;
fIN = 5MHz, LNP Gain (G1, G2) = 10, H/L = 0, VCNTL = 2.5V ; VCA output is 1VPP differential; CA, CB = 3.9µF, unless otherwise noted.
Figure 49
OUTPUT IMPEDANCE vs FREQUENCY
Frequency (MHz)
0.1
ROUT (Ω
)
100
10
11 10 100
Figure 50
POWER UP/DOWN RESPONSE
Time (µs)
25 30 35 40 45 50 605520510150
H
L
PD Pin
VGA Output (V)
1VPP
Figure 51
GAIN CONTROL TRANSIENT RESPONSE
1VPP
Time (µs)
1.5 1.8 2.1 2.4 2.7 3.00.9 1.20.3 0.60
2V
0V
VCNTL (V)
VGA Output (V)
Figure 52
35
30
25
20
15
10
5
0
GROUP DELAY vs FREQUENCY
Frequency (MHz)
101100
Group Delay (ns)
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15
THEORY OF OPERATION
The VCA2615 is a dual-channel system consisting of two
primary blocks: a low noise preamplifier (LNP) and a
variable gain amplifier (VGA), which is driven from the
LNP. The LNP is very flexible; both the gain and input
impedance can be programmed digitally without using
external components. The LNP is coupled to the VGA
through a multiplexer to facilitate interfacing with an
external signal processor. The VGA is a true variable-gain
amplifier, achieving lower noise output at lower gains. The
output amplifier has two gains, allowing for further
optimization with different analog-to-digital converters.
Figure 53 shows a simplified block diagram of a single
channel of the dual-channel system. Both the LNP and the
VGA can be powered down together or separately in order
to conserve system power when necessary.
LNP VGA
Figure 53. Simplified Block Diagram of VCA2615
LNP—OVERVIEW
The LNP has differential input and output capability. It also
has exceptionally low noise voltage and input current
noise. At the highest gain setting (of 22dB), the LNP
achieves 0.7nV/√Hz voltage noise and typically 1pA/√Hz
current noise. The LNP can process fully differential or
single-ended signals in each channel. Differential signal
processing reduces second harmonic distortion and offers
improved rejection of common-mode and power-supply
noise. The LNP gain can be electronically programmed to
have one of four values that can be selected by a two-bit
word (see Table 2). The gain of the LNP when driving the
VGA is approximately 1dB higher because of the loss in
the buffer.
The LNP also has four programmable feedback resistors
that can be selected by a four-bit word to create 16 different
values in order to facilitate the easy use of active feedback.
With this combination of both programmable gain and
feedback resistors, as many as 61 different values of input
impedance can be created to provide a wide variety of
input-matching resistors (see Table 5). By using active
feedback with this wide selection of feedback resistors, the
user is able to provide a low-noise means of terminating
input signal while incurring only a 3dB loss in
signal-to-noise ratio (SNR), instead of a 6dB loss in SNR
which is usually associated with the conventional type of
signal termination. More information is given in the section
of this document that provides a detailed description of the
LNP.
The LNP output drives a buffer that in turn drives the
feedback network and supplies the LNP to a multiplexer.
The multiplexer can be configured to supply the signal
off-chip for further processing, or can be set to drive the
internal VGA directly from the LNP. An external coupling
capacitor is not required to couple the LNP to the VGA.
VGA—OVERVIEW
The VGA that is used with the VCA2615 is a true
variable-gain amplifier; as the gain is reduced, the noise
contribution from the VGA itself is also reduced. A block
diagram of the VGA is shown in Figure 53. This design is
in contrast with another popular device architecture (used
by the VCA2616), where an effective VCA characteristic
is obtained by a voltage variable-attenuator succeeded by
a fixed-gain amplifier. At the highest gain, systems with
either architecture are dominated by the noise produced
by the LNP. At low gains, however, the noise output is
dominated by the contribution from the VGA. Therefore,
the overall system with lower VGA gain will produce less
noise.
The following example will illustrate this point. Figure 53
shows a block diagram of an LNP driving a variable-gain
amplifier; Figure 54 shows a block diagram of an LNP
driving a variable attenuation attenuator followed by a
fixed gain amplifier. For purposes of this example, let us
assume the performance characteristics shown in Table 1;
these values are the typical performance data of the
VCA2615 and the VCA2616.
LNP Amplifier
ATTENUATOR
Figure 54. Block Diagram of Older VCA Models
"#$%&
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
www.ti.com
16
Table 1. Gain and Noise Performance of Various
VCA Blocks
BLOCK GAIN (Loss) dB NOISE nV/√Hz
LNP1 (VCA2615) 20 0.82
LNP2 (VCA2616) 20 1.1
Attenuator (VCA2616) 0 1.8
Attenuator (VCA2616) −40 1.8
VCA1 (VCA2615) 40 3.8
VCA1 (VCA2615) 0 90
VCA2 (VCA2616) 40 2.0
When the block diagram shown in Figure 53 has a
combined gain of 60dB, the noise referred to the input
(RTI) is given by the expression:
Total Noise (RTI) +(LNP Noise)2)(VCA NoiseńLNP Gain)2
Ǹ
+(0.82)2)(3.8ń10)2
Ǹ+0.90nVńHz
Ǹ
When the block diagram shown in Figure 54 has the
combined gain of 60dB, the noise referred to the input
(RTI) is given by the expression:
Total Noise (RTI) +
(LNP Noise)2)(ATTEN NoiseńLNP Gain)2)(VCA NoiseńLNP Gain)2Ǹ
+(1.1)2)(1.8ń10)2)(2.0ń10)2Ǹ+1.13nVńHz
Ǹ
Repeating the above measurements for both VCA
configurations when the overall gain is 20dB yields the
following results:
For the VCA with a variable gain amplifier (Figure 53):
Total Noise (RTI) +(0.82)2)(90ń10)2
Ǹ+9.03nVńHz
Ǹ
For the VCA with a variable attenuation attenuator
(Figure 54):
Total Noise +(1.1)2)(1.8ń10)2)(2.0ń0.10)2
Ǹ
+14nVńHz
Ǹ
The VGA has a continuously-variable gain range of 52dB
with the ability to select either of two options. The gain of
the VGA can either be varied from −12dB to 40dB, or from
−18dB to 34dB. The VGA output can be programmed to
clip precisely at a predetermined voltage that is selected
by the user. When the user applies a voltage to pin 18
(VCLMP), the output will have a peak-to-peak voltage that is
given by the graph shown in Figure 48.
LOW NOISE PREAMPLIFIER (LNP)—DETAIL
The LNP is designed to achieve exceptionally low noise
performance when employed with or without active
feedback. The proprietary LNP architecture can be
electronically programmed, eliminating the need for
off-board components to alter the gain. A simplified
schematic of this amplifier is shown in Figure 55. FET pairs
Q1−Q2, Q3−Q4, Q5−Q6 and Q7−Q8 each represent a
different LNP gain. The four switches are 22dB, 18dB,
12dB and 3dB. One of the unique gain settings is selected
when one of the four switches Q9 through Q12 are
selected. Table 2 shows the relationship between the gain
selection bits, G1 and G2, and the corresponding gain.
Table 2. Gain Selection of LNP
G1 G2 LNP GAIN (dB)
0 0 3
0 1 12
1 0 18
1 1 22
Q9
Digital Gain Select
−IN
+IN
−OUT
+OUT
Q1 Q2
Q10
Q3 Q4
Q11
Q5 Q6
Q12
VDD
Q7
Q13 Q14
Q8
Figure 55. Programmable LNP
(1)
(2)
(3)
(4)
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17
The ability to change the gain electronically offers
additional flexibility for optimizing the gain in order to
achieve either maximum signal-handling capability or
maximum sensitivity. Table 3 lists the input and output
signal-handling capability of the LNP.
Table 4 shows the voltage noise of the LNP for different
gain settings.
Table 3. Signal Handling Capability of LNP
GAIN
(dB) G1, G2 MAX INPUT
(VPP Single-Ended) MAX OUTPUT
(VPP Differential)
22 11 0.23 3.5
18 10 0.39 3.5
12 01 0.78 3.5
3 00 2.3 3.0
Table 4. LNP Gain vs Voltage Noise
LNP GAIN (dB) VOLTAGE NOISE
(nV/√Hz) at 5MHz
22 0.8
18 1.1
12 1.9
3 4.9
The current noise for the LNP is 1pA/√Hz for all gain
settings. The input capacitance of the LNP is 45pF.
The LNP output drives a buffer and a multiplexer (MUX)
along with a feedback network that can be used to program
the input impedance. Figure 56 shows a block diagram of
how these circuits are connected together. The output of
the LNP feeds a buffer to avoid the loading effect of the
feedback resistors and to achieve a more robust capability
for driving external circuits.
Buffer
LNP VGA OUT
LNP OUT
VGA IN MUX
IN
Feedback
Resistors
Figure 56. Block Diagram of LNP/VGA Interface
See Figure 57, which shows the response time of the LNP
gain changing from minimum to maximum.
Time (200ns/div)
LNP Gain
11
00
(10V/div)
LNP
Output
(500mV/div)
Figure 57. LNP Gain Change Response
The LNP also feeds a MUX, which accepts the LNP signal
or can receive an external signal. When applying an
external signal to the MUX (VCAIN), the signal should be
biased to a common-mode voltage in the range of 1.85V
to 3.15V. This biasing could be accomplished by using the
2.5V level of the VCM pin (19) of the VCA2615.
To MUX
(VGAIN)
VCM
IN
Figure 58. Recommended Circuit for Coupling an
External Signal into the MUX
INPUT IMPEDANCE
Figure 59 shows a simplified schematic of the resistor
feedback network along with Table 5 that relates the FB1,
FB2, FB3 and FB4 code to the selected value. When the
selection bits leave the feedback network in the open
position, the input resistance of the LNP will become
100kΩ.
LNPIN OUT
1500Ω(FB1)
(FB2)
(FB3)
(FB4)
1000Ω
500Ω
250Ω
Buffer
Figure 59. Feedback Resistor Network
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Table 5. Feedback Resistor Settings
FEEDBACK
RESISTOR
(W)FB4 FB3 FB2 FB1
130 0 0 0 0
143 0 0 0 1
150 0 0 1 0
167 0 0 1 1
176 0 1 0 0
200 0 1 0 1
214 0 1 1 0
250 0 1 1 1
273 1 0 0 0
333 1 0 0 1
375 1 0 1 0
500 1 0 1 1
600 1 1 0 0
1000 1 1 0 1
1500 1 1 1 0
Open 1 1 1 1
As explained previously, the LNP gain can have four
different values while the feedback resistor can be
programmed t o have 16 dif ferent values. This variable gain
means that the input impedance can take on 61 different
values given by the formula shown below:
RIN +RF
(1)ALNP
2)
Where RF is the value of the feedback resistor and ALNP
is the differential gain of the LNP in volts/volt. The variable
gain enables the user to most precisely match the LNP
input impedance to the various probe and cable
impedances to achieve optimum performance under a
variety of conditions. No additional components are
required in order to determine the input impedance.
The resistor values shown in Table 5 represent typical
values. Due to process variation, the actual values of the
resistance can differ by as much as 20%.
ACTIVE FEEDBACK TERMINATION
One of the key features of an LNP architecture is the ability
to employ active-feedback termination in order to achieve
superior noise performance. Active-feedback termination
achieves a lower noise figure than conventional shunt
termination essentially because no signal current is
wasted in the termination resistor itself. Another example
may clarify this point. First, consider that the input source,
at the far end of the signal cable, has a cable-matching
source resistance of RS. Using a conventional shunt
termination at the LNP input, a second terminating resistor
RS is connected to ground. Therefore, the signal loss is
6dB because of the voltage divider action of the series and
shunt RS resistors. The effective source resistance has
been reduced by the same factor of two, but the noise
contribution has been reduced only by the √2, which is
only a 3dB reduction. Therefore, the net theoretical SNR
degradation is 3dB, assuming a noise-free amplifier input.
In practice, the amplifier noise contribution will degrade
both the un-terminated and the terminated noise figures.
Figure 60 shows an amplifier using active feedback.
RF
A
RIN
RIN =
RS
RS
RS
=R
S
LNPIN
RF
1+A
Active Feedback
A
Conventional Cable Termination
Figure 60. Configurations for Active Feedback
and Conventional Cable Termination
This diagram appears very similar to a traditional inverting
amplifier. However, A in this case is not a very large
open-loop op-amp gain; rather, it is the relatively low and
controlled gain of the LNP itself. Thus, the impedance at
the inverting amplifier terminal will be reduced by a finite
amount, as given in the familiar relationship of:
RIN +RF
(1)A)
where RF is the programmable feedback resistor, A is the
user-selected gain of the LNP, and RIN is the resulting
amplifier input impedance with active feedback.
(5)
(6)
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In this case, unlike the conventional termination shown in
Figure 60, both the signal voltage and the RS noise are
attenuated by the same factor of two (or 6dB) before being
re-amplified by the A gain setting. This configuration
avoids the extra 3dB degradation because of the
square-root effect described above, which is the key
advantage of the active termination technique. As noted,
the previous explanation ignored the input noise
contribution of the LNP itself. Also, the noise contribution
of the feedback resistor must be included for a completely
correct analysis. The curves shown in Figure 61 and
Figure 62 allow the VCA2615 user to compare the
achievable noise figure for active and conventional
termination methods.
VCA NOISE = 3.8nV√Hz, LNP GAIN = 20dB
Source Impedance (Ω)
0300100 200 500400 600 700 800 900 1000
Noise Figure (dB)
9
8
7
6
5
4
3
2
1
0
6.0E−10
8.0E−10
1.0E−09
1.2E−09
1.4E−09
1.6E−09
1.8E−09
2.0E−09
LNP Noise
nV/√Hz
Figure 61. Noise Figure for Active Termination
Source Impedance (Ω)
0 300100 200 500400 600 700 900 1000800
Noise Figure (dB)
14
12
10
8
6
4
2
0
VCA NOISE = 3.8nV√Hz, LNP GAIN = 20dB
LNP Noise
nV/√Hz
6.0E−10
8.0E−10
1.0E−09
1.2E−09
1.4E−09
1.6E−09
1.8E−09
2.0E−09
Figure 62. Noise Figure for Conventional
Termination
VOLTAGE-CONTROLLED AMPLIFIER (VCA)—
DETAIL
Figure 63 shows a simplified schematic of the VCA. The
VCA2615 is a true voltage-controlled amplifier, with the
gain expressed in dB directly proportional to a control
signal. This architecture compares to the older VCA
products where a voltage-controlled attenuator was
followed by a fixed-gain amplifier. With a variable-gain
amplifier, the output noise diminishes as the gain reduces.
A variable-gain amplifier, where the output amplifier gain
is fixed, will not show diminished noise in this manner.
Refer to Table 6, which shows a comparison between the
noise performance at dif ferent gains for the VCA2615 and
the older VCA2616.
Table 6. Noise vs Gain (RG = 0)
PRODUCT GAIN (dB) NOISE RTI (nV/√Hz)
VCA2615 60 0.7
VCA2615 20 9.0
VCA2616 60 1.1
VCA2616 20 14.0
The VCA accepts a differential input at the +IN and −IN
terminals. Amplifier A1, along with transistors Q2 and Q3,
forms a voltage follower that buffers the +IN signal to be
able to drive the voltage-controlled resistor. Amplifier A3,
along with transistors Q27 and Q28, plays the same role
as A1. The differential signal applied to the
voltage-controlled resistor network is converted to a
current that flows through transistors Q1 through Q4.
Through the mirror action of transistors Q1/Q5 and Q4/Q6,
a copy of this same current flows through Q5 and Q6.
Assuming that the signal current is less than the
programmed clipping current (that is, the current flowing
through transistors Q7 and Q8), the signal current will then
go through the diode bridge (D1 through D4) and be sent
through either R2 or R1, depending upon the state of Q9.
This signal current multiplied by the feedback resistor
associated with amplifier A2, determines the signal
voltage that is designated −OUT. Operation of the circuitry
associated with A3 and A4 is identical to the operation of
the previously described function to create the signal
+OUT.
A1 and its circuitry form a voltage-to-current converter,
while A2 and its circuitry form a current-to-voltage
converter. This architecture was adapted because it has
excellent signal-handling capability. A1 has been
designed to handle a large voltage signal without
overloading, and the various mirroring devices have also
been sized to handle large currents. Good overload
capability is achieved as both the input and output
amplifier are not required to amplify voltage signals.
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Voltage amplification occurs when the input voltage is
converted to a current; this current in turn is converted
back to a voltage as amplifier A2 acts as a transimpedance
amplifier. The overall gain of the output amplifier A2 can be
altered by 6dB by the action of the H/L signal. This enables
more optimum performance when the VCA interfaces with
either a 10-bit or 12-bit analog-to-digital converter (ADC).
An external capacitor (C) is required to provide a low
impedance connection to join the two sections of the
resistor network. Capacitor C could be replaced by a
short-circuit. By providing a DC connection, the output
offset will be a function of the gain setting. Typically, the
offset at this point is ±10mV; thus, if the gain varies from
1 to 100, the output offset would vary from ±10mV to
±100mV.
Clipping Program
Circuitry
Clipping Program
Circuitry
VDD
VDD
Q2
Q3
+IN
Q1 Q5 Q7 Q9
Q8
Q4 Q6
D1 D2
R1
H/L
R2
D3 D4
A1
A2
VCM
Q27
Q28
−IN
Q26
C
CEXT2
CEXT1
Q30
Q10 Q12 Q14 Q16 Q18 Q20 Q22 Q24
Q11 Q13 Q15 Q17 Q19 Q21 Q23 Q25
Q32
Q34
Q33Q29 Q31
D5 D6
R4
R3
D7 D8
A3
A4
VCM
Control Signal
Voltage−Controlled
Resistor Network
External
Capacitor
VCLMP
VCA
Program
Circuitry
VCNTL
Figure 63. Block Diagram of VCA
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21
VARIABLE GAIN CHARACTERISTICS
Transistors Q10, Q12, Q14, Q16, Q18, Q20, Q22, and Q24
form a variable resistor network that is programmed in an
exponential manner to control the gain. Transistors Q11,
Q13, Q15, Q17, Q19, Q21, Q23, and Q25 perform the
same function. These two groups of FET variable resistors
are configured in this manner to balance the capacitive
loading on the total variable-resistor network. This
balanced configuration is used to keep the second
harmonic component of the distortion low. The common
source connection associated with each group of FET
variable resistors is brought out to an external pin so that
an external capacitor can be used to make an AC
connection. This connection is necessary to achieve an
adequate low-frequency bandwidth because the coupling
capacitor would be too large to include within the
monolithic chip. The value of this variable resistor ranges
in value from 15Ω to 5000Ω to achieve a gain range of
about 44dB. The low-frequency bandwidth is then given by
the formula:
Low Frequency BW +1ń2pRC
where:
R is the value of the attenuator.
C is the value of the external coupling capacitor.
For example, if a low-frequency bandwidth of 500kHz was
desired and the value of R was 15Ω, then the value of the
coupling capacitor would be approximately 22nF.
One of the benefits of this method of gain control is that the
output offset is independent of the variable gain of the
output amplifier. The DC gain of the output amplifier is
extremely low; any change in the input voltage is blocked
by the coupling capacitor, and no signal current flows
through the variable resistor. This method also means that
any offset voltage existing in the input is stored across this
coupling capacitor; when the resistor value is changed, the
DC output will not change. Therefore, changes in the
control voltage do not appear in the output signal.
Figure 64 shows the output waveform resulting from a step
change in the control voltage, and Figure 65 shows the
output voltage resulting when the control voltage is a
full-scale ramp.
Time (400ns/div)
Channel 1
VCNTL
(2V/div)
Channel 2
Output
(20mV/div)
Figure 64. Response to Step Change of VCNTL
Time (400ns/div)
Channel 1
VCNTL
(2V/div)
Channel 2
Output
(20mV/div)
Figure 65. Response to Ramp Change of VCNTL
The exponential gain control characteristic is achieved
through a piecewise approximation to a perfectly smooth
exponential curve. Eight FETs, operated as variable
resistors whose value is progressively 1/2 of the value of
the adjacent parallel FET, are turned on progressively, or
their value is lowered to create the exponential gain
characteristic. This characteristic can be shown in the
following way. An exponential such as y = ex increases in
the y dimension by a constant ratio as the x dimension
increases by a constant linear amount. In other words, for
a constant (x1 − x2), the ratio ex1/ex2 remains the same.
When FETs used as variable resistors are placed in
parallel, the attenuation characteristic that is created
behaves according to this same exponential characteristic
at discrete points as a function of the control voltage.
It does not perfectly obey an ideal exponential
characteristic at other points; however, an 8-section
approximation yields a ±1dB error to an ideal curve.
(7)
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22
PROGRAMMABLE CLIPPING
The clipping level of the VCA can be programmed to a
desired output. The programming feature is useful when
matching the clipped level from the output of the VCA to
the full-scale range of a subsequent VCA, in order to
prevent the VCA from generating false spectral signals;
see the circuit diagram shown in Figure 66. The signal
node at the drain junction of Q5 and Q6 is sent to the diode
bridge formed by diode-connected transistors, D1 through
D4. The diode bridge output is determined by the current
that flows through transistors Q7 and Q8. The maximum
current that can then flow into the summing node of A2 is
this same current; consequently, the maximum voltage
output of A 2 i s this same current multiplied by the feedback
resistor associated with A2. The maximum output voltage
of A2, which would be the clipped output, can then be
controlled by adjusting the current that flows through Q7
and Q8; see the circuit diagram shown in Figure 63. The
circuitry of A1, R2, and Q2 converts the clamp voltage
(VCLMP) to a current that controls equal and opposite
currents flowing through transistors Q5 and Q6.
When H/L = 0, the previously described circuitry is
designed so that the value of the VCLMP signal is equal to
the peak dif ferential signal developed between +VOUT and
−VOUT. When H/L = 1, the differential output will be equal
to the clamp voltage. This method of controlled clipping
also achieves fast and clean settling waveforms at the
output of the VCA, as shown in Figure 67 through
Figure 70. The sequence of waveforms demonstrate the
clipping performance during various stages of overload.
The VCLMP pin represents a high impedance input
(> 100kΩ).
In a typical application, the VCA2615 will drive an
anti-aliasing filter, which in turn will drive an ADC. Many
modern ADCs, such as the ADS5270, are well-behaved
with as much as 2x overload. This means that the clipping
level of the VCA should be set to overcome the loss in the
filter such that the clipped input to the ADC is just slightly
over the full-scale input. By setting the clipping level in this
manner, the lowest harmonic distortion level will be
achieved without interfering with the overload capability of
the ADC.
ClipAdjust
Input
A1
A2
VCM
Q2
R2
VCLMP
Q1 Q5
VDD
Q6 Q8
Q7
D1 D2
D3
From
Buffered
Input
D4
Q9
H/L
Output
Amp
R1
R2
Figure 66. Clipping Level Adjust Circuitry
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23
Time (200ns/div)
LNP
Input
(50mV/div)
Differential Output
(500mV/div)
VCNTL =0.7V
Figure 67. Before Overload (100mVPP Input)
Time (200ns/div)
LNP
Input
(50mV/div)
Differential Output
(500mV/div)
VCNTL =0.7V
Figure 68. Approaching Overload (120mVPP Input)
POWER-DOWN MODES
When VDD (5V) is applied to the VCA2615, the total power
dissipation is typically 308mW. When the power is initially
applied to the VCA2615 with both PDV and PDL pins at a
logic low, the typical power dissipation will be 5mW. After
the VCA2615 has been enabled, if the PDL line is low with
the PDV line high, the typical power dissipation will be
approximately 100mW. After the VCA2615 has been
enabled, if the PDV line is low with the PDL line high, the
typical power dissipation will be approximately 200mW.
Time (200ns/div)
LNP
Input
(100mV/div)
Differential Output
(500mV/div)
VCNTL =0.7V
Figure 69. Overload (240mVPP Input)
Time (200ns/div)
LNP
Input
(500mV/div)
Differential Output
(1V/div)
VCNTL =0.7V
Figure 70. Extreme Overload (2VPP Input)
SBOS316D − JULY 2005 − REVISED OCT OBER 2008
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24
Revision History
DATE REV PAGE SECTION DESCRIPTION
1 Features Deleted SMALL QFN−48 PACKAGE (7x7mm)
10/08
D
1 Description Text added to last paragraph.
10/08
D
2 Package/Ordering Added TQFP−48 package information.
4Electrical Characteristics Thermal Characteristics section; added text.
1 Features Changed 20dB/V to 22dB/V under LOW -NOISE VARIABLE-GAIN AMPLIFIER
3Electrical Characteristics Added CA, CB = 3.9µF to the overall conditions.
8/05 C 4Electrical Characteristics
Accuracy section; moved Gain Slope line under accurary, added “VCNTL = 0.4V
to 2.0V” to conditions, and changed typical value from 20dBv to 22dB/V.
Thermal Characteristics section; removed “Specified” and added “Operating” to
conditions.
5Pin Configuration Pin 19 description; changed 0.01µF to 0.1µF.
22 Programmable Clipping Reworded paragraph three to clarify description of setting VCA clipping level.
NOTE:Page numbers for previous revisions may differ from page numbers in the current version.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
VCA2615PFBR ACTIVE TQFP PFB 48 1000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
VCA2615PFBT ACTIVE TQFP PFB 48 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
VCA2615RGZR ACTIVE VQFN RGZ 48 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
VCA2615RGZRG4 ACTIVE VQFN RGZ 48 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
VCA2615RGZT ACTIVE VQFN RGZ 48 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
VCA2615RGZTG4 ACTIVE VQFN RGZ 48 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
VCA2615PFBR TQFP PFB 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2
VCA2615PFBT TQFP PFB 48 250 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2
VCA2615RGZR VQFN RGZ 48 2500 330.0 16.4 7.3 7.3 1.5 12.0 16.0 Q2
VCA2615RGZT VQFN RGZ 48 250 180.0 16.4 7.3 7.3 1.5 12.0 16.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
VCA2615PFBR TQFP PFB 48 1000 367.0 367.0 38.0
VCA2615PFBT TQFP PFB 48 250 367.0 367.0 38.0
VCA2615RGZR VQFN RGZ 48 2500 367.0 367.0 38.0
VCA2615RGZT VQFN RGZ 48 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MTQF019A – JANUARY 1995 – REVISED JANUARY 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK
4073176/B 10/96
Gage Plane
0,13 NOM
0,25
0,45
0,75
Seating Plane
0,05 MIN
0,17
0,27
24
25
13
12
SQ
36
37
7,20
6,80
48
1
5,50 TYP
SQ
8,80
9,20
1,05
0,95
1,20 MAX 0,08
0,50 M
0,08
0°–7°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-026
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