Programmable Gain
Precision Difference Amplifier
AD8271
Rev. 0
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved.
FEATURES
With no external resistors
Difference amplifier, gains of ½, 1, or 2
Single-ended amplifier: over 40 different gains
Set reference voltage at midsupply
Excellent ac specifications
15 MHz bandwidth
30 V/μs slew rate
High accuracy dc performance
0.08% maximum gain error
10 ppm/°C maximum gain drift
80 dB minimum CMRR (gain of 2)
10-lead MSOP package
Supply current: 2.6 mA
Supply range: ±2.5 V to ±18 V
APPLICATIONS
ADC driver
Instrumentation amplifier building blocks
Level translators
Automatic test equipment
High performance audio
Sine/cosine encoders
FUNCTIONAL BLOCK DIAGRAM
1
7
6
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
–V
S
P4
P3
P2
P1
+V
S
OUT
N1
N2
N3
07363-001
10
9
8
2
3
4
5
Figure 1.
GENERAL DESCRIPTION
The AD8271 is a low distortion, precision difference amplifier
with internal gain setting resistors. With no external components,
it can be configured as a high performance difference amplifier
with gains of ½, 1, or 2. It can also be configured in over 40 single-
ended configurations, with gains ranging from −2 to +3.
The AD8271 comes in a 10-lead MSOP package. The AD8271
operates on both single and dual supplies and requires only a
2.6 mA maximum supply current. It is specified over the industrial
temperature range of −40°C to +85°C and is fully RoHS compliant.
For a dual channel version of the AD8271, see the AD8270
data sheet.
Table 1. Difference Amplifiers by Category
High
Speed
High
Voltage
Single-Supply
Unidirectional
Single-Supply
Bidirectional
AD8270 AD628 AD8202 AD8205
AD8273 AD629 AD8203 AD8206
AD8274 AD8216
AMP03
AD8271
Rev. 0 | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Difference Amplifier Configurations ........................................ 3
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
Maximum Power Dissipation ..................................................... 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Description .............................. 7
Typical Performance Characteristics ............................................. 8
Operational Amplifier Plots ...................................................... 14
Theory of Operation ...................................................................... 15
Circuit Information .................................................................... 15
Driving the AD8271 ................................................................... 15
Power Supplies ............................................................................ 15
Input Voltage Range ................................................................... 15
Applications Information .............................................................. 16
Difference Amplifier Configurations ...................................... 16
Single-Ended Configurations ................................................... 17
Kelvin Measurement .................................................................. 18
Instrumentation Amplifier........................................................ 18
Driving Cabling .......................................................................... 19
Driving an ADC ......................................................................... 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
1/09—Revision 0: Initial Version
AD8271
Rev. 0 | Page 3 of 20
SPECIFICATIONS
DIFFERENCE AMPLIFIER CONFIGURATIONS
VS = ±5 to ±15 V, VREF = 0 V, G = 1, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.
Table 2.
B Grade A Grade
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
Bandwidth 15 15 MHz
Slew Rate 30 30 V/μs
Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns
V
S = ±5, 5 V step on output 550 650 550 650 ns
Settling Time to 0.001% VS = ±15, 10 V step on output 750 900 750 900 ns
V
S = ±5, 5 V step on output 600 750 600 750 ns
NOISE/DISTORTION
Harmonic Distortion + Noise VS = ±15, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
110 110 dB
VS = ±5, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
141 141 dB
Voltage Noise1 f = 0.1 Hz to 10 Hz 1.5 1.5 μV p-p
f = 1 kHz 38 38 nV/√Hz
GAIN
Gain Error VOUT = 10 V p-p 0.02 0.05 %
Gain Drift TA = −40°C to +85°C 1 2 1 10 ppm/°C
Gain Nonlinearity VOUT = 10 V p-p,
RLOAD = 10 kΩ, 2 kΩ, 600 Ω
1 1 ppm
INPUT CHARACTERISTICS
Offset2
300 600 300 1000 μV
Average Temperature Drift TA = −40°C to +85°C 2 2 μV/°C
Common-Mode Rejection Ratio DC to 1 kHz 80 92 74 92 dB
Power Supply Rejection Ratio 2 10 2 10 μV/V
Input Voltage Range3
−VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V
Common-Mode Resistance4
10 10 kΩ
Bias Current Inputs grounded 500 500 nA
OUTPUT CHARACTERISTICS
Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V
V
S = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V
V
S = ±5 −4 +4 −4 +4 V
V
S = ±5, TA = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V
Short-Circuit Current Limit Sourcing 100 100 mA
Sinking 60 60 mA
POWER SUPPLY
Supply Current 2.3 2.6 2.3 2.6 mA
T
A = −40°C to +85°C 3.2 3.2 mA
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.
2 Includes input bias and offset errors.
3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the
section for details). Input Voltage Range
4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-
mode impedance at only one input is 2× the resistance listed.
AD8271
Rev. 0 | Page 4 of 20
VS = ±5 to ±15 V, VREF = 0 V, G = ½, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.
Table 3.
B Grade A Grade
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
Bandwidth 20 20 MHz
Slew Rate 30 30 V/μs
Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns
V
S = ±5, 5 V step on output 550 650 550 650 ns
Settling Time to 0.001% VS = ±15, 10 V step on output 750 900 750 900 ns
V
S = ±5, 5 V step on output 600 750 600 750 ns
NOISE/DISTORTION
Harmonic Distortion + Noise VS = ±15, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
74 74 dB
VS = ±5, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
101 101 dB
Voltage Noise1 f = 0.1 Hz to 10 Hz 2 2 μV p-p
f = 1 kHz 52 52 nV/√Hz
GAIN
Gain Error VOUT = 10 V p-p 0.04 0.08 %
Gain Drift TA = −40°C to +85°C 0.5 2 1 10 ppm/°C
Gain Nonlinearity VOUT = 10 V p-p,
RLOAD = 10 kΩ, 2 kΩ, 600 Ω
200 200 ppm
INPUT CHARACTERISTICS
Offset2
450 1000 450 1500 μV
Average Temperature Drift TA = −40°C to +85°C 3 3 μV/°C
Common-Mode Rejection Ratio DC to 1 kHz 74 86 70 86 dB
Power Supply Rejection Ratio 2 10 2 10 μV/V
Input Voltage Range3
−VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V
Common-Mode Resistance4
7.5 7.5 kΩ
Bias Current Inputs grounded 500 500 nA
OUTPUT CHARACTERISTICS
Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V
V
S = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V
V
S = ±5 −4 +4 −4 +4 V
V
S = ±5, TA = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V
Short-Circuit Current Limit Sourcing 100 100 mA
Sinking 60 60 mA
POWER SUPPLY
Supply Current 2.3 2.6 2.3 2.6 mA
T
A = −40°C to +85°C 3.2 3.2 mA
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.
2 Includes input bias and offset errors.
3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the
section for details). Input Voltage Range
4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-
mode impedance at only one input is 2× the resistance listed.
AD8271
Rev. 0 | Page 5 of 20
VS = ±5 to ±15 V, VREF = 0 V, G = 2, RLOAD = 2 kΩ, TA = 25°C, specifications referred to input (RTI), unless otherwise noted.
Table 4.
B Grade A Grade
Parameter Conditions Min Typ Max Min Typ Max Unit
DYNAMIC PERFORMANCE
Bandwidth 10 10 MHz
Slew Rate 30 30 V/μs
Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns
V
S = ±5, 5 V step on output 550 650 550 650 ns
Settling Time to 0.001% VS = ±15, 10 V step on output 750 900 750 900 ns
V
S = ±5, 5 V step on output 600 750 600 750 ns
NOISE/DISTORTION
Harmonic Distortion + Noise VS = ±15, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
86 86 dB
VS = ±5, f = 1 kHz,
VOUT = 10 V p-p, RLOAD = 600 Ω
112 112 dB
Voltage Noise1 f = 0.1 Hz to 10 Hz 1 1 μV p-p
f = 1 kHz 26 26 nV/√Hz
GAIN
Gain Error VOUT = 10 V p-p 0.04 0.08 %
Gain Drift TA = −40°C to +85°C 0.5 2 1 10 ppm/°C
Gain Nonlinearity VOUT = 10 V p-p,
RLOAD = 10 kΩ, 2 kΩ, 600 Ω
50 50 ppm
INPUT CHARACTERISTICS
Offset2
225 500 225 750 μV
Average Temperature Drift TA = −40°C to +85°C 1.5 1.5 μV/°C
Common-Mode Rejection Ratio DC to 1 kHz 84 98 78 98 dB
Power Supply Rejection Ratio 2 10 2 10 μV/V
Input Voltage Range3
−VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V
Common-Mode Resistance4
7.5 7.5 kΩ
Bias Current Inputs grounded 500 500 nA
OUTPUT CHARACTERISTICS
Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V
V
S = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V
V
S = ±5 −4 +4 −4 +4 V
V
S = ±5, TA = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V
Short-Circuit Current Limit Sourcing 100 100 mA
Sinking 60 60 mA
POWER SUPPLY
Supply Current 2.3 2.6 2.3 2.6 mA
T
A = −40°C to +85°C 3.2 3.2 mA
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.
2 Includes input bias and offset errors.
3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the
section for details). Input Voltage Range
4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common-
mode impedance at only one input is 2× the resistance listed.
AD8271
Rev. 0 | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Supply Voltage ±18 V
Output Short-Circuit Current See derating curve in
Figure 2
Input Voltage Range +VS + 0.4 V to
−VS − 0.4 V
Storage Temperature Range −65°C to +130°C
Specified Temperature Range −40°C to +85°C
Package Glass Transition Temperature (TG) 150°C
ESD
Human Body Model 1 kV
Charge Device Model 1 kV
Machine Model 0.1 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Table 6. Thermal Resistance
Package Type θJA θ
JC Unit
10-Lead MSOP 141.9 43.7 °C/W
The θJA values in Table 6 assume a 4-layer JEDEC standard
board with zero airflow.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8271 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric perfor-
mance of the amplifiers. Exceeding a temperature of 150°C for
an extended period of time can cause changes in silicon devices,
potentially resulting in a loss of functionality.
The AD8271 has built-in short-circuit protection that limits
the output current to approximately 100 mA (see Figure 22 for
more information). Although the short-circuit condition itself
does not damage the part, the heat generated by the condition
can cause the part to exceed its maximum junction temperature,
with corresponding negative effects on reliability.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
–50 –25 0 25 50 75 100 125
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATURE (C)
T
J
MAX = 150°C
07363-102
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
AD8271
Rev. 0 | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTION
1
2
3
4
5
10
9
8
7
6
AD8271
TOP VIEW
(Not to Scale)
07363-002
–V
S
P4
P3
P2
P1
+V
S
OUT
N1
N2
N3
Figure 3.
Table 7. Pin Function Descriptions
Pin No. Mnemonic Description
1 P1 Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.
2 P2 Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.
3 P3 Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin
is used as a reference voltage input in many configurations.
4 P4 Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin
is used as a reference voltage input in many configurations.
5 −VS Negative Supply.
6 +VS Positive Supply.
7 OUT Output.
8 N1 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.
9 N2 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.
10 N3 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.
AD8271
Rev. 0 | Page 8 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
180
150
120
90
60
30
0
–200 –100 0 100 200
07363-107
NUMBER OF UNI TS
CMMR (µV/V)
N = 98 9
MEAN = –29
SD = 43
Figure 4. Typical Distribution of CMRR, Gain = 1
180
150
120
90
60
30
0–1000 –500 0 500 1000
07363-108
NUMBER OF UNI T S
SYSTEM OFFSET VOLT AGE (µV)
N = 989
MEAN = – 306
SD = 229
Figure 5. Typical Distribution of System Offset, Gain = 1
240
180
120
210
150
90
60
30
0
–0.04 –0.02 0 0.02 0.04
07363-109
NUMBER OF UNI TS
GAI N ERROR (%)
N = 1006
MEAN = 0.003
SD = 0 .005
Figure 6. Typical Distribution of Gain Error, Gain = 1
–40
–30
–20
–10
0
10
20
30
40
50
60
70
–50 –30 –10 10 30 50 70 90 110 130
CMRR (μV/V)
TEMPERATURE (°C)
GAIN = 1
REPRESENTATIVE SAMPLES
07363-004
+0.6µV/V/°C
–0.1µV/V/°C
Figure 7. CMRR vs. Temperature, Normalized at 25°C, Gain = 1
–300
–200
–100
200
300
0
100
–50–30–101030507090110130
SYSTEM OFFSET VOL T AGE (μV)
TEMPERATURE (°C)
GAIN = 1
REPRESENTATIVE SAMPLES
07363-005
2.2µV/°C
2.8µV/°C
Figure 8. System Offset vs. Temperature, Normalized at 25°C,
Referred to Output, Gain = 1
–150
–100
–50
100
150
200
0
50
–50 –30 –10 10 30 50 70 90 110 130
GAI N E RROR (μV/V)
TEMPERATURE (°C)
GAIN = 1
REPRESENTATIVE SAMPLES
07363-006
1.7ppm/°C
0.5ppm/°C
Figure 9. Gain Error vs. Temperature, Normalized at 25°C, Gain = 1
AD8271
Rev. 0 | Page 9 of 20
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
20
15
10
5
0
–5
–10
–15
–20
–10 –5 0 5 10
OUT PUT VOL T AG E (V)
COMMON-MODE INPUT VOLTAGE (V)
(–7.5, +7.5) (+7.5, +7.5)
(–7. 5, –7.5) (+7.5, –7.5)
(0, +15)
(0, – 15)
07363-007
Figure 10. Common-Mode Input Voltage vs. Output Voltage,
Gain = ½, ±15 V Supplies
6
4
2
0
–2
–4
–6–3 –2 –1 0 1 2 3
OUT P UT VO LTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
(–1. 25, –1.25) (+1. 25, +1.25)
(–2. 5, +2.5) (+2. 5, +2. 5)
(–2. 5, –2.5) (+2. 5, –2. 5)
(–1. 25, –1.25) (+ 1.25, – 1.25)
(0, +2.5)
(0, –2.5)
(0, +5)
(0, –5)
VS = ±2.5 VS = ±5
0
7363-008
Figure 11. Common-Mode Input Voltage vs. Output Voltage,
Gain = ½, ±5 V and ±2.5 V Supplies
20
15
10
5
0
–5
–10
–15
–20
–20 –15 –10 –5 0 5 10 15 20
OUT PUT VOL T AG E (V)
COMM O N-M O DE I NPUT V O L T AG E (V)
(0, + 15)
(0, –15)
(–14. 3, +7.85) (+ 14.3, + 7.85)
(–14. 3, –7.85) ( + 14.3, –7. 85)
07363-009
Figure 12. Common-Mode Input Voltage vs. Output Voltage,
Gain =1, ±15 V Supplies
6
4
2
0
–2
–4
–6–5 –4 –3 –2 –1 0 1 2 3 4 5
OUT P UT VO LTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
(0, +5)
(0, –5)
(–4. 3, +2.85)
(+4.3, + 2.85)(–4. 3, +2.85)
(–4. 3, –2. 85) (+4. 3, –2.85)
(–1. 6, –1. 7) (+1. 6, –1. 7)
(–1.6 , +1.7) (+1.6, +1.7)
(0, +2.5)
(0, –2.5)
V
S
= ±2.5 V
S
= ±5
07363-010
Figure 13. Common-Mode Input Voltage vs. Output Voltage,
Gain = 1, ±5 V and ±2.5 V Supplies
20
15
10
5
0
–5
–10
–15
–20
–20 –15 –10 –5 0 5 10 15 20
OUTPUT VO L TAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
(0, +15)
(0, –15 )
(+14. 3, +11.4)
(+14.3, –11.4)(–14. 3, – 11.4)
(–14. 3 , + 11.4)
0
7363-011
Figure 14. Common-Mode Input Voltage vs. Output Voltage,
Gain = 2, ±15 V Supplies
6
4
2
0
–2
–4
–6–5 –4 –3 –2 –1 0 1 2 3 4 5
OUT P UT VO LTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
(0, +5)
(0, –5)
(–4, + 4) (+4, +4)
(–4, –4) (+4, –4)
(–1. 6, –2. 1) (+1.6, –2. 1)
(–1.6, +2.1) (+1.6, +2.1)
(0, +2.5)
(0, –2.5)
V
S
= ±2.5 V
S
= ±5
07363-012
Figure 15. Common-Mode Input Voltage vs. Output Voltage,
Gain = 2, ±5 V and ±2.5 V Supplies
AD8271
Rev. 0 | Page 10 of 20
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
10
5
0
–5
–10
–15
–20
100 1k 10k 100k 1M 10M 100M
FREQUENCY ( Hz)
GAIN (dB)
GAIN = ½
GAIN = 1
GAIN = 2
07363-018
Figure 16. Gain vs. Frequency
100
90
80
70
60
50
40
30
20
10
010 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
CMRR (d B)
GAIN = 2, ½
GAIN = 1
07363-019
Figure 17. CMRR vs. Frequency
32
28
24
20
16
12
8
4
0
100 1k 10k 100k 1M 10M
FREQUENCY ( Hz)
OUTPUT VOLTAGE SWING (V p-p)
VS = ±15V
VS = ±5V
07363-017
Figure 18. Output Voltage Swing vs. Large-Signal Frequency Response
140
120
100
80
60
40
20
010 100 1k 10k 100k 1M
FREQUENCY ( Hz)
POSITIVE PSRR (dB)
GAIN = 2, ½
GAIN = 1
07363-015
Figure 19. Positive PSRR vs. Frequency
140
120
100
80
60
40
20
010 100 1k 10k 100k 1M
FREQUENCY ( Hz)
NEGATIV E PSRR (dB)
GAIN = 2, ½
GAIN = 1
07363-016
Figure 20. Negative PSRR vs. Frequency
4
3
2
1
0
–1
–2
–3
–4
–10 –8 –6 –4 –2 0 2 4 861
NONL INEARITY (1ppm/DIV)
TEMPERATURE (°C) 0
10V p-p INPUT
GAIN = 1
R
LOAD
= 10kΩ, 2kΩ, 600Ω
07363-136
Figure 21. Gain Nonlinearity, Gain = 1
AD8271
Rev. 0 | Page 11 of 20
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
–100
–80
–60
40
80
120
–40
0
60
100
–20
20
–50 –30 –10 10 30 50 70 90 110 130
SHORT-CI RCUIT CURRENT (mA)
TEMPERATURE (°C)
07363-118
I
SHORT+
I
SHORT–
Figure 22. Short-Circuit Current vs. Temperature
+
V
S
+V
S
– 2
+V
S
– 4
0
–V
S
+ 4
–V
S
+ 2
–V
S
OUTPUT VOLTAGE SWING (V)
1k200 10k
R
LOAD
(Ω)
+85°C
+125°C
+25°C
+25°C
–40°C
–40°C +85°C
+125°C
07363-022
Figure 23. Output Voltage Swing vs. RLOAD
0 2040608010
–VS + 3
–VS
–VS + 6
+VS – 6
0
+
0
V
S
+VS – 3
–40°C
–40°C
+85°C
+125°C
+25°C
+25°C
CURRENT ( mA)
OUT P UT VO LTAGE S W ING ( V )
+85°C
+125°C
07363-023
Figure 24. Output Voltage Swing vs. Current (IOUT)
1µs/DIV
50mV/DI
V
0pF 18pF 100pF
V
S
= ±15V
07363-024
Figure 25. Small-Signal Step Response, Gain = ½
1µs/DIV
50mV/DI
V
0pF 33pF 220pF
V
S
= ±15V
07363-025
Figure 26. Small-Signal Step Response, Gain = 1
1µs/DIV
50ms/DI
V
0pF 100pF 470pF
V
S
= ±15V
07363-026
Figure 27. Small-Signal Step Response, Gain = 2
AD8271
Rev. 0 | Page 12 of 20
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
160
140
120
100
80
60
40
20
00 102030405060708090100
CAPACIT IVE L OAD (pF)
OVERSHOOT (%)
VS = ±15V
VS = ±18V
VS = ±10V
VS = ±5V
VS = ±2.5V
07363-030
Figure 28. Small-Signal Overshoot vs. Capacitive Load, Gain = ½
80
70
60
50
40
30
20
10
00 50 100 150 200
CAPACITIVE LOAD (p F)
OVERSHOOT (%)
V
S
= ±15V
V
S
= ±18V
V
S
= ±10V
V
S
= ±5V
V
S
= ±2.5V
07363-031
Figure 29. Small-Signal Overshoot vs. Capacitive Load, Gain = 1
80
70
60
50
40
30
20
10
0250 300 350 400 4500 50 100 150 200
CAPACITIVE LOAD (p F)
OVERSHOOT (%)
V
S
= ±15V
V
S
= ±18V
V
S
= ±10V
V
S
= ±5V
V
S
= ±2.5V
07363-132
Figure 30. Small-Signal Overshoot vs. Capacitive Load, Gain = 2
07363-127
GAIN = ½
2V/DI
V
1µs/DIV
Figure 31. Large-Signal Pulse Response, Gain = ½
07363-128
GAIN = 1
2V/DI
V
1µs/DIV
Figure 32. Large-Signal Pulse Response, Gain = 1
07363-129
GAIN = 2
2V/DI
V
1µs/DIV
Figure 33. Large-Signal Pulse Response, Gain = 2
AD8271
Rev. 0 | Page 13 of 20
VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted.
45
40
35
30
25
20
15
10
5
0
–45
OUT P UT SLEW RATE (V/µs)
TEMPERATURE (°C)
+SR
–SR
07363-130
–35
–25
–15
–5
5
15
25
35
45
55
65
75
85
95
105
115
125
Figure 34. Output Slew Rate vs. Temperature
1k
100
101 10 100 1k 10k 100k
FREQUENCY (Hz)
VOLTAGE NOISE SPECTRAL DENSITY (nV/√Hz)
GAIN = ½
GAIN = 1
GAIN = 2
07363-041
Figure 35. Voltage Noise Spectral Density vs. Frequency, Referred to Output
1µV/DIV 1s/DIV
GAIN = ½
GAIN = 1
GAIN = 2
07363-042
Figure 36. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output
0.1
0.01
0.001
0.000110 100 1k 10k 100k
07363-133
THD + N (%)
FREQUENCY (Hz )
R
LOAD
= 100kΩ
R
LOAD
= 2kΩ
R
LOAD
= 600Ω
GAIN = 1
GAIN = 2
GAIN = ½
Figure 37. THD + N vs. Frequency
1
0.1
0.01
0.001
0.0001 0255
THDN + N ( %)
10 15 20
OUT P UT AMPLITUDE (dBu )
0
7363-134
GAIN = 1
f = 1kHz RLOAD = 600Ω
RLOAD = 2kΩ
RLOAD = 100kΩ
Figure 38. THD + N vs. Output Amplitude, Gain = 1
10 100 1k 10k 100k
FREQUENCY (Hz)
0.1
0.01
0.001
0.0001
0.00001
AMPLIT UDE (% O F FUNDAMENTAL)
07363-135
GAIN = 1
V
OUT
= 10V p-p
HD2, R
LOAD
= 100kΩ
HD2, R
LOAD
= 2kΩ
HD2, R
LOAD
= 600Ω
HD3, R
LOAD
= 100kΩ
HD3, R
LOAD
= 2kΩ
HD3, R
LOAD
= 600Ω
Figure 39. Harmonic Distortion Products vs. Frequency, Gain = 1
AD8271
Rev. 0 | Page 14 of 20
OPERATIONAL AMPLIFIER PLOTS
VS = ±15 V, TA = 25°C, unless otherwise noted.
012345678910
TIME (sec)
OFFSET (10µV/DIV)
07363-044
Figure 40. Change in Op Amp Offset Voltage vs. Warm-Up Time
50pA/DIV 1s/DIV
07363-028
Figure 41. 0.1 Hz to 10 Hz Current Noise
10
1
0.11 10 100 1k 10k 100k
FREQUENCY ( Hz )
CURRENT NO ISE SP ECTRAL DE NS ITY (p A/√Hz)
0
7363-029
Figure 42. Current Noise Spectral Density vs. Frequency
AD8271
Rev. 0 | Page 15 of 20
THEORY OF OPERATION
1
7
6
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
–V
S
P4
P3
P2
P1
+V
S
OUT
N1
N2
N3
07363-032
10
9
8
2
3
4
5
Figure 43. Functional Block Diagram
CIRCUIT INFORMATION
The AD8271 consists of a high precision, low distortion op amp
and seven trimmed resistors. These resistors can be connected
to create a wide variety of amplifier configurations, including
difference, noninverting, and inverting configurations. The
resistors on the chip can be connected in parallel for a wider range
of options. Using the on-chip resistors of the AD8271 provides
the designer with several advantages over a discrete design.
DC Performance
Much of the dc performance of op amp circuits depends on the
accuracy of the surrounding resistors. The resistors on the AD8271
are laid out to be tightly matched. The resistors of each part are
laser trimmed and tested for their matching accuracy. Because
of this trimming and testing, the AD8271 can guarantee high
accuracy for specifications, such as gain drift, common-mode
rejection, and gain error.
AC Performance
Because feature size is much smaller in an integrated circuit than
on a printed circuit board (PCB), the corresponding parasitics are
also smaller. The smaller feature size helps the ac performance of
the AD8271. For example, the positive and negative input terminals
of the AD8271 op amp are not pinned out intentionally. By not
connecting these nodes to the traces on the PCB, the capacitance
remains low, resulting in both improved loop stability and
common-mode rejection over frequency.
Production Costs
Because one part, rather than several discrete components, is
placed on the PCB, the board can be built more quickly and
efficiently.
Size
The AD8271 fits an op amp and seven resistors in one MSOP
package.
DRIVING THE AD8271
The AD8271 is easy to drive, with all configurations presenting
at least several kilohms (kΩ) of input resistance. The AD8271
should be driven with a low impedance source: for example,
another amplifier. The gain accuracy and common-mode rejection
of the AD8271 depend on the matching of its resistors. Even
source resistance of a few ohms can have a substantial effect on
these specifications.
POWER SUPPLIES
A stable dc voltage should be used to power the AD8271. Noise
on the supply pins can adversely affect performance. A bypass
capacitor of 0.1 µF should be placed between each supply pin
and ground, as close as possible to each supply pin. A tantalum
capacitor of 10 µF should also be used between each supply and
ground. It can be farther away from the supply pins and, typically,
it can be shared by other precision integrated circuits.
The AD8271 is specified at ±15 V and ±5 V, but it can be used with
unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V.
The difference between the two supplies must be kept below 36 V.
INPUT VOLTAGE RANGE
The AD8271 has a true rail-to-rail input range for the majority
of applications. Because most AD8271 configurations divide down
the voltage before they reach the internal op amp, the op amp sees
only a fraction of the input voltage. Figure 44 shows an example
of how the voltage division works in the difference amplifier
configuration.
07363-033
R4
R3
R1
R2
R2
R1 + R2 (V
+IN
)
R2
R1 + R2 (V
+IN
)
Figure 44. Voltage Division in the Difference Amplifier Configuration
The internal op amp voltage range may be relevant in the
following applications, and calculating the voltage at the
internal op amp is advised.
• Difference amplifier configurations using supply voltages
of less than ±4.5 V
• Difference amplifier configurations with a reference
voltage near the rail
• Single-ended amplifier configurations
For correct operation, the input voltages at the internal op amp
must stay within 1.5 V of either supply rail.
Voltages beyond the supply rails should not be applied to the
part. The part contains ESD diodes at the input pins, which
conduct if voltages beyond the rails are applied. Currents greater
than 5 mA may damage these diodes and the part. For a similar
part that can operate with voltages beyond the rails, see the
AD8274 data sheet.
AD8271
Rev. 0 | Page 16 of 20
APPLICATIONS INFORMATION
The resistors and connections provided on the AD8271 offer
abundant versatility through the variety of configurations that
are possible.
DIFFERENCE AMPLIFIER CONFIGURATIONS
The AD8271 can be placed in difference amplifier configurations
with gains of ½, 1, and 2. Figure 45 through Figure 47 show
sample difference amplifier configurations referenced to ground.
=
07363-053
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
+IN
GND OUT
OUT
N1
N2
N3
10
9
8
2
3
4
–IN
–IN
+IN
5kΩ
5kΩ
10kΩ
10kΩ
GND
Figure 45. Gain = ½ Difference Amplifier, Referenced to Ground
=–IN
+IN
10kΩ
10kΩ
10kΩ
10kΩ
GND
07363-054
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
+IN
NC NC
GND OUT
OUT
N1
N2
N3
10
9
8
2
3
4
–IN
Figure 46. Gain = 1 Difference Amplifier, Referenced to Ground
=–IN
+IN
10kΩ
5kΩ
5kΩ
10kΩ
GND
07363-055
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
OUT
OUT
N1
N2
N3
10
9
8
2
3
4
–IN
GND
+IN
OUT
Figure 47. Gain = 2 Difference Amplifier, Referenced to Ground
The AD8271 can also be referred to a combination of reference
voltages. For example, the reference can be set at 2.5 V, using
just 5 V and GND. Some of the possible configurations are
shown in Figure 48 through Figure 50. Note that the output
is not internally tied to a feedback path, so any of the 10 k
resistors on the inverting input can be used in the feedback
network. This flexibility allows for more efficient board lay-
out options.
+V
S
+ –V
S
2
–IN
=+IN
5kΩ
5kΩ
10kΩ
10kΩ
07363-056
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
+IN
–V
S
+V
S
OUT
OUT
N1
N2
N3
10
9
8
2
3
4
–IN
Figure 48. Gain = ½ Difference Amplifier, Referenced to Midsupply
=–IN
+IN
10kΩ
10kΩ
10kΩ
10kΩ
+VS + –VS
2
07363-057
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
+IN
NC NC
OUT
OUT
N1
N2
N3
10
9
8
2
3
4
–IN
–VS
+VS
Figure 49. Gain = 1 Difference Amplifier, Referenced to Midsupply
=–IN
+IN
10kΩ
5kΩ
5kΩ
10kΩ
+V
S
+ –V
S
2
07363-058
1
7
10kΩ
AD8271
10kΩ
10kΩ
10kΩ
20kΩ
20kΩ
10kΩ
P4
P3
P2
P1
+IN
–V
S
+
V
S
OUT
OUT
N1
N2
N3
10
9
8
2
3
4
+IN
Figure 50. Gain = 2 Difference Amplifier, Referenced to Midsupply
Table 8. Pin Connections for Difference Amplifier Configurations
Configuration
Gain and Reference
Pin 1
(P1)
Pin 2
(P2)
Pin 3
(P3)
Pin 4
(P4)
Pin 8
(N1)
Pin 9
(N2)
Pin 10
(N3)
Gain of ½, Referenced to Ground +IN GND GND GND OUT OUT −IN
Gain of ½, Referenced to Midsupply +IN −VS +VS +VS OUT
OUT −IN
Gain of 1, Referenced to Ground +IN NC GND GND OUT NC −IN
Gain of 1, Referenced to Midsupply +IN NC −VS +VS OUT
NC −IN
Gain of 2, Referenced to Ground +IN +IN GND GND OUT −IN −IN
Gain of 2, Referenced to Midsupply +IN +IN −VS +VS OUT
−IN −IN
AD8271
Rev. 0 | Page 17 of 20
SINGLE-ENDED CONFIGURATIONS
The AD8271 can be configured for a wide variety of single-ended configurations with gains ranging from −2 to +3 (see Table 9).
Table 9. Selected Single-Ended Configurations
Electrical Performance Configuration
Signal Gain Op Amp Closed-Loop Gain Input Resistance Pin 101Pin 91
Pin 81Pin 12Pin 22Pin 33Pin 43
−2 3 5 kΩ IN IN
OUT GND GND GND GND
−1.5 3 4.8 kΩ IN IN
OUT GND GND GND IN
−1.4 3 5 kΩ IN IN
OUT GND GND NC IN
−1.25 3 5.333 kΩ IN IN
OUT GND NC GND IN
−1 3 5 kΩ IN IN
OUT GND GND IN IN
−0.8 3 5.556 kΩ IN IN
OUT IN GND NC GND
−0.667 2 8 kΩ IN NC
OUT GND GND GND IN
−0.6 2 8.333 kΩ IN NC
OUT GND GND NC IN
−0.5 2 8.889 kΩ IN NC
OUT GND NC GND IN
−0.333 2 7.5 kΩ IN NC
OUT GND GND IN IN
−0.25 1.5 8 kΩ OUT IN
OUT GND GND GND IN
−0.2 1.5 8.333 kΩ OUT IN
OUT GND GND NC IN
−0.125 1.5 8.889 kΩ OUT IN
OUT GND NC GND IN
+0.1 1.5 8.333 kΩ OUT IN
OUT IN GND NC GND
+0.2 2 10 kΩ IN NC
OUT GND IN NC IN
+0.25 1.5 24 kΩ OUT GND
OUT GND GND GND IN
+0.3 1.5 25 kΩ OUT GND
OUT GND GND NC IN
+0.333 2 24 kΩ GND NC
OUT GND GND GND IN
+0.375 1.5 26.67 kΩ OUT GND
OUT GND NC GND IN
+0.4 2 25 kΩ GND NC
OUT GND GND NC IN
+0.5 3 24 kΩ GND GND
OUT GND GND GND IN
+0.5 1.5 15 kΩ OUT GND
OUT GND GND IN IN
+0.6 3 25 kΩ GND GND
OUT GND GND NC IN
+0.6 1.5 16.67 kΩ OUT GND
OUT IN GND NC GND
+0.625 1.5 16 kΩ OUT IN
OUT NC IN IN GND
+0.667 2 15 kΩ GND NC
OUT GND GND IN IN
+0.7 1.5 16.67 kΩ OUT IN
OUT IN IN NC GND
+0.75 3 26.67 kΩ GND GND
OUT GND NC GND IN
+0.75 1.5 13.33 kΩ OUT GND
OUT GND IN GND IN
+0.8 2 16.67 kΩ GND NC
OUT IN GND NC GND
+0.9 1.5 16.67 kΩ OUT GND
OUT GND IN NC IN
+1 1.5 15 kΩ OUT GND
OUT IN IN GND GND
+1 1.5 >1 GΩ OUT IN
OUT IN IN IN IN
+1 3 >1 GΩ IN IN
OUT IN IN IN IN
+1.125 1.5 26.67 kΩ OUT GND
OUT NC IN IN GND
+1.2 3 16.67 kΩ GND GND
OUT IN GND NC GND
+1.2 1.5 25 kΩ OUT GND
OUT IN IN NC GND
+1.25 1.5 24 kΩ OUT GND
OUT IN IN IN GND
+1.333 2 15 kΩ GND NC
OUT IN IN GND GND
+1.5 3 13.33 kΩ GND GND
OUT GND IN GND IN
+1.5 1.5 >1 GΩ OUT GND
OUT IN IN IN IN
+1.6 2 25 kΩ GND NC
OUT IN IN NC GND
+1.667 2 24 kΩ GND NC
OUT IN IN IN GND
+1.8 3 16.67 kΩ GND GND
OUT GND IN NC IN
+2 2 >1 GΩ GND NC
OUT IN IN IN IN
+2.25 3 26.67 kΩ GND GND
OUT NC IN IN GND
+2.4 3 25 kΩ GND GND
OUT IN IN NC GND
+2.5 3 24 kΩ GND GND
OUT IN IN IN GND
+3 3 >1 GΩ GND GND
OUT IN IN IN IN
1 A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp.
2 A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp.
3 A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp.
AD8271
Rev. 0 | Page 18 of 20
Many signal gains have more than one configuration choice, which
allows freedom in choosing the op amp closed-loop gain. In
general, for designs that need to be stable with a large capacitive
load on the output, choose a configuration with high loop gain.
Otherwise, choose a configuration with low loop gain, because
these configurations typically have lower noise, lower offset,
and higher bandwidth.
The AD8271 Specifications section and Typical Performance
Characteristics section show the performance of the part primarily
when it is in the difference amplifier configuration. To estimate
the performance of the part in a single-ended configuration, refer
to the difference amplifier configuration with the corresponding
closed-loop gain (see Table 10).
Table 10. Closed-Loop Gain of the Difference Amplifiers
Difference Amplifier Gain Closed-Loop Gain
0.5 1.5
1 2
2 3
Gain of 1 Configuration
The AD8271 is designed to be stable for loop gains of 1.5 and
greater. Because a typical voltage follower configuration has
a loop gain of 1, it may be unstable. Several stable configurations
for gain of 1 are listed in Table 9.
KELVIN MEASUREMENT
In the case where the output load is located remotely or at
a distance from the AD8271, as shown in Figure 51, wire
resistance can actually cause significant errors at the load.
07363-149
–IN 10kΩ
10k
Ω
10kΩ
10kΩ
+IN
R
W
(WIRE RE SISTANCE)
R
L
1kΩ
Figure 51. Wire Resistance Causes Errors at Load Voltage
Since the output of the AD8271 is not internally tied to any of
the feedback resistors, Kelvin type measurements are possible
because the op amp output and feedback can both be connected
closer to the load (Figure 52). The Kelvin sensing on the feedback
minimizes error at the load caused by voltage drops across the
wire resistance. This technique is most effective in reducing errors
for loads less than 10 k. As the load resistance increases, the
error due to the wire resistance becomes less significant.
Because it adds the sense wire resistance to the feedback resistor, a
trade-off of the Kelvin connection is that it can degrade common-
mode rejection, especially over temperature. For sense wire
resistance less than 1 , it is typically not an issue. If common-
mode performance is critical, two amplifier stages can be used:
the first stage removes common-mode interference, and the
second stage performs the Kelvin drive.
10kΩR
w
R
w
SENSE
FORCE
07363-150
–IN 10kΩ
10kΩ
10kΩ
+IN
R
L
1kΩ
Figure 52. Connecting Both the Output and Feedback at the Load Minimizes
Error Due to Wire Resistance
INSTRUMENTATION AMPLIFIER
The AD8271 can be used as a building block for high performance
instrumentation amplifiers. For example, Figure 53 shows how
to build an ultralow noise instrumentation amplifier using the
AD8599 dual op amp. External resistors RG and RFx provide gain;
therefore, the output is
()
()
8271
2
1AD
G
Fx
ININ
OUT G
R
R
VVV ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛+−= −+
–IN
+IN
10kΩ
10kΩ
10kΩ
10kΩ
REF
AD8599
A2
A
D8599
A2
R
G
20Ω
R
F1
R
F2
2kΩ
AD8271
OUT
2kΩ
V
S
= ±15V
07363-153
Figure 53.Ultralow Noise Instrumentation Amplifier Using AD8599
Configured for Gain = 201
For optimal noise performance, it is desirable to have a high
gain at the input stage using low value gain-setting resistors, as
shown in this particular example. With less than 2 nV/√Hz
input-referred noise (see Figure 54) at ~10 mA supply current,
the AD8271 and AD8599 combination offers an in-amp with a
fine balance of critical specifications: a gain bandwidth product
of 10 MHz, low bias current, low offset drift, high CMRR, and
high slew rate.
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
1 10 100 1k 10k 100k
VOLT AGE NO ISE S P ECTRAL DENSITY (nV/√Hz)
FREQUENCY ( Hz)
07363-151
G = 201
BANDWIDTH
LIMIT
Figure 54. Ultralow Noise In-Amp Voltage Noise Spectral Density vs.
Frequency, Referred to Input
AD8271
Rev. 0 | Page 19 of 20
DRIVING CABLING DRIVING AN ADC
Because the AD8271 can drive large voltages at high output
currents and slew rates, it makes an excellent cable driver. It is
good practice to put a small value resistor between the AD8271
output and cable, since capacitance in the cable can cause peaking
or instability in the output response. A resistance of 20 or higher
is recommended.
The AD271 high slew rate and drive capability, combined with
its dc accuracy, make it a good ADC driver. The AD8271 can
drive single-ended input ADCs. Many converters require the
output to be buffered with a small value resistor combined with
a high quality ceramic capacitor. See the relevant converter data
sheet for more details.
AD8271
(SINGLE OUT )
07363-148
Figure 55. Driving Cabling
AD8271
Rev. 0 | Page 20 of 20
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-BA
0.23
0.08
0.80
0.60
0.40
8°
0°
0.15
0.05 0.33
0.17
0.95
0.85
0.75
SEATING
PLANE
1.10 MAX
10 6
5
1
0.50 BSC
PIN 1
COPLANARITY
0.10
3.10
3.00
2.90
3.10
3.00
2.90
5.15
4.90
4.65
Figure 56. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions are shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
AD8271ARMZ1
−40°C to +85°C 10-Lead MSOP RM-10 Y1E
AD8271ARMZ-R71
−40°C to +85°C 10-Lead MSOP, 7” Tape and Reel RM-10 Y1E
AD8271ARMZ-RL1
−40°C to +85°C 10-Lead MSOP, 13” Tape and Reel RM-10 Y1E
AD8271BRMZ1
−40°C to +85°C 10-Lead MSOP RM-10 Y1G
AD8271BRMZ-R71
−40°C to +85°C 10-Lead MSOP, 7” Tape and Reel RM-10 Y1G
AD8271BRMZ-RL1
−40°C to +85°C 10-Lead MSOP, 13” Tape and Reel RM-10 Y1G
1 Z = RoHS Compliant Part.
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07363-0-1/09(0)
