S eptem ber 20 02 1/15
VIPer12ADIP
VIPer12AS
LOW POWER OFF LINE SMPS PRIMARY SWITCHER
®
TYPICAL POWER CAPABILITY
n
FIXED 60 KHZ SWITCHING FREQUENCY
n
9V T O 38V WIDE RANGE VDD VOLTAGE
n
CURRENT MODE CONTROL
n
AUXILIARY UNDERVOLTAGE L OCKOUT
WITH HYSTERESIS
n
HIGH VO LTAGE START UP CURRENT
SOURCE
n
OVERTEMPERATURE, OVERCURRENT AND
OVERVOLTAGE PROTECTION WITH
AUTORESTART
DESCRIPTION
The VIPer12A combines a dedicated current mode
PWM controller with a high voltage Power
MOSFET on the same silicon chip. Typical
applications cover off line power supplies for
battery charg er adapter s, stan dby pow er suppli es
for TV or monitors, auxiliary supplies for motor
control, etc. The internal control circuit offers the
following benefits:
– Large input voltage range on the VDD pin
accommodates changes in auxiliary supply
voltage. This feature is well adapted to battery
charger adapter configurations.
– Automatic burst mode in low load condition.
– Overvoltage protecti on in hiccup mode.
Ma ins ty pe SO-8 D IP8
European
(195 - 265 Vac) 8 W 13 W
US / Wide range
(85 - 265 Vac) 5 W 8 W ORDE R CODES
PACKAGE TUBE T&R
SO-8 VIPer12AS VIPer12AS13TR
DIP-8 VIPer12ADIP
SO-8 DIP-8
BLO C K DIAG RA M
ON/OFF
0.23 V
DRAIN
SOURCE
VDD
PWM
LATCH
60kHz
OSCILLATOR
BLANKING +
_
8/14.5V
_
+
FF
S
R1 R4
Q
R3
FB
REGULATOR
INTERNAL
SUPPLY
OVERVOLTAGE
LATCH
OVERTEMP.
DETECTOR
1 kΩ
42V _
+
R2
FF
SRQ
230Ω
VIPer12ADIP / VIPe r12AS
2/15
PIN FUNCTIO N
CURRENT AND VOLTAGE CONVENTIONS
CONNECTION DIAGRAM
Name Function
VDD
Power supply of the control circuits. Also provides a charging current during start up thanks to a high
voltage current sourc e conne cted to the drain. For this purpose, an hys teresis com parator mo nitors the
VDD vol tage and pro vides two t hreshold s:
- VDDon: Voltage value (typically 14.5V) at which the device starts switch ing and turns off the start up
current so urce.
- VDDoff: Voltage value (typically 8V) at which the device stops switching and turns on the start up current
source.
SOURCE Power MOSFET source and circuit ground reference.
DRAIN Po wer MOSFET drain . Al so us ed by the interna l high voltag e cur rent source dur ing start up phase for
charging the exte rnal VDD c apacitor.
FB Feedback input. Th e usef ul voltage range ext ends from 0V t o 1V, and def ines the peak dra in MOSFET
current. The current limitation, which corresponds to the maximum drain current, is o btained for a FB pin
shorted t o the SO URCE pin.
IDD ID
IFB
VDD
VFB
VD
FB
VDD DRAIN
SOURCE
CONTROL
VIPer12A
1
2
3
4
DRAIN
DRAIN
DRAIN
DRAIN
8
7
6
5
DRAIN
DRAIN
DRAIN
DRAIN
1
2
3
4
8
7
6
5
FB
VDD
SOURCE
FB
VDD
SOURCE
SOURCE SOURCE
SO-8 DIP8
VIPer12ADIP / VIPer12AS
3/15
ABSOLUTE MAXIMUM RAT INGS
Note: 1. This parameter applies when the start up current source is off. This is the case when the VDD voltage has reached VDDon and
remains above VDDoff.
2. This parameter applies when the start up c ur r ent source is on. This is the case when the VDD voltage has not yet reached VDDon
or ha s fallen below VDDoff.
THERMAL DATA
Note: 1. When mounted on a standard sing le-sided FR4 board with 200 mm² of Cu (at least 35 µm thick) connected to all DRAIN pins.
ELECTRICAL CHARACTERISTICS (Tj=25°C , V DD=18V, unless otherwise specified)
POWER SECTION
Note: 1. On clam ped induct iv e load
Symbol Parameter Value Unit
VDS(sw) Switching Drain Source Volta ge (Tj=25 ... 1 25°C) (See note 1) -0.3 ... 730 V
VDS(st) Start Up Drain Source Voltag e (Tj= 25 ... 125°C) (See note 2) -0.3 ... 400 V
IDContinuous Drain Current Internally lim ited A
VDD S up p ly Voltag e 0 ... 50 V
IFB Feedbac k Current 3 mA
VESD Electrostatic Discharge:
Machine Mod el (R=0Ω; C=200pF)
Charged D evice Model 200
1.5 V
kV
TjJunction Operating Temperature Internally limited °C
TcCase Operat ing Temperature -40 to 150 °C
Tstg Storage Temper ature -55 to 150 °C
Symb ol Parameter Max Value Unit
Rthj-case Therm al Resistance Ju nction-P ins for:
SO-8
DIP8 25
15 °C/W
Rthj-amb Ther m al Resistance Ju nction-Am bie nt for:
SO-8 (See note 1)
DIP8 (See note 1) 55
45 °C/W
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVDSS Drain-Source Voltage ID=1 m A; VFB=2V 730 V
IDSS Off State Drain Current VDS=500V; VFB=2V; Tj=125°C 0.1 mA
RDSon St atic Drain-Source
On Stat e Resistance ID=0.2A
ID=0 .2A; Tj=100°C 27 30
54 Ω
tf Fall Time ID=0.1A; VIN=300V (See fig.1)
(See note 1) 100 ns
tr Rise Time ID=0.2A; VIN=300V (See fig.1)
(See note 1) 50 ns
Coss Drain Capacitance VDS=25V 40 pF
VIPer12ADIP / VIPe r12AS
4/15
ELECTRICAL CHARACTERISTICS (Tj=25°C , V DD=18V, unless otherwise specified)
SUPPLY SEC TI ON
Note: 1. These test cond ition s obtained with a resistive load are lead ing to the max imum cond uc tion time of the device.
OSCILLATOR SECTION
PWM COMPARATOR SECTION
OVERTEMPERATURE SE CTION
Symbol Parameter Test Conditions Min. Typ. Max. Unit
IDDch Sta rt Up Ch arging
Current VDS=100V; VDD=5V ...VDDon (See fig. 2) -1 mA
IDDoff Start Up Ch arging
Current
in Thermal Shutdown
VDD=5V; VDS=100V
Tj > TSD - THYST 0mA
I
DD0 Op er at ing Su pply Cu rrent
Not Switching IFB=2mA 35mA
I
DD1 Op er at ing Su pply Cu rrent
Switching IFB=0.5m A; I D=50mA (Note 1) 4.5 mA
DRST Restart Duty Cycle (See fig. 3) 16 %
VDDoff VDD Undervoltage
Shu tdow n Th re sh old (See fig. 2 & 3) 7 8 9 V
VDDon VDD Start Up Threshold (See fig. 2 & 3) 13 14.5 16 V
VDDhyst VDD Threshold
Hysteresis (See fig. 2) 5.8 6 .5 7.2 V
VDDovp VDD O ver voltage
Threshold 38 42 46 V
Symbol Parameter Test Conditions Min. Typ. Max. Unit
FOSC Oscillator Frequency
Total Variation VDD=VDDoff ... 35V; Tj=0 ... 100°C 54 60 66 kHz
Symbol Parameter Test Conditions Min. Typ. Max. Unit
GID IFB to ID Current Gain (See fig. 4) 320
IDlim Peak Current Limitation VFB=0V (See fig. 4) 0.32 0.4 0.48 A
IFBsd IFB Shutdown Current (See fig. 4) 0.9 mA
RFB FB Pin Input Impedance ID=0mA (See fig. 4) 1.2 kΩ
tdCurrent Sense Delay to
Turn-Off ID=0.2A 200 ns
tbBlanking Time 500 ns
tONmin Minimum Turn On Time 700 ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
TSD Thermal Shutdown
Temperature ( See fig. 5) 140 170 °C
THYST Th ermal Shutdown
Hysteresis (See fig. 5) 40 °C
VIPer12ADIP / VIPer12AS
5/15
Figure 1 : Rise and Fall Time
Figure 2 : Start Up VDD Current
Figure 3 : Restart Duty Cycle
ID
VDS
90%
10%
tfv trv
t
t
L D
300V
C
FB
VDD DRAIN
SOURCE
CONTROL
VIPer12A
C << Coss
VDD
VDDhyst
VDDoff VDDon
IDD0
IDDch VDS = 100 V
Fsw = 0 kHz
IDD
t
VDD
VDDoff
VDDon
tCH tST
DRST
tST
tST tCH
+
-------------------------=
100V
10µFFB
VDD DRAIN
SOURCE
CONTROL
VIPer12A
2V
VIPer12ADIP / VIPe r12AS
6/15
Figure 4 : Peak Drain Current Vs. Feedback Current
Figure 5 : Thermal Shutdown
IFB
4mH
100V
100V
18V FB
VDD DRAIN
SOURCE
CONTROL
VIPer12A
47nF
GID
IDpeak
∆
IFB
∆
-----------------------–=
ID
IDpeak
t
1/FOSC
IFB
IDpeak
IDlim
IFB
IFBsd RFB
⋅
VFB
The drain current limitation is
obtained for VFB = 0 V, and a
negative current is drawn from
the FB pin. See the Application
se ction for furt her details.
0IFBsd
t
t
VDD
Tj
VDDon
TSD THYST
Automatic
star t up
VIPer12ADIP / VIPer12AS
7/15
Figure 6 : Sw itc hing Fre quenc y vs Tempera ture
Figure 7 : Current Limitation vs Temperature
-20 0 20 40 60 80 100 120
Temperature (°C)
0.97
0.98
0.99
1
1.01
Normalized Frequency
Vdd = 10V ... 35V
-20 0 20 40 60 80 100 120
Temperature (°C)
0.94
0.95
0.96
0.97
0.98
0.99
1
1.01
1.02
1.03
1.04
Normalized Current Limit at i on
Vin = 100V
Vdd = 20V
VIPer12ADIP / VIPe r12AS
8/15
Figure 8 : Rectangular U-I output characteristics for battery charger
RECTANGULAR U-I OUTPU T
CHARACTERISTIC
A complete regulation scheme can achieve
combined and accurate output characteristics.
Figure 8 presents a secondary feedback through
an optocoupler driven by a TSM101. This device
offers two operational amplifiers and a voltage
reference, thus allowing the regulation of both
output voltage and current. An integrated OR
function performs the combination of the two
resulting error signals, leading to a dual voltage
and current limitation, known as a rectangular
output c hara cteri stic .
This type of power supply is especially useful for
battery chargers where the output is mainly used in
current mode, in order to deliver a defined charging
rate. The accurate voltage regulation is also
convenient for Li-ion batteries which require both
modes of operation.
WIDE RANGE OF VDD VOLTAGE
The VDD pin voltage range extends from 9V to 38V.
This feature offers a great flexibility in design to
achieve various behaviors. In figure 8 a forward
configuration has been chosen to supply the
devi ce with two benefits:
– as soon as the device starts switching, it
immediately receives some energy from the
auxiliary winding. C5 can be therefore reduced
and a small ceramic chip (100 nF) is sufficient to
insure the filtering function. The total start up
time from the switch on of input voltage to output
voltage presence is dramati cally decreased.
– the output current characteristic can be
maintained even with very low or zero output
voltage. Since the TSM101 is also supplied in
forward mode, it keeps the current regulation up
whatever the output voltage is.The VDD pin
voltage may vary as m uch a s the i npu t vol tag e,
that is to say with a ratio of about 4 for a wide
range application.
T1
D3
C5
C4
-+
D4
C3
T2
F1
C1
C10 -
+-
+
Vref
Vcc
GND
U2
TSM101
R6
R9
R10
R4
C9
R7
R5
R8
C8
R3
ISO1
D2
D5
R2
C7
R1 C2 D1
FB
VDD DRAIN
SOURCE
CONTROL
U1
VIPerX2A
C6
AC IN
DCOUT
GND
VIPer12ADIP / VIPer12AS
9/15
FEEDBACK PIN PRINCIPLE OF OPERA TION
A feedback pin controls the operation of the
device. Unlike conventional PWM control circuits
which use a vo ltage inpu t (the i nve rted input of an
operational amplifier), the FB pin is sensitive to
current. Figure 9 presents the internal current
mode structure.
The Power MOSFET delivers a sense current Is
which is proportional to the main current Id. R2
receives this current and the curr ent coming from
the FB pin. The voltage across R2 is then
compared to a fixed reference voltage of about
0.23 V. The MOSFET is switched off when the
following equation is reached:
By extracting IS:
Using the current sense ratio of the MOSFET GID :
The current limitation is obtained with the FB pin
shorted to ground (VFB = 0 V). This leads to a
negative current sourced by this pin, and
expressed by:
By reporting this expression in the previous one, it
is possible to obtain the drain current limitation
IDlim:
In a real application, the FB pin is driven with an
optoc oup ler as sho wn on figu re 9 which acts as a
pull up. So, it is not possible to really short this pin
to ground and the above drain current value is not
achievable. Nevertheless, the capacitor C is
averaging the voltage on the FB pin, and when the
optocoupler is off (start up or short circuit), it can be
assumed that the corresponding voltage is very
close to 0 V.
For low dr ain currents, the formula (1) is valid as
long as IFB satisfies IFB< IFBsd, where IFBsd is an
internal threshold of the VIPer12A. If IFB exce eds
this thresh old th e device will stop swit ching. This is
represented on figure 4, and IFBsd value is
specified in the PWM COMPARATOR SECTION.
Actually, as soon as the drain current is about 12%
of Idlim, that is to say 50 mA, the device will enter
a burst mode operation by missing switching
cycles. This is especially important when the
converter is lightly loaded.
It is then possible to build the total DC transfer
function between ID and IFB as shown on figure 10.
This figure also takes into account the internal
blan king time and its associated mi nimum turn on
time. This imposes a minimum drain current under
which the device is no more able to control it in a
linear way. This drain current depends on the
primary inductance value of the transformer and
the input voltage. Two cases may occur,
depending on the value of this current versus the
fixed 50 mA value, as described above.
START UP SEQU ENCE
This device includes a high voltage start up current
source connected on the drain of the device. As
soon as a voltage is applied on the input of the
con verter, this s tart up cur rent source is activated
as long as VDD is lower than VDDon. When
reaching VDDon, the start up current source is
switched off and the device begins to operate by
turning on and off its main power MOSFET. As the
FB pin does not receive any current from the
optocoupler, the device operates at full current
capacity and the output voltage rises until reaching
Fi
gure
9
:
I
nterna
l
C
urrent
C
ontro
l
S
tructure
60kHz
OSCILLATOR
PWM
LATCH
S
Q
R
0.23V
Id
DRAIN
SOURCE
FB R1
R2
C
+Vdd
Secondary
feedback
IFB Is
1 kΩ
230 Ω
R2ISIFB
+()⋅ 0.23V=
IS0.23V
R2
-------------- IFB
–=
IDGID IS
⋅GID 0.23V
R2
-------------- IFB
–
⋅==
I
FB 0.23V
R1
--------------–=
I
Dlim GID 0.23V1
R2
------ 1
R1
------+
⋅⋅=
Fi
gure
10
:
I
FB
T
rans
f
er
f
unct
i
on
I
FBsd
I
Dlim
IFB
tONmin V2
⋅IN
L
---------------------------------------
tONmin V1
⋅IN
L
---------------------------------------
50mA
IDpeak
0
Part masked by the
IFBsd threshold
VIPer12ADIP / VIPe r12AS
10/15
the regulation point where the secondary loop
begins to send a current in the optocoupler. At this
point, the converter enters a regulated operation
where the FB pin receives the amount of current
needed to deliver the right power on secondary
side.
This sequence is shown in figure 11. Note that
during the real starting phase tss, the device
consumes some energy from the VDD capacitor,
waiting for the auxiliary winding to provide a
co ntinuous supp ly. If th e value of this capa citor is
too low, the start up phase is terminated before
receiving any energy from the auxiliary winding
and the con verter never starts u p. This is illustrated
also in the same figure in dashed lines.
OVERVOLTAG E THRES H OLD
An overvoltage detector on the VDD pin al lows the
VIPer12A to reset itself when VDD exceeds
VDDovp. Th is is illustrate d in figu re 12, which shows
the whole sequence of an overvoltage event. Note
that thi s event i s only latche d for the time needed
by VDD to reach VDDoff, and then the device
res umes norm al operati on autom atical ly .
Fi
gure
11
:
St
ar
t
U
p
S
equence
t
t
I
FB
V
DDon
t
V
OUT
V
DD
V
DDoff
tss
Fi
gure
12
:
O
vervo
lt
age
S
equence
t
t
VDS
VDDon
VDD
VDDoff
VDDovp
VIPer12ADIP / VIPer12AS
11/15
DIM. mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.25 0.003 0.009
a2 1.65 0.064
a3 0.65 0.85 0.025 0.033
b 0.35 0.48 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.019
c1 45 (typ .)
D 4.8 5 0.188 0.196
E5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4 0.14 0.157
L 0.4 1.27 0.015 0.050
M 0.6 0.023
S 8 (max.)
L1 0.8 1.2 0.031 0.047
1
SO-8 MECHANICAL DATA
VIPer12ADIP / VIPe r12AS
12/15
DIM. mm.
MIN. TYP MAX.
A5.33
A1 0.38
A2 2.92 3.30 4.95
b 0.36 0.46 0.56
b2 1.14 1.52 1.78
c 0.20 0.25 0.36
D 9.02 9.27 10.16
E 7.62 7.87 8.26
E1 6.10 6.35 7.11
e2.54
eA 7.62
eB 10.92
L 2.92 3.30 3.81
Package Weight Gr. 470
P001
Plasti c DI P-8 MECHANICAL DATA
VIPer12ADIP / VIPer12AS
13/15
1
SO-8 TUBE SHIPMENT (no suffix)
All d imensions are in mm.
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
TAPE AND RE EL SHIPMENT (suffix “13TR”)
All d imensions are in mm.
Base Q. ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
TAPE DIMENSIONS
Accord ing to Electr oni c Industries Association
(EIA ) S tandard 48 1 rev. A , Feb 1986
All d imensions are in mm.
Tape width W 12
Tap e Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Di am et er D ( ± 0.1/ -0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spac ing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User di rection of feed
REEL DIMENSIONS
C
B
A
VIPer12ADIP / VIPe r12AS
14/15
11
DIP-8 TUBE SHIPMENT (no suffix)
A ll dimensions are in mm.
Base Q.ty 20
Bulk Q.ty 1000
Tube length (± 0.5) 532
A8.4
B11.2
C (± 0.1) 0.8
A
B
C
VIPer12ADIP / VIPer12AS
15/15
Informat ion furnished is believ ed to be ac c ur ate and r eliable. However, S TMicroelectronics ass um es n o r es ponsibil ity for the co nsequen c es
of use of such inf ormation nor for any infringement of patents or other rights of third parties which may results from its use. No license is
gran ted by implication o r otherwi s e under a ny pate nt or pat ent righ ts of STMicroelect r onics. Specificat ions mentio ned in this publication are
subj ec t to c hange without notice. This p ublicatio n s upersedes and replaces all infor m ati on previous ly s uppl ied. ST M icroelec tronics pr oduct s
are not authorized for use as critical co mponents in life support devices o r systems without express written ap proval of STMicroelectronics.
The ST log o is a trademark of STMicroelectronics
2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
STMicroelectronics GROUP OF COMPANIES
Aust r alia - Brazil - Canada - China - Finland - Fr anc e - Germany - Ho ng K ong - India - Israel - Italy - J apan - Malays ia -
Malta - Morocco - Singapore - Spain - Sweden - Switzerland - Uni ted Kingdom - U.S.A.
http://www.st.com
