REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
3 V/5 V, 4/8 Channel High
Performance Analog Multiplexers
ADG608/ADG609
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
GENERAL DESCRIPTION
The ADG608 and ADG609 are monolithic CMOS analog mul-
tiplexers comprising eight single channels and four differential
channels respectively, fully specified for ±5 V, +5 V and +3 V
power supplies. The ADG608 switches one of eight inputs to a
common output as determined by the 3-bit binary address lines
A0, A1 and A2. The ADG609 switches one of four differential
inputs to a common differential output as determined by the
2-bit binary address lines A0 and A1. An EN input on both de-
vices is used to enable or disable the device. When disabled, all
channels are switched OFF. All the address and enable inputs
are TTL compatible over the full specified operating tempera-
ture range, making the parts suitable for bus-controlled systems
such as data acquisition systems, process controls, avionics and
ATEs since the TTL compatible address inputs simplify the digital
interface design and reduce the board space requirements.
The ADG608/ADG609 are designed on an enhanced LC
2
MOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input signal
range which extends to the supplies. In the OFF condition, sig-
nal levels up to the supplies are blocked. All channels exhibit
break-before-make switching action preventing momentary
shorting when switching channels. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
The ability to operate from single +3 V, +5 V or ±5 V bipolar
supplies makes the ADG608 and ADG609 perfect for use in
battery operated instruments and with the new generation of
DACs and ADCs from Analog Devices. The use of 5 V sup-
plies and reduced operating currents gives much lower power
dissipation than devices operating from ±15 V supplies.
PRODUCT HIGHLIGHTS
1. Extended Signal Range
The ADG608/ADG609 are fabricated on an enhanced
LC
2
MOS process giving an increased signal range which
extends to the supplies.
2. Low Power Dissipation
3. Low R
ON
4. Fast Switching Times
5. Break-Before-Make Switching
Switches are guaranteed break-before-make so that input
signals are protected against momentary shorting.
6. Single/Dual Supply Operation
ORDERING GUIDE
Model Temperature Range Package Option*
ADG608BN 40°C to +85°C N-16
ADG608BR 40°C to +85°C R-16A
ADG608BRU 40°C to +85°C RU-16
ADG608TRU 55°C to +125°C RU-16
ADG609BN –40°C to +85°C N-16
ADG609BR –40°C to +85°C R-16A
ADG609BRU –40°C to +85°C RU-16
*N = Plastic DIP; RU = Thin Shrink Small Outline Package (TSSOP);
R = 0.15" Small Outline IC (SOIC).
FUNCTIONAL BLOCK DIAGRAMS
S1
S8
A0
D
A1 A2 EN
1 OF 8
DECODER
ADG608
S1A
A0
DA
A1
S4A
S1B
S4B DB
EN
1 OF 4
DECODER
ADG609
FEATURES
+3 V, +5 V, 65 V Power Supplies
VSS to VDD Analog Signal Range
Low On Resistance (30 V max)
Fast Switching Times
tON 75 ns max
tOFF 45 ns max
Low Power Dissipation (1.5 mW max)
Break-Before-Make Construction
ESD > 5000 V as per Military Standard 3015.7
TTL and CMOS Compatible Inputs
APPLICATIONS
Automatic Test Equipment
Data Acquisition Systems
Communication Systems
Avionics and Military Systems
Microprocessor Controlled Analog Systems
Medical Instrumentation
Battery Powered Instruments
Remote Powered Equipment
Compatible with 65 V DACs and ADCs such as
AD7840/8, AD7870/1/2/4/5/6/8
ADG608/ADG609–SPECIFICATIONS
REV. A
–2–
Parameter B Version T Version
+258C –40°C to +258C –558C to Test Conditions/
+858C +1258C Units Comments
ANALOG SWITCH
Analog Signal Range V
SS
to V
DD
V
SS
to V
DD
V
R
ON
22 22 typ –3.5 V < V
S
< +3.5 V, I
S
= –1 mA;
30 35 30 40 max V
DD
= +4.5 V, V
SS
= –4.5 V;
Test Circuit 1
R
ON
56 56 max –3 V < V
S
< +3 V, I
DS
= –1 mA;
V
DD
= +5 V, V
SS
= –5 V
R
ON
Match 2 3 2 3 max V
S
= 0 V, I
DS
= –1 mA;
V
DD
= +5 V, V
SS
= –5 V
LEAKAGE CURRENTS V
DD
= +5.5 V, V
SS
= –5.5 V
Source OFF Leakage I
S
(OFF) ±0.05 ±0.05 nA typ V
D
= ±4.5 V, V
S
= 74.5 V;
±0.5 ±2±0.5 ±10 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.05 ±0.05 nA typ V
D
= ±4.5 V, V
S
= 74.5 V;
ADG608 ±0.5 ±2±0.5 ±10 nA max Test Circuit 3
ADG609 ±0.5 ±1±0.5 ±5 nA max
Channel ON Leakage I
D
, I
S
(ON) ±0.05 ±0.05 nA typ V
S
= V
D
= ±4.5 V;
ADG608 ±0.5 ±3±0.5 ±20 nA max Test Circuit 4
ADG609 ±0.5 ±1.5 ±0.5 ±10 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 2.4 V min
Input Low Voltage, V
INL
0.8 0.8 V max
Input Current
I
INL
or I
INH
±1±1µA max V
IN
= 0 or V
DD
C
IN
, Digital Input Capacitance 5 5 pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
50 50 ns typ R
L
= 300 , C
L
= 35 pF;
75 90 75 100 ns max V
S1
= ±3.5 V, V
S8
= 73.5 V;
Test Circuit 5
t
OPEN
10 10 ns min R
L
= 300 , C
L
= 35 pF;
V
S
= +3.5 V; Test Circuit 6
t
ON
(EN) 50 50 ns typ R
L
= 300 , C
L
= 35 pF;
75 90 75 100 ns max V
S
= +3.5 V; Test Circuit 7
t
OFF
(EN) 30 30 ns typ R
L
= 300 , C
L
= 35 pF;
45 60 45 75 ns max V
S
= +3.5 V; Test Circuit 7
Charge Injection 6 6 pC typ V
S
= 0 V, R
S
= 0 , C
L
= 1 nF;
Test Circuit 8
OFF Isolation 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
V
S
= 3 V rms; Test Circuit 9
Channel-to-Channel Crosstalk 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
Test Circuit 10
C
S
(OFF) 9 9 pF typ
C
D
(OFF)
ADG608 40 40 pF typ
ADG609 20 20 pF typ
C
D
(ON)
ADG608 54 54 pF typ
ADG609 34 34 pF typ
POWER REQUIREMENTS
I
DD
0.05 0.2 0.05 0.2 µA typ V
IN
= 0 V or V
DD
0.2 2 0.2 2 µA max
I
SS
0.01 0.1 0.01 0.1 µA typ
0.1 1 0.1 1 µA m
ax
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55 °C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
DUAL SUPPLY
1
(V
DD
= +5 V 6 10%, V
SS
= –5 V 6 10%, GND = 0 V, unless otherwise noted)
Parameter B Version T Version
+258C –408C to +258C –558C to Test Conditions/
+858C +1258C Units Comments
ANALOG SWITCH
Analog Signal Range 0
to V
DD
0 to V
DD
V
R
ON
40 40 typ V
S
= +3.5 V, I
S
= –1 mA;
50 60 50 70 max V
DD
= +4.5 V;
Test Circuit 1
R
ON
56 56 max +1 V < V
S
< +3 V, I
DS
= –1 mA;
V
DD
= +5 V
R
ON
Match 2 3 2 3 max V
S
= 0 V, I
DS
= –1 mA;
V
DD
= +5 V
LEAKAGE CURRENTS V
DD
= +5.5 V
Source OFF Leakage I
S
(OFF) ±0.05 ±0.05 nA typ V
D
= 4.5 V/0.1 V, V
S
= 0.1 V/4.5 V;
±0.5 ±2±0.5 ±10 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.05 ±0.05 nA typ V
D
= 4.5 V/0.1 V, V
S
= 0.1 V/4.5 V;
ADG608 ±0.5 ±2±0.5 ±10 nA max Test Circuit 3
ADG609 ±0.5 ±1±0.5 ±5 nA max
Channel ON Leakage I
D
, I
S
(ON) ±0.05 ±0.05 nA typ V
S
= V
D
= 4.5 V/0.1 V;
ADG608 ±0.5 ±3±0.5 ±20 nA max Test Circuit 4
ADG609 ±0.5 ±1.5 ±0.5 ±10 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 2.4 V min
Input Low Voltage, V
INL
0.8 0.8 V max
Input Current
I
INL
or I
INH
±1±1µA max V
IN
= 0 or V
DD
C
IN
, Digital Input Capacitance 5 5 pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
80 80 ns typ R
L
= 300 , C
L
= 35 pF;
100 130 100 150 ns max V
S1
= 3.5 V/0 V, V
S8
= 0 V/3.5 V;
Test Circuit 5
t
OPEN
10 10 ns min R
L
= 300 , C
L
= 35 pF;
V
S
= +3.5 V; Test Circuit 6
t
ON
(EN) 80 80 ns typ R
L
= 300 , C
L
= 35 pF;
100 130 100 150 ns max V
S
= +3.5 V; Test Circuit 7
t
OFF
(EN) 40 40 ns typ R
L
= 300 , C
L
= 35 pF;
50 60 50 75 ns max V
S
= +3.5 V; Test Circuit 7
Charge Injection 0.5 0.5 pC typ V
S
= 0 V, R
S
= 0 , C
L
= 1 nF;
3 3 pC max Test Circuit 8
OFF Isolation 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
V
S
= 1.5 V rms; Test Circuit 9
Channel-to-Channel Crosstalk 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
Test Circuit 10
C
S
(OFF) 9 9 pF typ
C
D
(OFF)
ADG608 40 40 pF typ
ADG609 20 20 pF typ
C
D
(ON)
ADG608 54 54 pF typ
ADG609 34 34 pF typ
POWER REQUIREMENTS
I
DD
0.05 0.2 0.05 0.2 µA typ V
IN
= 0 V or V
DD
0.2 2 0.2 2 µA max
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55 °C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
SINGLE SUPPLY
1
(VDD = +5 V
6
10%, VSS = 0 V, GND = 0 V, unless otherwise noted)
ADG608/ADG609
REV. A –3–
SINGLE SUPPLY
1
REV. A
–4–
(VDD = +3.3 V 6 10%, VSS = 0 V, GND = 0 V, unless otherwise noted)
Parameter B Version T Version
+258C –408C to +258C –558C to Test Conditions/
+858C +1258C Units Comments
ANALOG SWITCH
Analog Signal Range 0
to V
DD
0 to V
DD
V
R
ON
60 60 typ V
S
= +1.5 V, I
S
= –1 mA;
90 100 90 120 max V
DD
= +3 V; Test Circuit 1
R
ON
Match 3 3 3 3 max V
S
= 0 V, I
DS
= –1 mA, V
DD
= +3.3 V
LEAKAGE CURRENTS V
DD
= +3.6 V
Source OFF Leakage I
S
(OFF) ±0.05 ±0.05 nA typ V
D
= 2.6 V/0.1 V, V
S
= 0.1 V/2.6 V;
±0.5 ±2±0.5 ±10 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.05 ±0.05 nA typ V
D
= 2.6 V/0.1 V, V
S
= 0.1 V/2.6 V;
ADG608 ±0.5 ±2±0.5 ±10 nA max Test Circuit 3
ADG609 ±0.5 ±1±0.5 ±5 nA max
Channel ON Leakage I
D
, I
S
(ON) ±0.05 ±0.05 nA typ V
S
= V
D
= 2.6 V/0.1 V;
ADG608 ±0.5 ±3±0.5 ±20 nA max Test Circuit 4
ADG609 ±0.5 ±1.5 ±0.5 ±10 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 2.4 V min
Input Low Voltage, V
INL
0.8 0.8 V max
Input Current
I
INL
or I
INH
±1±1µA max V
IN
= 0 or V
DD
C
IN
, Digital Input Capacitance 5 5 pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
120 120 ns typ R
L
= 300 , C
L
= 35 pF;
170 225 170 250 ns max V
S1
= 1.5 V/0 V, V
S8
= 0 V/1.5 V;
Test Circuit 5
t
OPEN
10 10 ns min R
L
= 300 , C
L
= 35 pF;
V
S
= +1.5 V; Test Circuit 6
t
ON
(EN) 120 120 ns typ R
L
= 300 , C
L
= 35 pF;
170 225 170 250 ns max V
S
= +1.5 V; Test Circuit 7
t
OFF
(EN) 40 40 ns typ R
L
= 300 , C
L
= 35 pF;
60 75 60 90 ns max V
S
= +1.5 V; Test Circuit 7
Charge Injection 0.5 0.5 pC typ V
S
= 0 V, R
S
= 0 , C
L
= 1 nF;
3 3 pC max Test Circuit 8
OFF Isolation 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
V
S
= 1 V rms; Test Circuit 9
Channel-to-Channel Crosstalk 85 85 dB typ R
L
= 1 k, C
L
= 15 pF, f = 100 kHz;
Test Circuit 10
C
S
(OFF) 9 9 pF typ
C
D
(OFF)
ADG608 40 40 pF typ
ADG609 20 20 pF typ
C
D
(ON)
ADG608 54 54 pF typ
ADG609 34 34 pF typ
POWER REQUIREMENTS
I
DD
0.05 0.2 0.05 0.2 µA typ V
IN
= 0 V or V
DD
0.2 2 0.2 2 µA max
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55 °C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
ADG608/ADG609–SPECIFICATIONS
ADG608/ADG609
REV. A –5–
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.5 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –6.5 V
Analog, Digital Inputs
2
. . . . . . . . . . . . . . –0.3 V to V
DD
+ 2 V
or 20 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . 40 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . 55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260°C
SOIC Package
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
TSSOP Package
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >5000 V
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Only one absolute maximum rating may be applied at any one time.
2
Overvoltages at A, S, D or EN will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
PIN CONFIGURATIONS
DIP/SOIC/TSSOP DIP/SOIC/TSSOP
A0
EN
A1
GND
S2A
S3A
S4A
S2B
S3B
S4B
V
SS
S1A
V
DD
S1B
DA DB
1
2
16
15
5
6
7
12
11
10
3
4
14
13
89
TOP VIEW
(Not to Scale)
ADG609
A0
EN
S2
S3
S4
VSS
S1
D
1
2
16
15
5
6
7
12
11
10
3
4
14
13
89
TOP VIEW
(Not to Scale)
ADG608
A1
A2
S5
S6
S7
GND
VDD
S8
Table I. ADG608 Truth Table
A2 A1 A0 EN ON SWITCH
X X X 0 NONE
00 011
00 112
01 013
01 114
10 015
10 116
11 017
11 118
X = Don’t Car e
Table II. ADG609 Truth Table
A1 A0 EN ON SWITCH PAIR
X X 0 NONE
00 11
01 12
10 13
11 14
X = Don’t Care
REV. A
–6–
50
45
0
25
15
10
5
40
30
20
35
V
D
(V
S
) – Volts
V
DD
= +3V
V
SS
= –3V
V
DD
= +5V
V
SS
= –5V
ON RESISTANCE –
–5.0 5.0–4.0 0.0 3.0 4.0–3.0 –2.0 –1.0 1.0 2.0
T
A
= +25
o
C
Figure 1. R
ON
as a Function of V
D
(V
S
): Dual Supply Voltage
50
ON RESISTANCE –
45
0
–5.0 5.0–4.0 0.0 3.0 4.0
25
15
10
5
40
30
20
35
–3.0 –2.0 –1.0 1.0 2.0
V
D
(V
S
) – Volts
V
DD
= +5V
V
SS
= –5V
+125
o
C
+85
o
C
+25
o
C
Figure 2. R
ON
as a Function of V
D
(V
S
) for Different
Temperatures
100
ON RESISTANCE –
90
0
0.0 3.00.5 1.5
50
30
20
10
80
60
40
70
1.0 2.52.0
VDD = +3V
VSS = 0V
+125oC
+85oC
+25oC
VD (VS) – Volts
Figure 3. R
ON
as a Function of V
D
(V
S
) for Different
Temperatures
ADG608/ADG609–Typical Performance Characteristics
100
ON RESISTANCE –
90
0
0.0 5.00.5 2.5 4.0 4.5
50
30
20
10
80
60
40
70
1.0 1.5 2.0 3.0 3.5
V
D
(V
S
) – Volts
V
DD
= +3V
V
SS
= 0V
V
DD
= +5V
V
SS
= 0V
T
A
= +25
o
C
Figure 4. R
ON
as a Function of V
D
(V
S
): Single Supply Voltage
100
ON RESISTANCE –
90
0
0.0 5.00.5 2.5 4.0 4.5
50
30
20
10
80
60
40
70
1.0 1.5 2.0 3.0 3.5
V
D
(V
S
) – Volts
V
DD
= +5V
V
SS
= 0V
+125
o
C
+85
o
C
+25
o
C
Figure 5. R
ON
as a Function of V
D
(V
S
) for Different
Temperatures
V
S
, V
D
– Volts
0.03
0.00
–0.03–5 5–4
LEAKAGE CURRENTS – nA
–3 –2 –1 0 1 2 3 4
0.02
0.01
–0.01
–0.02
I
D
(OFF)
I
D
(ON)
I
S
(OFF)
V
DD
= +5V
V
SS
= –5V
T
A
= +25
o
C
Figure 6. Leakage Currents as a Function of V
D
(V
S
)
ADG608/ADG609
REV. A –7–
VS,VD – Volts
0.02
0.01
–0.01 051234
0.00
VDD = +5V
VSS = 0V
TA = +25oCID(OFF)
ID(ON)
IS(OFF)
LEAKAGE CURRENTS – nA
Figure 7. Leakage Currents as a Function of V
D
(V
S
)
FREQUENCY – Hz
10
4
10
3
10
–1
10 10M100 1k 10k 100k 1M
10
2
10
1
10
0
V
DD
= +5V
V
SS
= –5V
EN = 2.4V
EN = 0V
I
DD
– µA
Figure 8. Positive Supply Current vs. Switching Frequency
SOURCE VOLTAGE – V
30
20
–10–5 5–4
CHARGE INJECTION – pC
–3 –2 –1 0 1 2 3 4
10
0
CL = 1nF
V
DD
= +5V
V
SS
= –5V
V
DD
= +5V
V
SS
= 0V
V
DD
= +3V
V
SS
= 0V
Figure 9. Charge Injection vs. Analog Voltage V
S
VS, VD – Volts
0.02
0.01
–0.01 0 3.00.5
LEAKAGE CURRENTS – nA
1.0 1.5 2.0 2.5
0.00
ID(OFF)
ID(ON)
IS(OFF)
VDD = +3V
VSS = 0V
TA = +25oC
Figure 10. Leakage Currents as a Function of V
D
(V
S
)
I
SS
– µA
FREQUENCY – Hz
10
4
10
3
10
–1
10 10M100 1k 10k 100k 1M
10
2
10
1
10
0
V
DD
= +5V
V
SS
= –5V
EN = 2.4V
EN = 0V
10
–2
Figure 11. Negative Supply Current vs. Switching Frequency
FREQUENCY – Hz
120
110
50
100 1M1k
dB
10k 100k
90
80
70
60
100
V
DD
= +5V
V
SS
= –5V
Figure 12. Crosstalk and Off Isolation vs. Frequency
REV. A
–8–
ADG608/ADG609
Test Circuits
V
D
S1
S2
S8
V
S
V
SS
V
DD
I
D
(OFF)
V
SS
V
DD
+0.8V
D
EN
A
GND
Test Circuit 3. I
D
(OFF)
I
D
(ON)
V
D
S1
S8
V
S
V
SS
V
DD
V
SS
V
DD
+2.4V
D
EN
A
GND
Test Circuit 4. I
D
(ON)
IDS
S
RON = V1/IDS
V1
VS
D
Test Circuit 1. On Resistance
V
S
I
S
(OFF)
V
D
S1
S2
S8
V
SS
V
DD
V
SS
V
DD
+0.8V
D
EN
A
GND
Test Circuit 2. I
S
(OFF)
Test Circuit 5. Switching Time of Multiplexer, t
TRANSITION
3V
50%
V
OUT
t
TRANSITION
90%
90%
t
TRANSITION
ADDRESS
DRIVE (V
IN
)
50%
A2
V
OUT
V
SS
V
DD
D
V
S1
* SIMILAR CONNECTION FOR ADG609
A1
A0
EN GND
ADG608*
S1
S8
S2 THRU S7
V
IN
+2.4V
50
V
S8
R
L
300C
L
35pF
V
SS
V
DD
0V
ADG608/ADG609
REV. A –9–
A2
V
OUT
V
SS
V
DD
D
V
S
* SIMILAR CONNECTION FOR ADG609
A1
A0
EN
GND
ADG608
*
S1
S8
S2 THRU S7
V
IN
+2.4V
50
R
L
300C
L
35pF
V
SS
V
DD
ADDRESS
DRIVE (V
IN
)
3V
V
OUT
t
OPEN
80% 80%
0V
Test Circuit 6. Break-Before-Make Delay, t
OPEN
3V
50%
OUTPUT
0.9V
0
50%
t
ON
(EN)
0.9V
0
0V
V
0
0V
t
OFF
(EN)
ENABLE
DRIVE (V
IN
)
A2
V
OUT
V
SS
V
DD
D
V
S
* SIMILAR CONNECTION FOR ADG609
A1
A0
EN
GND
ADG608
*
S1
S2 THRU S8
V
IN
50R
L
300C
L
35pF
V
SS
V
DD
Test Circuit 7. Enable Delay, t
ON
(EN), t
OFF
(EN)
VOUT
3V
VOUT
LOGIC
INPUT (VIN)
QINJ = CL x VOUT
0V
A2
VOUT
VSS
VDD
D
* SIMILAR CONNECTION FOR ADG609
A1
A0
EN
GND
ADG608*
VIN
CL
1nF
VSS
VDD
S
RS
VS
Test Circuit 8. Charge Injection
REV. A
–10–
ADG608/ADG609
A2
V
OUT
V
SS
V
DD
D
A1
A0
EN
GND
ADG608
R
L
1k
V
SS
V
DD
S1
V
S
S2
S8
2.4V
1k
Test Circuit 10. Channel-to-Channel Crosstalk
A2
V
OUT
V
SS
V
DD
D
A1
A0
EN
GND
ADG608
R
L
1k
V
SS
V
DD
S1
V
S
S8
Test Circuit 9. OFF Isolation
TERMINOLOGY
V
DD
Most positive power supply potential.
V
SS
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
GND Ground (0 V) reference.
R
ON
Ohmic resistance between D and S.
R
ON
R
ON
variation due to a change in the analog
input voltage with a constant load current.
R
ON
Match Difference between the R
ON
of any two
channels.
I
S
(OFF) Source leakage current when the switch is off.
I
D
(OFF) Drain leakage current when the switch is off.
I
D
, I
S
(ON) Channel leakage current when the switch is
on.
V
D
, V
S
Analog voltage on terminals D, S.
C
S
(OFF) Channel input capacitance for “OFF”
condition.
C
D
(OFF) Channel output capacitance for “OFF”
condition.
C
D
, C
S
(ON) “ON” switch capacitance.
C
IN
Digital input capacitance.
t
ON
(EN) Delay time between the 50% and 90% points
of the digital input and switch “ON”
condition.
t
OFF
(EN) Delay time between the 50% and 90% points
of the digital input and switch “OFF”
condition.
t
TRANSITION
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
t
OPEN
“OFF” time measured between the 80%
points of both switches when switching from
one address state to another.
V
INL
Maximum input voltage for logic “0.”
V
INH
Minimum input voltage for logic “1.”
I
INL
(I
INH
) Input current of the digital input.
Crosstalk A measure of unwanted signal which is
coupled through from one channel to another
as a result of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling
through an “OFF” channel.
Charge Injection A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
I
DD
Positive supply current.
I
SS
Negative supply current.
ADG608/ADG609
REV. A –11–
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Pin Plastic (N-16)
0.840 (21.33)
0.745 (18.93) 0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.195 (4.95)
0.115 (2.93)
PIN 1 0.280 (7.11)
0.240 (6.10)
9
16
18
0.210
(5.33)
0.200 (5.05)
0.125 (3.18)
0.022 (0.558)
0.014 (0.356) 0.100
(2.54)
BSC
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
0.070 (1.77)
0.045 (1.15)
16-Pin SOIC (R-16A)
16 9
81
0.3937 (10.00)
0.3859 (9.80)
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0500
(1.27)
BSC
0.0099 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8°
0°
0.0196 (0.50)
0.0099 (0.25) x 45°
16-Pin TSSOP (RU-16)
16 9
8
1
0.201 (5.10)
0.193 (4.90)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256
(0.65)
BSC
0.0433
(1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8°
0°
C2021a–18–4/96
PRINTED IN U.S.A.
–12–