P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
01
Rev
2
.
Oct
. 20
10
Parameter Symbol Steady State Unit
Drain-Source Voltage V
DSS
-20 V
Gate-Source Voltage V
GSS
±12 V
T
A
=25℃ -1.88 Continuous Drain
Current(Tj=150℃)
*
T
A
=70℃ I
D
-1.5
A
Pulsed Drain Current I
DM
-10 A
Continuous Source Current (Diode Conduction) I
S
-1.7 A
T
A
=25℃ 0.63
Maximum Power Dissipation
*
T
A
=70℃ P
D
0.4
W
Operating Junction Temperature T
J
-55 to 150 ℃
Typ
90
Thermal Resistance-Junction to Ambient
*
R
θJA
Max
125
℃/W
GENERAL DESCRIPTION
The LT2349E is the P-Channel logic enhancement mode power field
effect transistors are produced using high cell density , DMOS trench
technology. This high density process is especially tailored to
minimize on-state resistance. These devices are particularly suited
for low voltage application such as cellular phone and notebook
computer power management and other battery powered circuits
where high-side switching , and low in-line power loss are needed in
a very small outline surface mount package.
FEATURES
● R
DS(ON)
≦
75mΩ@V
GS
= -10V
● R
DS(ON)
≦
95mΩ@V
GS
= -4.5V
● R
DS(ON)
≦
140mΩ@V
GS
= -2.5V
● Super high density cell design for extremely low R
DS(ON)
APPLICATIONS
● Power Management in Note book
● Portable Equipment
● Battery Powered System
● DC/DC Converter
● Load Switch
● DSC
● LCD Display inverter
PIN CONFIGURATION
Absolute Maximum Ratings (TA=25℃ Unless Otherwise Noted)
*The device mounted on 1in
2
FR4 board with 2 oz copper
(SOT-23)
Top View
P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
02
Rev
2
.
Oct
. 20
10
Symbol
Parameter
Limit
Min
Typ Max Unit
STATIC
V
GS(th)
Gate Threshold Voltage V
DS
=V
GS
, I
D
=250μA -0.5
-1 V
I
GSS
Gate Leakage Current V
DS
=0V, V
GS
=±12V ±15 μA
V
DS
=-30V, V
GS
=0V -1
I
DSS
Zero Gate Voltage Drain Current V
DS
=-30V, V
GS
=0V
T
J
=70℃
-5
μA
V
GS
=-10V, I
D
= -2.0A 65 75
V
GS
=-4.5V, I
D
= -1.3A 75 95
R
DS(ON)
Drain-Source On-Resistance
V
GS
=-2.5V, I
D
= -1.0A 100 140
mΩ
V
SD
Diode Forward Voltage I
S
=-1.7A, V
GS
=0V 0.8 V
DYNAMIC
C
iss
Input Capacitance
427
C
OSS
Output Capacitance
60
C
rss
Reverse Transfer Capacitance
V
DS
=-15V, V
GS
=0V, f=1MHZ
15
pF
Rg Gate Resistance f=1MHz
9 Ω
Qg Total Gate Charge
6.5
Qgs Gate-Source Charge
2.4
Qgd Gate-Drain Charge
V
DS
=-15V, V
GS
=-10V,
I
D
=-20A
1.5
nC
t
d(on)
Turn-On Delay Time
19
t
r Turn-On Rise Time
8
t
d(off)
Turn-Off Delay Time
43
t
f
Turn-Off Fall Time
V
DD
=-15V, R
L
=15Ω
I
D
=-1.0A, V
GEN
=-10V
R
G
=6Ω
4.4
ns
Notes: a. Pulse test; pulse width ≦ 300us, duty cycle≦ 2%
Electrical Characteristics (TA =25℃ Unless Otherwise Specified)
P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
03
Rev
2
.
Oct
. 20
10
Typical Characteristics (T
J
=25℃
℃℃
℃ Noted)
P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
04
Rev
2
.
Oct
. 20
10
Typical Characteristics (T
J
=25℃
℃℃
℃ Noted)
P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
05
Rev
2
.
Oct
. 20
10
MILLIMETERS (mm)
DIM
MIN MAX
A 2.80 3.00
B 1.20 1.70
C 0.90 1.30
D 0.35 0.50
G 1.78 2.04
H 0.010 0.15
J 0.085 0.20
K 0.30 0.65
L 0.89 1.02
S 2.10 3.00
V 0.45 0.60
SOT-23 Package Outline
P
-
Channel
2
0
-
V (D
-
S)
MOSFET
, ESD Protection
LT2349E
06
Rev
2
.
Oct
. 20
10
Important Notice and Disclaimer
LSC reserves the right to make changes to this document and its products and
specifications at any time without notice. Customers should obtain and confirm the
latest product information and specifications before final design, purchase or use.
LSC makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose, nor does LSC assume any liability for application
assistance or customer product design. LSC does not warrant or accept any liability
with products which are purchased or used for any unintended or unauthorized
application.
No license is granted by implication or otherwise under any intellectual property
rights of LSC.
LSC products are not authorized for use as critical components in life support
devices or systems without express written approval of LSC.
