AN1998
An FM/IF system for DECT and other high-speed GFSK
applications
Rev. 3 — 24 July 2014 Application note
Document information
Info Content
Keywords High-speed digital wireless PCS applications, Digital European Cordless
Telephone (DECT), FM/IF system
Abstract An NXP low-voltage high-performance monoli th ic FM/IF system, the
SA639 is introduced to meet the increasing demand for high-speed digital
wireless PCS applications. In order to assist the system design, a
SA639-based performance evaluation board has been developed
according to the Digital European Cordless Telephone (DECT)
specifications. This application note presents detailed descriptions of the
SA639 FM/IF system, evaluation board, and design information including
circuit diagram, component list, and the board layout. The experimental
performance evaluation procedures, measured bit error rate (BER),
sensitivity to frequency offset, and sensitivity to FM deviation variation of
this system are also presented. Results indicate that the low-voltage
SA639 FM/IF system provides superior performance for high-speed digital
wireless applications.
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 2 of 20
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Revision history
Rev Date Description
3.0 20140724 Application note; third release
The format of this application note has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
2.0 20040114 Application note; second release
1.0 19970820 Application note; initial release
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 3 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
1. Introduction
To achieve the goal of wireless personal communications, allowing users access to the
capabilities of the global communications network at any time without regard to location
and mobility, cellular and cordless telephony have been taken as two major approaches.
Cellular systems are evolving towards smaller cells (micro cells) and lower power levels to
provide higher overa ll capacity. Cordless telephones have evolved fr om home applia nces
towards widespread ‘universal’ low-power personal communications systems. With the
advent of digital cordless telephony, cordless systems with enhanced functionality have
been developed that can support higher data r ates and more sophisticated applications
such as wireless private branch exchanges (WPBX) and public-access Telepoint systems.
One of the first digital cordless standards is the Digital European Cordless
Telecommunications (DECT) system, a pan-European st andard de signed to connect a ll of
Europe with a commo n dig ital cordles s system. DECT is also a flexible standard for
providing a wide range of services in small cells.
In this application note, the SA639, an NXP low-voltage FM/IF system with several
important features such as post filter amplifier and active dat a switch, is proposed for
DECT and other high-speed digital wireless applications. A SA639-based DECT receiver
evaluation bo ard ha s be en de velo p ed . Detailed descr ipt ion of the SA 639 F M/ IF syste m ,
structure of the evaluation board, design information, and experime ntal evaluation results
are presented.
2. Review of DECT standard
DECT is designed as a flexible interface to provide cost-effective communications
services to high user densities in sm all cells. This standard is intended for the applications
such as domestic cordless telephony, Telepoint, cordless PBXs, and Radio Local Loop
(RLL). It supports multiple bearer channels for speech and data transmission (which can
be set up and released during a call), hand over, location registration, and p aging.
Functionally, DECT is closer to a cellular system than to a classical cordless telephone.
However, the interface to PSTN or ISDN remains the same as for a PBX or corded
telephone. Table 1 is a summary of the key specifications of DECT and other digital
cordless telephone systems.
DECT is based on Time Division Duplex (TDD) and Time Division Multiple Access
(TDMA) with 10 carriers in the 1880 MHz to 1900 MHz band. Figure 1 illustrates the
DECT TDD/TDMA frame structure.
The completed frame is 10 ms in duration with 24 time slots. The first 12 slots are
allocated for the transmission from base station to handsets, an d the ot her 12 slot s are for
the transmission from handset s to base station. Each slot is 417 μs long with 480 bits. The
first 32 bits is a ‘1010...’ sequence for synchronization. The 32 kbit/s ADPCM CODEC is
used for speech coding in DECT, which provides 320 bits during each 10 ms frame. When
a call is made, two slots (one is in the first 12 slots, the other is in the last 12 slots) are
assigned to the user for transmit and receive.
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 4 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Table 1. Summary of digital cordless standards
Standard CT2/CT2+ DECT PHS PACS
Region Europe/Canada Europe Japan USA
Frequency band
(MHz) CT2: 864 - 868
CT2+: 944 - 948 1880 - 1900 1895 - 1918 Tx: 1850 - 1910
Rx: 1930 - 1990
Duplex TDD TDD TDD FDD
Multiple access TDMA TDMA TDMA TDMA
Number of channels 40 10 77 16 pairs
Channel spacing
(kHz) 100 1728 300 300
Users/channel 11248/pair
Modulation GFSK
(FM dev: 14 kHz to 25 kHz) GFSK
(FM dev: 288 kHz) π/4-DQPSK π/4-DQPSK
Bit rate 72 kbit/s 1.152 Mbit/s 32 kbit/s ADPCM 32 kbit/s ADPCM
Spee c h co ding 32 kbit/s ADPCM 32 kbit/s ADPCM 32 kbit/s ADPCM 32 kbit/s ADPCM
Frame duration 2ms 10ms 5ms 2.5ms
Peak power 10 mW 250 mW 80 mW 200 mW
Fig 1. DECT TDD/TDMA frame structure
12345678910 11 12 13 14 15 16 17 18 19 20 21 22 23 24
frequency
Ch 10
1897 MHz
12345678910 11 12 13 14 15 16 17 18 19 20 21 22 23 24
base-to-handsets handsets-to-base
24-slot frame (10 ms: 11520 bits at 1.152 Mbit/s)
Ch 1
1881 MHz
time
32 bits 64 bits 320 bits 60 bits4
synchronization signaling information error
control
guard
space
one slot (417 μs: 480 bits at 1.152 Mbit/s)
aaa-014182
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 5 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Gaussian filtered FSK (GFSK) modulation scheme is employed in DECT. GFSK is a
premodulation Gaussian filtered digital FM scheme. Figure 2 shows the block diagram of
a GFSK modulator. The advantages of GFSK can be summarized as follows:
Constant envelope nature — This allows GFSK modulated signal to be operated with
class-C power amplifier without introducing spectrum regeneration. Therefore, lower
power consumption and higher power efficiency can be achieved.
Narrow power spectrum — Narrow main lobe and low spectral tails keep the adjacent
channel interference to low levels and achieve higher spectral efficiency.
Non-coherent detectionGFSK modulated signal can be demodulated by the
limiter/discriminator receiver as shown in Figure 3. This simple structure leads to low-cost
GFSK receivers.
Fig 2. Block diagram of GFSK modulator
Fig 3. Block diagram of GFSK demodulator
aaa-014203
FM
MODULATOR
GAUSSIAN
LPF
f
b
= 1.152 Mbit/s
∆f = 288 kHz
BT
b
= 0.5 Mbit/s
GFSK modulated
signal for DECT
fb = 1.152 Mbit/s
aaa-014204
GFSK modulated
signal for DECT
LIMITER FM
DISCRIMINATOR
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 6 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
3. The SA639 FM/IF system
The SA639 is a low-voltage high performance monolithic FM/IF system with high-speed
RSSI incorporating a mixer/oscillator, two limiting intermediate frequency amplifiers,
quadrature detector, fast RSSI op amps, post detection filter amplifier, and a data switch.
The block diagram of SA639 is presented in Figure 4. The SA639 was designe d specially
for high data rate portable communications applications and functions down to 2.7 V. The
data output provides a minimum bandwidth of 1 MHz to demodulate high-speed data,
such as in DECT applications. Figure 5 presents the quad tank S-curve of SA639, which
indicates the linear range to be about 2 MHz. The measured RSSI characteristic of SA639
is presented in Figure 6. With more than 75 dB dynamic range, the SA639 RSSI rise/fall
time is 0.8/2.0 ms at 45 dBm RF level.
Fig 4. Block diagram of the SA639 FM/IF system
002aag706
mixer
IF amp limiter
OSC FAST
RSSI
quad
data
EB
POWER
DOWN
RSSI
VCC
RF_IN
RF_BYPASS
OSC_OUT
OSC_IN
VCC
RSSI_FEEDBACK
RSSI_OUT
POWER_DOWN_CTRL
DATA_OUT
SWITCH_CTRL
LIMITER_OUT
LIMITER_DECOUP
L
LIMITER_DECOUP
L
LIMITER_IN
GND
IF_AMP_OUT
IF_AMP_DECOUPL
IF_AMP_IN
IF_AMP_DECOUPL
MIXER_OUT
SWITCH_OUT
QUADRATURE_IN
POSTAMP_IN
POSTAMP_OUT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 7 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
The post-detection amplifier may be used to realize a group dela y opti miz ed low-pass
filter . To keep its frequency response in fluence on the filter g roup delay characteristics at a
minimum, the filter amplifier provides 0 dB gain and has a 3 dB bandwidth of at least
4 MHz. It can be configured for Sallen and Key low-pass with Bessel characteristic and a
3 dB cut frequency of about 800 kHz.
The SA639 incorporates an active data switch to der i ve th e da ta comparator reference
voltage by means of routing a portion of data signal to an external integ ration circuit. The
data switch is typically closed for 10 ms in the course of 32-bit synchronizatio n sequence ,
and is open otherwise. The time constant of the external int eg ratio n cir cuit is about 5 ms
to 10 ms. This active switch provides excellent tracking behavior over a DC input range of
1.2 V to 2.0 V. The slew rate is better than 1 V/ms. When th e switch is opened, the output
is in a 3-state mode with a leakage current of less than 100 nA. This reduces the
discharge of the external integration circuit. As compared to other similar FM/IF chips,
another advantage of SA639 is that during power-down mode (between data bursts) the
data switch outputs a reference of about 1.6 V to maintain a charge on the external RC
circuit. This idea helps extract the reference voltag e for th e externa l ca pacitor in a shorter
time and improves the accuracy of the voltage on the capacitor. The overall system is
suited for battery operated high-quality products in digital wireless personal
communications. Detailed specifications of SA639 can be found in Ref. 3.
Fig 5. Quad tank S-curve of SA639 board
Fig 6. Measured RSSI characteristics of SA639
frequency offset from 110.592 MHz (MHz)
−1.2 1.4
aaa-014183
1.0
1.5
0.5
2.0
2.5
output DC level (V)
0
−1.0 −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2
RF level (dBm)
−110 −10
aaa-014184
0.6
0.8
0.4
1.0
1.4
RSSI
(V)
0
−100 −90 −80 −70 −60 −50 −40 −30 −20
0.2
1.2
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 8 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
4. Structure of the SA639 evaluation board
A SA639-based evaluation board has been developed based on DECT specifications.
The structure of this board is illustrated in Figure 7 together with a VCO/FM
discriminator-based GFSK modem (modulator/demodulator). The demo board contains
the entire demodulator as well as the Gaussian low-pass filter (LPF) for the modulator.
The DECT modulated signal, therefore, can be generated either by a standard DECT
signal generator, or by sending a 1.15 2 Mbit/s dat a strea m to the on-b oard Gau ssian LPF
(BTb= 0.5), then applying the filtered baseband wa vefor m to an FM signal gen er ator with
a modulation index of 0.5. The output is then the GFSK modulated signal (DECT). The
schematic of the Gaussian LPF can be found in Figure 14. Baseband eye-diagram at the
output of the Gaussian LPF is presented in Figure 8.
At the output of the limit/frequency discriminator , the post-detection amplifier is configured
as a Sallen and Key LPF to eliminate noise. For the convenience of operation, the
evaluation board is designed in such a way that the reference voltage for the data
comparator can be obtained either from the switch controlled DC extraction circuit, or
directly from the power supply. If the DECT Burst Mode Control circuit is available, the
active data switch can be used to extract and track DC level during the synchronization
sequence. Otherwise the DC reference can be obtained from the power supply and
manually adjusted for the comparator operation.
Fig 7. Structure of the SA639 GFSK evaluation board
Fig 8. Measured eye-diagram at the output of Tx Gaussian LP F
aaa-014185
fLO = 120.392 MHz
LO
BER
fc = 110.592 MHz
SA639
∆f = 288 kHz
COMP. LPF
FM
MODULATOR
GAUSSIAN
LPF
BTb = 0.5
fb = 1.152 Mbit/s
FM
DETECTOR
aaa-014186
stopped
−2.4000 μs 2.6000 μs
500 ns/div
Display
Persistence
norm
infinite
avg env
# of screens
124
gridaxes
off frame
onoff
connect dots
repetitive
100.0 ns
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 9 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
A two-level threshold detector with sampling time adju stment circuit is implemented on the
board for data regeneration. The phase of data clock can be adjusted manua lly thro ugh a
monostable multivibrator (74HC123) to achieve the optimal sampling time. The demo
board is initially adjusted for a bit rate of 1.152 Mbit/s. If a different data rate is used, the
sampling time must be re-adjusted. The output of the threshold detector is the
regenerated binary data, which can be sent to a data error analyze r to ev alu at e th e BER
performance.
The symbol timing recovery (STR) circuit is not implemented on this evaluation board.
Transmit data clock either hard-wire connected from the transmitter or from a separate
STR circuit is required for the operation. The perfo rmance measurements presented in
this application note were condu cted with h ard-wir e connected da t a clock. However, BER
degradation caused by STR should not be more than 1 dB (Ref. 6).
This SA639-based GFSK demo board is designed with DECT specifications at RF
frequency of 110.592 MHz, LO frequency of 120.392 MHz, and intermediate fr eq uency o f
9.8 MHz. For different frequency plan applications, the step-by-step matching circuit
design procedure can be found in Ref. 1. Table 2 and Table 3 present the SA639 RF/LO
input impedance and mixer/limiter output impedance over frequency, respectively.
Table 2. SA639 RF/LO input impedance over frequency
Frequency RF input LO input
50 MHz 846 Ω||4.52 pF 6900 Ω||4.07 pF
110 MHz 687 Ω||3.84 pF 4900 Ω||4.09 pF
240 MHz 510 Ω||3.69 pF 1900 Ω||4.22 pF
500 MHz 190 Ω||4.21 pF 245 Ω||4.98 pF
Table 3. SA639 mixer/limiter output impedance over frequency
Frequency RF input LO input
0.5 MHz 395 Ω||20.2 pF 438 Ω||14.5 pF
10 MHz 350 Ω||6.67 pF 383 Ω||3.5 pF
21 MHz 339 Ω||4.58 pF 393 Ω||2.04 pF
50 MHz 326 Ω||3.44 pF 391 Ω||1.35 pF
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 10 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
5. Performance evaluation
Performance of this SA639 based DECT GFSK system including BER and sensitivity to
frequency off-set and FM deviation variation is experime ntally evaluated. Measurement
procedures and the measured results are presented in this section.
Figure 9 illustrates the measurement set-up with the SA639 DECT evaluation board. A
data error analyzer is employed to generate a pseudo random binary sequence (PRBS)
with length of 1091 at a data rate of 1.152 Mbit/s. This data sequence is sent to a DECT
signal generator to g enerate a st andard DECT modulated signal at 110.592 MHz. Another
signal generator is employed to provide an LO signal at 120.392 MHz for the FM/IF
system detection. The reference DC voltage for the data comparator is obtained from
power supply for this evaluatio n. Da ta clock signal is directly fr om th e data error analyzer.
The sampling time is manually adjusted at the center of baseband eye diagram.
Recovered data sequence is fed back to the Data Error Analyzer for BER measurement.
The BER measurement procedures can be summarized as follows:
Build the measurement setup as shown in Figure 9.
Measure SINAD at the data output of SA639:
RF = 110.592 MHz, fm = 1 kHz, Df = 288 kHz
LO = 120.392 MHz, 10 dBm
the typical sensitivity for 12 dB SINAD should be about 97 dBm
Check SA639 output level: tune the quad tank circuit to have the least distorted
eye-diagrams at the post op amp output. The DC level sho uld be about 1 .4 V to 1.7 V.
Check the DC reference for the comparator: set the reference voltage at the DC level
of the op amp output by adjusting VR1 in Figure 14.
Adjust sampling p osition: set the up edge of the cloc k at pin 1 1 of 74HC74 to be at the
center of the eye-diagram at pin 2 of LM311B by adjusting VR2 in Figure 14.
Measure BER with high RF level: set RF input signal level at 60 dBm; LO signal level
at 10 dBm: error free.
Fig 9. Block diagram of the BER evaluation setup
aaa-014187
RFIN LOIN
BER
ANALYZER
DECT
GENERATOR
FM
DETECTOR
LPF
SA639
SIGNAL
GENERATOR
fb = 1.152 Mbit/s
data output
clock output
fc = 110.592 MHz
∆f = 288 kHz fLO = 120.392 MHz
BTb = 0.5
clock
input
data
input
data clock
input
GAUSSIAN
LPF
TIMING
ADJUSTMENT
Rx data
output
COMP.
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 11 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Measure BER versus RF input level curve:
RF level: 76 dBm ~ 86 dBm
LO level: 10 dBm, at each point, at least 100 errors must be measured
The recovered baseband eye-diagram is shown in Figure 10, and the measured BER
versus RF input level is presented in Figure 11. It can be seen that about 83 dBm RF
power is needed to achieve the bit error rate of 103. Since a typical front-end circuit has a
better noise figure than FM/IF system, it is common to achieve more than 5 dB
signal-to-noise ratio gain by the front-end circuit. Therefore, with the SA639 FM/IF the
overall system sensitivity co uld be better th an 88 dBm for the BER of 103. Based on our
measurements, by applying the Philips UAA2077AM 2 GHz image rejecting front-end to
the SA639 FM/IF system, the overall system sensitivity is 91 dBm for the BER of 103.
This performance compares very well to the DECT specifications for public access
equipment (86 dBm for 103 BER).
Fig 10. Recovered eye-diagram at the output of SA639
RF = 110.592 MHz; LO = 120.392 MHz; fb= 1.152 Mbit/s
Fig 11. BER of the SA639 DECT demo board
aaa-014188
stopped Horizontal
Delay
500 ns/div
-60.00 ns
Reference
centerleft right
realtime
−2.5800 μs
500 ns/div
2.4200 μs
realtime
Repetitive
onoff
sequential
512
record length
100 Msa/s
auto adjust
sample clock
−80.00 ns
aaa-014189
10−3
10−4
10−2
10−1
BER
10−5
RF input (dBm)
−87 −80−81−85 −83−86 −82−84
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 12 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
The performance degradation caused by frequency off-set and the sensitivity to FM
deviation variation of this system are also evaluated. Figure 12 presents the measured
BER versus frequency offset. Even with 50 kHz offset, only minor degradation can be
observed, and 82 dBm RF level is enough for 103 BER. The sensitivity of this system to
FM deviation variation is illustrated in Figure 13. Even with 10 % deviation reduction
(259 kHz), less than 82 dBm RF signal is needed to achieve th e BER of 103. These
results indicate that the NXP SA639 FM/IF system provides superior performance for
DECT and other high data rate GFSK applications.
RF = 82 dBm
Fig 12. BER degradation caused by freque ncy offset
RF = 110.592 MHz, 82 dBm; fb=1.152Mbit/s
Fig 13. BER versus FM deviation
aaa-014190
frequency offset from 110.592 MHz (kHz)
−70
10−2
10−3
10−1
BER
10−4
60−50−40−30−20−10 0 10 20 30 40 50 60
aaa-014191
10−3
10−4
10−2
10−1
BER
10−5
FM deviation (kHz)
317 166259288 202
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AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 13 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Fig 14. Schemat ic
aaa-014205
RF_IN
RF_BYPASS
OSC_IN (E)
OSC_OUT (B)
VCC
RSSI_FB
RSSI_OUT
POWER_DOWN_CTRL
DATA_OUT
POSTAMP_IN
POSTAMP_OUT
SWITCH_CTRL
SA639DH/01
MIXER_OUT
IF_AMP_DECCOUPL
IF_AMP_IN
IF_AMP_DECOUPL
IF_AMP_OUT
GND
LIMITER_IN
LIMITER_DECOUPL
LIMITER_DECOUPL
LIMITER_OUT
QUADRATURE_IN
SWITCH_OUT
1
2
3
4
5
6
7
8
74HC123
16
15
14
13
12
11
10
9
1A
1B
1RD
1Q/L
2CEXT
2REXT
GND
VCC
1REXT
1CEXT
1Q
2Q/L
2RD
2A
1RD
1D
1CT
1SD
1Q1
1Q2
GND
VCC
2RD
2D
2CT
2SD
2Q1
2Q2
1
2
3
4
5
6
7
74HC74
1
2
3
4
8
7
6
5
GND
IN+
IN−
V−
VCC
OUT
STE
BAL
14
13
12
11
10
9
8
THRESHOLD DETECTOR
J1
C1
5 pF to 30 pF
L1
180 nH
C3
10 nF
J2
C6
39 pF
L2
120 nH
U1 FM/IF
VCC
GND
R1
10 Ω
C8
15 μF
C24
68 pF
C23
100 nF
C11
10 nF
RSSI OUT
DATA OUT
SK IN
GND
POST AMP IN
POSTAMP OUT
SW CTRL
SW OUT
VR1
20 kΩ
J3
DATA IN
J4
Tx DATA OUT
VCC
2Q
2B
LM311B
RF_IN
110.592 kHz
±288 kHz
C2
15 pF
LO in
120.392 MHz
at −10 dBm
C5
5 pF to 30 pF C4
1 nF
C7
100 nF R2
22 kΩ
R3
33 kΩ
R4
0 Ω
R6
5.6 kΩ
R5
5.6 kΩ
C9
33 pF
C10
22 pF
510 Ω
R7
L5
680 nH
C26
68 pF
C25
330 pF C22
100 nF
C20
100 pF
C18
100 pF
C21
47 pF
C19
330 pF
C17
100 nF
C16
100 nF
L4
680 nH
C14
6.8 pF
C12
1 nF
C15
15 pF
R8
1.3 kΩ L3
4.7 μH
C13
5 pF to 30 pF
R11
5.1 kΩ
R9
10 kΩ
R12
1 kΩ
C35
100 nF C34
15 μF
C31
18 nF
VR2
500 kΩ
L6
6.8 μH
L7
1.8 μH
L8
10 μH
L9
2.7 μH
R14
1.2 kΩ
R15
39 Ω
R16
220 Ω
R17
24 Ω
C27 2.2 nF
C28 220 pF
C29 10 nF
C30 2.2 nF
C32
100 nF
C33
15 μF
J5
DATA CLOCK IN
J6
Rx DATA OUT
J7
Rx DATA OUT
SW1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 14 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Fig 15. Board layout
C13
C1
C5
U4
U3
U2
Lo in
RF in Data in
Tx Data out
CLK in
Rx Data out
Rx Data out
SW1
VR1
Vcc
Gnd
RSSI
Data
Gnd
Amp out
Sw Ctrl
Sw out
VR2
C6
C2
L5
R15
C27
C28
R14
C17C16
C33
C32
R9R12
C29
C30
R16
R17
C9
C10
R4
R3
R1
C31
R1
L2 C3
C7 C8 C4
R2
C23 C26
C25
C21 C19 L4
C20 C18 R13
C22
C24
L6
L7
L8
L9
C34
C35
R8 C15 L3
R11
R6
R5
C11 R7
C12 C14
L1
SA639 DECT
DC10639
U1
Top View Bottom View
aaa-014192
Components Layout Via Layer
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 15 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Table 4. Customer application component list for GMSK/GFSK demo board
Quantity Value Voltage Component Description Vendor Manufacturer Part number
Surface mount capacitors
1 6.8 pF 50 V C14 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG689C9BB2
2 15 pF 50 V C2, C15 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG150J9BB2
1 18 pF 50 V C31 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG180J9BB2
1 22 pF 50 V C10 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG220J9BB2
1 33 p F 50 V C9 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG330J9BB2
1 39 p F 50 V C6 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG390J9BB2
1 47 pF 50 V C21 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG470J9BB2
2 68 pF 50 V C24, C26 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG680J9BB2
2 100 pF 50 V C18, C20 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG101J9BB2
1 220 pF 50 V C28 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG221J9BB2
2 330 pF 50 V C19, C25 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG331J9BB2
2 1000 pF 50 V C4, C12 cap. cer. 12 06 NPO ±5 % Garrett Philips 1206CG102J9BB2
2 2200 pF 50 V C27, C30 cap. cer. 1206 NPO ±5 % Garrett Philips 1206CG222J9BB2
30.01μF 50 V C3, C11,
C29 cer. cap. 1206 X7R ±10 % Garrett Philips 12062R103K9BB2
70.1μF 50 V C7, C16,
C17, C22,
C23, C32,
C35
cer. cap. 1206 X7R ±10 % Garrett Philips 12062R104K9BB2
315μF 10 V C8, C33,
C34 tantalum capacitor chips Garrett Philips 49MC106C006KOAS
Surface mount variable capacitors
35pF to
30 pF C1, C5, C13 trimmer capacitor Kent
Elect Kyocera CTZ3S-30C-W1
Surface mount resistors
10Ω50 V R4 Res. chip 1206 ±5 % Garrett ROHM MCR18JW000E
110Ω50 V R1 Res. chip 1206 ±5 % Garrett ROHM MCR18JW100E
124Ω50 V R17 Res. chip 1206 ±5 % Garrett ROHM MCR18JW240E
139Ω50 V R15 Res. chip 1206 ±5 % Garrett ROHM MCR18JW390
1220Ω50 V R16 Res. chip 1206 ±5 % Garrett ROHM MCR18JW221E
1510Ω50 V R7 Res. chip 1206 ±5 % Garrett ROHM MCR18JW511E
1560Ω50 V R13 Res. chip 1206 ±5 % Garrett ROHM MCR18JW561E
11
kΩ50 V R12 Res. chip 1206 ±5 % Garrett ROHM MCR18JW102E
11.2kΩ50 V R14 Res. chip 1206 ±5 % Garrett ROHM MCR18JW122E
11.3kΩ50 V R8 Res. chip 1206 ±5 % Garrett ROHM MCR18JW132E
15.1kΩ50 V R11 Res. chip 1206 ±5 % Garrett ROHM MCR18JW512E
25.6kΩ50 V R5, R6 Res. chip 1206 ±5 % Garrett ROHM MCR18JW562E
110kΩ50 V R9 Res. chip 1206 ±5 % Garrett ROHM MCR18JW223E
122kΩ50 V R2 Res. chip 1206 ±5 % Garrett ROHM MCR18JW223E
133kΩ50 V R3 Res. chip 1206 ±5 % Garrett ROHM MCR18JW333E
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 16 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
Surface mount variable resistors
120kΩ50 V VR1 trimmer resistor
0.25 W ±20 % Garrett Philips ST-4TA203
1500kΩ50 V VR2 trimmer resistor
0.25 W ±20 % Garrett Philips ST-4TA504
Surface mount switch
1 SPDT SW1 4 mm selector switch Garret Philips CS-412YTA
Surface mount inductors
1 120 nH L2 chip inductor 1008 ±10 % Coilcraft Coilcraft 1008CS-331XKBB
1 180 nH L1 chip inductor 1008 ±10 % Coilcraft Coilcraft 1008CS-331XKBB
2 680 nH L4, L5 chip inductor 1008 ±10 % Digikey TOKO 380NB-R68M
11.8μH L7 chip inductor 1210 ±10 % Garrett J.W. Miller PM20-1R8K
12.7μH L9 chip inductor 1210 ±10 % Garrett J.W. Miller PM20-2R7K
14.7μH L3 chip inductor 1210 ±10 % Garrett J.W. Miller PM20-4R7K
16.8μH L6 chip inductor 1210 ±10 % Garrett J.W. Miller PM20-6R8K
110μH L8 chip inducto r 12 10 ±10 % Garrett J.W. Miller PM20-100K
Surface mount integrated circuits
1 5 V U1 FM IF with filter switch NXP NXP SA639
1 5 V U2 voltage comparator NXP NXP LM311B
1 5 V U3 dual D-type flip-flop NXP NXP 74HC74
1 5 V U4 dual retriggerable
multivibrator NXP NXP 74HC123
Miscellaneous
7 J1, J2, J3,
J4, J5, J6,
J7
SMA gold connector Newark EF Johnson 142-0701-801
1 JP1 8-pin header straight Mouser Molex 538-22-03-2081
1 Printed-circuit board Excel Philips DC10639
Table 4. Customer application component list for GMSK/GFSK demo board …continued
Quantity Value Voltage Component Description Vendor Manufacturer Part number
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 17 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
6. Conclusions
An NXP low-voltage high-performance FM/IF system (SA639) based GFSK modem
evaluation board is presented. Experimental performance evaluation including bit error
rate (BER), sensitivity to frequency offset, and sensitivity to FM deviation variation of this
system has been conducted based on DECT specifications. Results indicate that a
superior perform ance can be achieved with the NXP FM/IF systems for high-spe ed digit al
wireless applications.
7. Abbreviations
Table 5. Abbreviations
Acronym Description
ADPCM Adaptive Differential Pulse Code Modulation
BER Bit Error Rate
CODEC COder-DECoder
DECT Digital European Cordless Telephone
DQPSK Differential Quadrature Phase Shift Keying
FDD Frequency Division Duplex
FM Frequency Modulation
GFSK Gaussian filtered Frequen cy Shift Keying
IF Intermediate Frequency
ISDN Integrated Service Digital Network
LO Local Oscillator
LPF Low-Pass Filter
PACS Personal Access Communications System
PBX Public Branch eXchange
PCS Physical Coding Sublayer
PHS Personal Handyphone System
PRBS Pseudo Random Binary Sequence
PSTN Public Switched Telephone Network
RC Resistor-Capacitor network
RLL Radio Local Loop
RSSI Received Signal Strength Indicator
SINAD Signal-to-Noise And Distortion ratio
STR Symbol Timing Recovery
TDD Time Division Duplex
TDMA Time Division Multiple Access
VCO Voltage Controlled Oscillator
WPBX Wireless Public Branch eXchan ge
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 18 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
8. References
[1] AN1994, “Reviewing key areas when designing with the SA605” — application
note; NXP Semiconductors
[2] AN1996, “Demodulation at 10.7 MHz IF with SA605/SA625” — application note;
NXP Semiconductors
[3] SA639, Low voltage mixer FM IF system with filter amplifier and data
switch — Product data sheet; NXP Semiconductors;
www.nxp.com/documents/data_sheet/SA639.pdf
[4] AN1997, “NXP FM/IF systems for GMSK/GFSK receivers — application note;
NXP Semiconductors
[5] “GMSK modulation for digital mobile radio telephony”K. Murota and
K. Hirade; IEEE Transactions on Communications; July 1981
[6] “Digital Communications, Satellite/Earth Station Engineering”Prentice Hall;
1983
AN1998 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Application note Rev. 3 — 24 July 2014 19 of 20
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
9. Legal information
9.1 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
9.2 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charge s) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ ag gregate and cumulative l iability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semicondu ctors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suit able for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors prod ucts in such equipment or
applications and theref ore such inclusi on and/o r use is at the cu stome r’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modificat i on.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors pr oducts, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with t heir
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from competent authorities.
Evaluation products This product is provided on an “as is” and “with all
faults” basis for eval uation purposes only. NXP Semiconductors, its affiliates
and their supplie rs expressly disclaim all warrant ies, whether express, impl ied
or statutory, including but not limited to the implied warranties of
non-infringement, mercha ntability and fitness for a particular purpose. The
entire risk as to the quality, or arising out of the use or performance, of this
product remains with customer.
In no event shall NXP Semiconductors, it s aff iliates or thei r suppliers be liable
to customer for any special, indirect, consequ ential, punitive or incidental
damages (including without li mit ation d amages for l oss of bu siness, bu siness
interruption, loss of use , loss of data or information, and the like) arising out
the use of or inability to use the product, whet her or not based on tort
(including negligence), st rict liability, breach of contract, breach of warrant y or
any other theory, even if advised of the possibility of such damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer base d on
reasonable reliance up to the greater of the amount actually paid by customer
for the product o r five dollars (U S$5.00). The for egoing limita tions, exclusions
and disclaimers shall apply to the maximum extent permitt ed by applicable
law, even if any remedy fails of its essential purpose.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
9.3 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
NXP Semiconductors AN1998
An FM/IF system for DECT and other high-speed GFSK applications
© NXP Semiconductors N.V. 2014. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 July 2014
Document identifier: AN199 8
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
10. Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Review of DECT standard. . . . . . . . . . . . . . . . . 3
3 The SA639 FM/IF system. . . . . . . . . . . . . . . . . . 6
4 Structure of the SA639 evaluation board . . . . 8
5 Performance evaluation . . . . . . . . . . . . . . . . . 10
6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
9.1 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
9.2 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
9.3 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
10 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20