NJU7181
– 1
–
Version 5.4E
SIGNAL LEVEL SENSOR SYSTEM
GENERAL DESCRIPTION
The NJU7181 is a signal level sensor system IC. It sends
a High flag to the microprocessor or other equipments
whenever it detects the existence of the audio signal.
The NJU7181 includes a delay circuit which allows the
IC continue to hold the flag after the absence of the audio
signal. This holding time can be adjusted with external
capacitor.
Together with its adjustable Input Sensitivity (by extern al
resistor) & its characteristic of low current consumption and
low operating voltage, NJU7181 is suitable for Eco-Design of
Energy-using Products and for battery operated applications.
FEATURES
• Operating Voltage 0.9 to 5.5V
• Low Operating Current 55µA typ.
• Delay circuit for long Recovery time
• Adjustable Recovery time by external capacitor
• Adjustable Input Sensitivity by external resistance
• C-MOS Technology
• Package Outline MSOP8 (TVSP8)*
ESON8
*MEET JEDEC MO-187-DA / THIN TYPE
APPLICATIONS
• Power Saving for battery operated devices
• Muting Application
• Memory saving for recording devices
• Half- duplex transmission application
BLOCK DIAGRAM
PACKAGE OUTLINE
Level
Det ec tor Delay
Latch
CLR
D
L
IN
OUT
V
+
V
+
ON
OFF
Ex ter na l Tr ig g e r
NJU7181RB1
MSOP8 (TVSP8) NJU7181KU1
NJU7181
– 2 –
PIN CONFIGURATION
MSOP8 (TVSP8) ESON8
Surface Backside
No. Symbol Function
1 IN AC Input
2 AMP_OUT Amplifier Output
3 TRIN External Trigger Input
4 GND Ground
5 CAP_D Delay Time Capacitor
6 RES_D Delay Time Resister
7 OUT DC Output
8 V
+
Supply Voltage
1432
8567
85
67
1432
18
5
4
NJU7181
– 3
–
ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER SYMBOL RATING UNIT
Supply Voltage V
+
+7 V
Power Dissipation P
D
MSOP8 (TVSP8): 470 (Note1)
ESON8: 450 mW
Maximum Input Voltage V
IMAX
0 ~ V
+
(Note2) V
Operating Temperature Range Topr -40 ~ +85 °C
Storage Temperature Range Tstg -40 ~ +125 °C
(Note1) EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
(Note2) Don’t put Input Voltage more than Power Supply Voltage.
ELECTRICAL CHARACTERISTICS
(Ta=25°C, V
+
=3V, R
1
=10kΩ, R
2
=100kΩ, R
d
=220k, C
d
=10nF)
PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Operating Voltage V
+
0.9 - 5.5 V
Operating Current I
DD
No signal, R
L
= - 55 100 µA
Input Sensitivity V
INS
f=1kHz -45 -41.5 -38 dBV
Delay Time 1 T
delay1
1.0 1.5 2.0 Sec
Delay Time 2 T
delay2
V
+
=0.9V 1.0 1.5 2.0 Sec
Delay Time 3 T
delay3
C
d
=10µF - 1,500 - Sec
DC CHARACTERISTICS
DC Output Terminal (7pin)
(Ta=25°C)
PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
High Level Output Voltage
V
OH
I
SOURCE
=1mA V
+
-0.2 - V
+
V
Low Level Output Voltage
V
OL
I
SINK
=1mA 0 - 0.2 V
External Trigger Switch Terminal (3pin)
(Ta=25°C)
High Level Input Voltage
V
IH
V
+
-0.2 - V
+
V
Low Level Input Voltage
V
IL
0 - 0.2 V
NJU7181
– 4 –
TEST CIRCUIT
1
IN 10uF
+
10k100k
10pF
22k
AI
DD
3 42
8 6 57
+
10uF
VDD
V
VDD
1mA
220k
1nF
NJU7181
IN AMP_OUT TRIN GND
CAP_D
RES_D
OUTV+
NJU7181
– 5
–
APPLICATION CIRCUIT
Level
Det ec tor
Latch
CLR
D
L
DC Output
V
+
V
+
ON
OFF
External Trigger
Ci R
1
R
2
R
D
=220k
C
D
100k
Main Path
Audio Signal Input
Hi gh or Low
DC voltage information
(to Micro Processor, etc)
Delay
Low High Low
DC Output (NJU7181)
Input sensitivity
(Detecti on l evel)
Delay Time
(Adjustabl e fr om a few second to a few minutes by C
D
)
A
udio Signal Input
Audio Signal Output
NJU7181
– 6 –
Attack Time:
Note:
1
10uF
+
10k100k
10pF
3 42
8 6 57
+
10uF
VDD
220k
10nF
NJU7181
IN AMP_OUT TRIN GND
CAP_D
RES_D
OUTV+
Input
OUTPUT
Supply De-coupling capacitor
has to be placed near IC
(especially w hen IC socket is
being used).
100k
Feedback Capacitor is required
to prevent the possibility to of
oscillation in the input stage.
External Control
(Control from MicroProcessor, etc.)
NJU7181
– 7
–
APPLICATION NOTE
•
DC Output Waveform Scenario
Scenario 1:
Power-ON
– Output will be high initially when NJU7181 is first powered up even if there is no input signal detected.
Power
DC Output
(NJU7181)
LOW LOW
High
No In p ut Signal d ete ct ed
Power On
De layTIme : T
delay
POWER ON with no signal detected
Trigger
No Sign al d et ec t ed (Lo w)
Audio Signal Input
Scenario 2:
Only Audio Signal detected
– Output will be or maintain high when either an input signal or trigger signal is detected. The
delay circuit will only be activated when both signals is not present. NJU7181 will then hold the
output level for a delay time which can be adjusted by the Capacitor value @ pin 5.
Power
LOW LOW
High
Power On
DelayTIme : T
delay
Audio si gnal present
Trigger
No Signal d et ect ed (Lo w)
Sign a l Det e ct ed
Audio Signal Input
NJU7181
– 8 –
Scenario 3:
Trigger Signal detected (Case 1)
– Output will be or maintain high when either an input signal or trigger signal is detected. The
delay circuit will only be activated wh en b ot h sig nals i s n ot presen t. Output is set to Low state when
a delay time passes. Output is set to High state when either an input signal or trigger signal is detected
again.
Power
LOW LOW
High
Power On
DelayTIme : T
delay
Case 1 : Tr igger si gn al pr esent (Aft erout put LOW )
Trigger
Trigger detected
Signal Dete cted
High d u e t o tr iggger
Audio Signal Input
DC Output
(NJU7181)
DelayTIme : T
delay
LOW
Scenario 4:
Trigger Signal detected (Case 2)
– Output will be or maintain high when either an input signal or trigger signal is detected. When
hold time is shorter than a delay time, output maintains High state (Counter RESET). NJU7181 will then
hold the output level for a delay time which can be adjusted by the Capacitor value @ pin 5.
Power
LOW
High
Power On
Hold Time
Case 2: Trigger signal present (Duringoutput HIGH)
Trigger
Tr igge r d e te ct ed
Sign a l Det ec t ed
When hold time is s horter than T
delay
,
DC_Output maintains High state.
( Counter RESET)
Audio Si gnal Input
DC Output
(NJU7181)
DelayT Ime : T
delay
LOW
NJU7181
– 9
–
¡
¡¡
¡ Input Sensitivity [Ta =25
°
°°
°C
]
The input sensitivity is defined as follows.
V
INS
=20*log(R1/R2) – 21.5 [dBV] ----- (1)
Note) The input sensitivity recommends the setting of -60dBV (1mVrms) or more.
Note) The R2 value should be 100kΩ or more.
¡
¡¡
¡ Frequency Response
The input capacitor “Ci” forms HPF with “R1”.
The cut-off frequency is defined as follows. Please decide C1 value
in consideration of the frequency response necessary for the signal-detecting.
fc=1/(2×Ci×R1) [Hz] ----- (2)
¡
¡¡
¡ Delay time [With R
D
= 220Kohm]
The Recovery time is defined as follows.
T
delay
=1.5*10
8
*C
R
[sec] ----- (3)
NJU7181
– 10 –
TERMINAL DESCRIPTION
Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
1 IN AC Input
0.3V
2 AMP_OUT Amplifier Output
0.3V
3 TRIN
External Trigger
Input
-
5 CAP_D
Delay Time
Capacitor
0V
NJU7181
– 11
–
TERMINAL DESCRIPTION
Terminal SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
6 RES_D
Delay Time
Resistor
3uA x R
D
7 OUT DC Output
0 or V
+
8 V
+
Supply Voltage
V
+
NJU7181
– 12 –
TYPICAL CHARACTERISTICS
Operating Current Vs Operating Voltage
Cd = 10nF, Rd = 220k, No Input
0
10
20
30
40
50
60
70
80
90
100
012345678
Operating Voltage, + (V)
Operating Current, Icc (µA)
25°
C
105°
C
-40°
C
Operating current Vs Tempe rature
VDD = 3V, Cd = 10nF, Rd = 220k, No Input
20
30
40
50
60
70
80
90
100
-50 -25 0 25 50 75 100 125 150
Temperature, (°C)
Operating Current, Icc (µA)
Output Voltage Vs Output Current Source
VDD = 3V, Ta = 25°C, Cd = 10nF, Rd = 220k, Output = High
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0.001 0.01 0.1 1 10 100
Output Source Current, (mA)
Output voltage, VOH (V)
105°
C
-40°
C
Output Voltage Vs Output Current Sink
VDD = 3V, Ta = 25°C, Cd = 10nF, Rd = 220k, Output = High
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0.001 0.01 0.1 1 10 100
Output Sink Current, (mA)
Output voltage, VOL (V)
105°
C
-40°
C
Output Voltage Vs Temperature
VDD = 3V, Cd = 10nF, Rd = 220k, Output = High,
Current Source = 1mA
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125 150
Temperature, (°C)
OutPut Voltage, Vout (V)
Output Voltage Vs Temperature
VDD = 3V, Cd = 10nF, Rd = 220k, Output = High,
Current Sink = 1mA
0
0.05
0.1
0.15
0.2
0.25
0.3
-50 -25 0 25 50 75 100 125 150
Temperature, (°C)
Output Voltage, Vout (V)
NJU7181
– 13
–
TYPICAL CHARACTERISTICS
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Input Se nsitivity Vs Temperature
VDD = 3V, Cd = 10nF, Rd = 220k, R1=10k, R2=100k
-46
-45
-44
-43
-42
-41
-40
-39
-38
-37
-36
-35
-50 -25 0 25 50 75 100 125 150
Temperature, (°C)
Input Sensitivity (dBV)
Input Se nsitivity Vs Supply Volta ge
VDD = 3V, Ta = 25°C, Cd = 10nF, Rd = 220k,
R1=10k, R2=100k
-46
-45
-44
-43
-42
-41
-40
-39
-38
-37
-36
-35
01234567
Supply Voltage VDD, (V)
Input Sensitivity (dBV)
-40°
C
25°
C
105°
C
Delay Time Vs Ca pacitor
V DD = 3V , Ta = 25°C, Rd = 220k, R1=10k, R2=100k
0.001
0.01
0.1
1
10
100
1000
10000
0.00001 0.0001 0.001 0.01 0.1 1 10
Capacitor Value (Cd)
Delay Time (sec
)
10pF 100pF 1nF 10nF 100nF 1uF 10uF
Gain vs Fr e q uency
VDD = 3V, Ta = 25°C, Cd = 10nF, Rd = 220k,
Measure @ pin 2 (AMP_OUT)
0
5
10
15
20
25
30
35
40
45
50
10 100 1,000 10,000 100,000 1,000,000
Frequency (Hz)
Gain (dB)
40dB(R1=1k, R2=100k)
20dB(R1=10k, R2=100k)
