LAN91C96-MU - Microchip Technology, Inc.

SMSC LAN91C96 5v&3v Revision 1.0 (10-24-08)

PRODUCT PREVIEW

LAN91C96

Non-PCI Single-Chip

Full Duplex Ethernet

Controller with Magic

Packet

Data Brief

Product Features

 Non-PCI Single-Chip Ethernet Controller

 A Subset of Motorola 68000 Bus Interface

Support

 Fully Supports Full Duplex Switched Ethernet

 Supports Enhanced Transmit Queue

Management

 6K Bytes of On-Chip RAM

 Supports IEEE 802.3 (ANSI 8802-3) Ethernet

Standards

 Automatic Detection of TX/RX Polarit y Rev ersal

 Enhanced Power Management F eatures

 Supports “Magic Packet” Power Management

Technology

 Hardware Memory Management Unit

 Optional Configuration via Serial EEPROM

Interface (Jumperless)

 Supports single +5V or +3.3V (for Revisions E

and Later) VCC Designs

 Supports Mixed Voltage External PHY Designs

 Low Power CMOS Design

 100 Pin QFP and TQFP (1.0 mm body

Thickness) Lead-Free RoHS Compl iant

Packages

 Pin Compatible with the LAN91C92 and

LAN91C94

Bus Interface

 Direct Interface to Local Bus, PCMCIA, and

68000 Buses with No Wait States

 Flexible Bus Interface

 16 Bit Data and Control Paths

 Fast Access Time

 Pipelined Data Path

 Handles Block Word Transfers for any

Alignment

 High Performance Chained ("Back-to-Back")

Transmit and Receive

 Pin Compatible with the LAN91C9 2 (in Local

Bus Mode) and the LAN91C94 in Both Local

Bus and PCMCIA Modes

 Dynamic Memory Allocation Between Transmit

and Receive

 Flat Memory Structure for Low CPU Overhead

 Buffered Architecture, Insensitive to Bus

Latencies (No Overruns/Underruns)

 Supports Boot PROM for Diskless Local Bus

Applications

Network Interface

 Integrated 10BASE-T Transceiver Functions:

- Driver and Receiver

- Link Integrity Test

- Receive Polarity Detection and Correction

 Integrated AUI Interface

 10 Mb/s Manchester Encoding/Deco din g and

Clock Recovery

 Automatic Retransmission, Bad Packet

Rejection, and T r ansmit Padding

 External and Internal Loo pback Modes

 Four Direct Driven LEDs for Status/ Diagnostics

Software Drivers

 LAN9000 Drivers for Major Network Operating

Systems Utilizing Local Bus or PCMCIA

Interface

 Software Drivers Compatible with the

LAN91C92, LAN91C94, LAN91C100FD (100

Mb/s), and LAN91C110 (100 Mb/s) Controllers

in Local Bus Mode

 Software Drivers Utilize Full Capability of 32 Bit

Microprocessor

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

Revision 1.0 (10-24-08) Page 2 SMSC LAN91C96 5v&3v

PRODUCT PREVIEW

ORDER NUMBERS:

LAN91C96-MS for 100 pin, QFP Lead-Free RoHS Compliant package

LAN91C96-MU for 100 pin, TQFP Lead-Free RoHS Compliant package

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete

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DAMAGES.

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

SMSC LAN91C96 5v&3v Page 3 Revision 1.0 (10-24-08)

PRODUCT PREVIEW

General Description

The LAN91C96 is a VLSI Ethernet Controll er that combines Local Bus, PCMCIA, and Motorola 68 000 bus

interfaces in one chip. LAN91C96 integrates all MAC and physical layer functions, as well as the packet

RAM, needed to implem ent a high p erformance 10BASE-T (t wisted pair) node. For 10BA SE5 (thick coax),

10BASE2 (thin coax), and 10BASE-F (fiber) implementations, the LAN91C96 interfaces to external

transceivers via the provided AUI port. Only one additional IC is required for most applications. The

LAN91C96 comes with Full Dupl ex Switched Ethernet (FDSWE) suppor t allowing the controller to provid e

much higher throughput. 6K bytes of RAM is provided to support enhanced throughput and compensate

for any increased system service latencies. The controller implements multiple advanced power-down

modes including Magic Packet to conserve power and operate more efficiently. The LAN91C96 can

directly interface with the Local Bus, PCMCIA, and 68000 buses and deliver no-wait-state operation. For

Local Bus and PCMCIA interf aces, the LAN91C 96 occupies 16 I/0 l ocations and no memor y space except

for PCMCIA attribute memory space. The same I/O space is used for both LOCAL BUS and PCMCIA

operations. Its shared memory is sequentially accessed with 40ns access times to any of its registers,

including its packet memory. DMA services are not used by the LAN 91C96, virtually de-coup ling network

traffic from local or system bus utilization. For packet memory management, the LAN91C96 integrates a

unique hardware Memory Management Unit (MMU) with enhanced performance and decreased software

overhead when compared to ring buffer and linked list architectures. The LAN91C96 is portable to

different CPU and bus platforms due to its flexible bus interface, flat memory structure (no pointers), and

its loosely coupled buffered architecture (not sensitive to latency).

The LAN91C96 is availa ble i n 100-pi n QF P and TQ FP (1.0 mm body thickness) pack age s. T he low profile

TQFP is ideal for mobile applications such as PC Card LAN adapters. The LAN91C96 operates with a

single power supply voltage of 5.0V. Revisions E and later will also operate using a single 3.3V power

supply.

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

Revision 1.0 (10-24-08) Page 4 SMSC LAN91C96 5v&3v

PRODUCT PREVIEW

Block Diagram

Figure 1 - LAN91C96 S ystem Block Diagram

SINGLE FUNCTION PCMCIA

CARD WITH T HE LAN91C96

LAN91C96

nCE1, nCE2, nREG, nWE

nIREQ

D0-15

RESET

nIORD, nIOWR

A0-9, A15

nIOIS16, nINPACK

nWAIT

nCEnWE

nOE

D0-7

A0-X

Attribute

Eprom

2816

PCMCIA CONNECTOR

10B ASE -T / AUI

INTERFACE

STSCHG

nFWE

nFCS

Extended

CS,SK,DI,DO

Serial Eprom

(ISA-Hy9346)

(PCMCIA)

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

SMSC LAN91C96 5v&3v Page 5 Revision 1.0 (10-24-08)

PRODUCT PREVIEW

Package Outlines

Figure 2 - 100 Pin QFP Package

MIN NOMINAL MAX REMARKS

A ~ ~ 3.4 Overall Package Height

A1 0.05 ~ 0.5 Standoff

A2 2.55 ~ 3.05 Body Thickness

D 23.65 ~ 24.15 X Span

D1 19.90 ~ 20.10 X body Size

E 17.65 ~ 18.15 Y Span

E1 13.90 ~ 14.10 Y body Size

H 0.11 ~ 0.23 Lead Frame Thickness

L 0.73 0.88 1.03 Lead Foot Length

L1 ~ 1.95 ~ Lead Length

e 0.65 Basic Lead Pitch

θ 0o ~ 7o Lead Foot Angle

W 0.20 ~ 0.40 Lead Width

R1 0.10 ~ 0.25 Lead Shoulder Radius

R2 0.15 ~ 0.40 Lead Foot Radius

ccc ~ ~ 0.10 Coplanarity

Notes:

1 Controllin g Unit: mi lli meter.

2 Tolerance on the true position of the leads is ± 0.065 mm maximum

3 Package body dimen sion s D1 and E1 do not include the mold prot rusio n .

Maximum mold protrusion is 0.25 mm.

4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.

5 Details of pin 1 identifier are optional but must be located within the zone indicated.

Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet

Revision 1.0 (10-24-08) Page 6 SMSC LAN91C96 5v&3v

PRODUCT PREVIEW

Figure 3 - 100 Pin TQFP Packag e

MIN NOMINAL MAX REMARKS

A ~ ~ 1.20 Overall Package Height

A1 0.05 ~ 0.15 Standoff

A2 0.95 ~ 1.05 Body Thickness

D 15.80 ~ 16.20 X Span

D1 13.90 ~ 14.10 X body Size

E 15.80 ~ 16.20 Y Span

E1 13.90 ~ 14.10 Y body Size

H 0.09 ~ 0.20 Lead Frame Thickness

L 0.45 0.60 0.75 Lead Foot Length

L1 ~ 1.00 ~ Lead Length

e 0.50 Basic Lead Pitch

θ 0o ~ 7o Lead Foot Angle

W 0.17 0.22 0.27 Lead Width

R1 0.08 ~ ~ Lead Shoulder Radius

R2 0.08 ~ 0.20 Lead Foot Radius

ccc ~ ~ 0.08 Coplanarity

Notes:

1 Controllin g Unit: mi lli meter.

2 Tolerance on the true position of the leads is ± 0.04 mm maximum.

3 Package body dimen sion s D1 and E1 do not include the mold prot rusio n .

Maximum mold protrusion is 0.25 mm.

4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.

5 Details of pin 1 identifier are optional but must be located within the zone indicated.