Gg HARRIS 2N6759 2N6760 N-Channel Enhancement-Mode August 1991 Power Field-Effect Transistors Features Package TO-204AA 4.54 and 5.5A, 350V - 400V BOTTOM VIEW * tpS(on) = 1-02 and 1.59 : ie mat oe SOURCE DRAIN SOA is Power-Dissipation Limited / (FLANGE) * Nanosecond Switching Speeds * Linear Transfer Characteristics Ay High Input Impedance Majority Carrier Device GATE Description The 2N6759 and 2N6760 are n-channel enhancement-mode | Terminal Diagram silicon-gate power field-effect transistors designed for applications such as switching regulators, switching converters, motor drivers, N-CHANNEL ENHANCEMENT MODE relay drivers, and drivers for high-power bipolar switching 4 Gi transistors requiring high speed and low gate-drive power. These D iy i types can be operated directly from integrated circuits. = 3 coat = These types are supplied in the JEDEC TO-204AA steel package. = ul G z = 5 a. s Absolute Maximum Ratings (Tc = +259C), Unless Otherwise Specified 2N6759 2N6760 UNITS Drain-Source Voltage .... 0... cece cece cence eee et eee e eee en eae Vos 350* 400* v Drain-Gate Voltage (RGS = 2O0KI1). 0. ccc e ete eee ee VDGR 350* 400* Vv Continuous Drain Current Neal 5s hk 4.5* 5.5* A To = H1009C 0c cece eee tenet tenes 3.0* 3.5* A Pulsed Drain Current 7.0 8.0 A Gate-Source Voltage +20 +20 v Maximum Power Dissipation To = +259C (See Figure 11)... cece cece een teen nee 75* 75* Ww To = +100C (See Figure 11) : 30* 30* w Linear Derating Factor (See Figure 11) 20.0.0... cece eee eee ee ete eee 0.6* 0.6* W/9G Inductive Current, Clamped .. 6... . ccc cece cece etn rene enneee ILM 7.0 8.0 A (See Figures 1 and 2, L = 100QuH) Operating and Storage Junction Temperature Range............ Ty. TSTG -55 to +150* ~55 to +150* C Maximum Lead Temperature for Soldering ............ 0c cee ee ence eee TL 300* 300* 9G (0.063 (1.6mm) from case for 10s) JEDEC registered values CAUTION: These devices are sensitive to electrostatic discharge. Proper !.C. handling procedures should be followed. Copyright Harris Corporation 1991 File Number 1588.1 4-15 Specifications 2N6759, 2N6760 Electrical Characteristics @ Tc = 25C (Unless Otherwise Specified) Parameter Type | Min. | Typ. | Mex. | Uns | Test Conditions BVosg _Orain Source Breakdown Voltage | 2N6759 | 350 - ~ Vv! Veg = 0 | 2N6760 | 400 - - vo | tg = 1.0ma Vgstth) Gate Threshold Voltage ALL 2.0 - 40 v Vos = Vos. 'o = 1mA Igsse Gate - Body Leakage Forward ALL = = toor | nA | VG = 20 ~ | 4 | GS ___- igssra Gate ~ Body Leakage Reverse ALL ~ - 100 nA | Vgg- -20V loss Zero Gate Voltage Drain Current aL - 0.4 1.0 | mA | Vgg = Max. Rating, Vgg = 0 1. - G2 40 mA | Vpg = Max. Rating, Vgg = 0, To = 125C Vpston) Static Drain-Source On-State 2N6759 - - v Vag * 10V, Ip = 4.54 Voltage 2ne760 | - - vs | Veg < 10V, Ip = 5.58 Rosten} Stauc Drain-Source On-State 2N6?59 - 1.0 2 Vgg 7 10V, [p 3A Resistance (7) 2N6760 - 08 2 | Vgg= 10V, 1p = 3.54 Rosion) Static Drain-Source On-State 2NG759 - - 2 Vgg * 10V, Ip = FA. Te = 125C Alesistance 2N6760 ~ - 2 Vg = 10V, Ip = 3.5A, Te = 125C on Forward Transconductance (1) att | ao" | 45 S18) | Vpg = 15V, 1p = 3.5A Cis Input Capacitance au. | 350 | 600 oF Vos * 9. Vpg = 25V, 1 = 1.0 MHz Coss Output Capacitance ALL so] 150 oF ce 10 Crs Reverse Transfer Capacitance ALL 20" 40 pF es ta fon) Ture-On Delay Time ALL = mS | Vop = 178V, Ip - 35A,Z, - 152 ty Rise Time ALL - - ns | (See Figs, 13 and 14) tg (oft) Turn-Off Delay Time ALL = ns (MOSFET switching times are essentially 7 Fall Time ALL = = 18 | independent of operating temperatura.) Thermal Resistance Rinse dunction-to-Case ALL ] = Rincs Case-to-Sink ALL | - Mounting surface Hat, smooth, and greased. [Rinsa _Junction-to-Ambrent ALL l ~ 4 | Vos (of) OUTPUT, Vy Vos (an) INPUT PULSE INPUT PULSE RISE TIME ~ FALL TIME a (oft) | ym 10% 0% | 90% 90% |. ton e| [tot Fig. 14 Switching Time Waveforms