© Semiconductor Components Industries, LLC, 2009
October, 2009 − Rev. 1
1Publication Order Number:
NBXSBA030/D
NBXSBA030
2.5 V / 3.3 V, 175.00 MHz
LVPECL Clock Oscillator
The NBXSBA030, single frequency, crystal oscillator (XO) is
designed to meet today’s requirements for 2.5 V / 3.3 V LVPECL
clock generation applications. The device uses a high Q fundamental
crystal and Phase Lock Loop (PLL) multiplier to provide
175.00 MHz, ultra low jitter and phase noise LVPECL differential
output.
This device is a member of ON Semiconductor’s PureEdget clock
family that provides accurate and precision clock solutions.
Available in 5 mm x 7 mm SMD (CLCC) package on 16 mm tape
and reel in quantities of 1,000 and 100.
Features
•LVPECL Differential Output
•Uses High Q Fundamental Mode Crystal and PLL Multiplier
•Ultra Low Jitter and Phase Noise − 0.5 ps (12 kHz − 20 MHz)
•Output Frequency − 175.00 MHz
•Hermetically Sealed Ceramic SMD Package
•RoHS Compliant
•Operating Range: 2.5 V ±5% or 3.3 V ±10%
•Total Frequency Stability − $50 PPM
•This is a Pb−Free Device
Applications
•Networking
•Storage
Figure 1. Simplified Logic Diagram
PLL
Clock
Multiplier
Crystal
GNDNCOE
CLK CLKVDD
654
123
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Device Package Shipping†
ORDERING INFORMATION
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
NBXSBA030LN1TAG CLCC−6
(Pb−Free)
1000/Tape & Reel
MARKING DIAGRAM
NBXSBA030 = NBXSBA030 (±50 PPM)
175.0000 = Output Frequency (MHz)
AA = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
6 PIN CLCC
LN SUFFIX
CASE 848AB
NBXSBA030
175.0000
AAWLYYWWG
NBXSBA030LNHTAG CLCC−6
(Pb−Free)
100/Tape & Reel
NBXSBA030
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2
NC
OE
GND
CLK
VDD
CLK
1
2
3
6
5
4
Figure 2. Pin Connections (Top View)
Table 1. PIN DESCRIPTION
Pin No. Symbol I/O Description
ÁÁÁÁÁ
ÁÁÁÁÁ
1
ÁÁÁÁ
ÁÁÁÁ
OE
ÁÁÁÁÁ
ÁÁÁÁÁ
LVTTL/LVCMOS
Control Input
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output Enable Pin. When left floating pin defaults to logic HIGH and output is active.
See OE pin description Table 2.
ÁÁÁÁÁ
ÁÁÁÁÁ
2
ÁÁÁÁ
ÁÁÁÁ
NC
ÁÁÁÁÁ
ÁÁÁÁÁ
N/A
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
No Connect.
ÁÁÁÁÁ
ÁÁÁÁÁ
3
ÁÁÁÁ
ÁÁÁÁ
GND
ÁÁÁÁÁ
ÁÁÁÁÁ
Power Supply
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Ground 0 V
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
CLK
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
LVPECL Output
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Non−Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD − 2 V.
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
5
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
CLK
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
LVPECL Output
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
VTT = VDD − 2 V.
ÁÁÁÁÁ
ÁÁÁÁÁ
6
ÁÁÁÁ
ÁÁÁÁ
VDD
ÁÁÁÁÁ
ÁÁÁÁÁ
Power Supply
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Positive power supply voltage. Voltage should not exceed 2.5 V ±5% or 3.3 V ±10%.
Table 2. OUTPUT ENABLE TRI−STATE FUNCTION
OE Pin Output Pins
Open Active
HIGH Level Active
LOW Level High Z
Table 3. ATTRIBUTES
Characteristic Value
Internal Default State Resistor 170 kW
ESD Protection Human Body Model
Machine Model
2 kV
200 V
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Units
VDD Positive Power Supply GND = 0 V 4.6 V
Iout LVPECL Output Current Continuous
Surge
25
50
mA
TAOperating Temperature Range −40 to +85 °C
Tstg Storage Temperature Range −55 to +120 °C
Tsol Wave Solder See Figure 5 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NBXSBA030
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3
Table 5. DC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 2)
Symbol Characteristic Conditions Min. Typ. Max. Units
IDD Power Supply Current 95 105 mA
VIH OE Input HIGH Voltage 2000 VDD mV
VIL OE Input LOW Voltage GND − 300 800 mV
IIH Input HIGH Current OE
FSEL
−100
−100
+100
+100
mA
IIL Input LOW Current OE
FSEL
−100
−100
+100
+100
mA
VOH Output HIGH Voltage VDD−1195 VDD−945 mV
VOL Output LOW Voltage VDD−1945 VDD−1600 mV
VOUTPP Output Voltage Amplitude 700 mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4.
Table 6. AC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3)
Symbol Characteristic Conditions Min. Typ. Max. Units
fCLKOUT Output Clock Frequency 175.00 MHz
DfFrequency Stability − NBXSBA030 (Note 4) ±50 ppm
FNOISE Phase−Noise Performance
fCLKout = 175.00 MHz
(See Figure 3)
100 Hz of Carrier −101 dBc/Hz
1 kHz of Carrier −118 dBc/Hz
10 kHz of Carrier −125 dBc/Hz
100 kHz of Carrier −125 dBc/Hz
1 MHz of Carrier −132 dBc/Hz
10 MHz of Carrier −159 dBc/Hz
tjit(F)RMS Phase Jitter 12 kHz to 20 MHz 0.5 0.7 ps
tjitter Cycle to Cycle, RMS 1000 Cycles 1.5 8 ps
Cycle to Cycle, Peak−to−Peak 1000 Cycles 15 30 ps
Period, RMS 10,000 Cycles 1 4 ps
Period, Peak−to−Peak 10,000 Cycles 10 20 ps
tOE/OD Output Enable/Disable Time 200 ns
tDUTY_CYCLE Output Clock Duty Cycle
(Measured at Cross Point)
48 50 52 %
tROutput Rise Time (20% and 80%) 250 400 ps
tFOutput Fall Time (80% and 20%) 250 400 ps
tstart Start−up Time 1 5 ms
Aging 1st Year 3 ppm
Every Year After 1st 1 ppm
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4.
4. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration, and first year aging.
NBXSBA030
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4
Figure 3. Typical Phase Noise Plot
Table 7. RELIABILITY COMPLIANCE
Parameter Standard Method
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Shock
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Mechanical
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MIL−STD−833, Method 2002, Condition B
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Solderability
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Mechanical
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MIL−STD−833, Method 2003
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Vibration
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Mechanical
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MIL−STD−833, Method 2007, Condition A
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Solvent Resistance
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Mechanical
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MIL−STD−202, Method 215
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Thermal Shock
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Environment
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MIL−STD−833, Method 1011, Condition A
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
Moisture Level Sensitivity
ÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁ
Environment
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
MSL1 260°C per IPC/JEDEC J−STD−020D
NBXSBA030
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5
Figure 4. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Zo = 50 W
Zo = 50 W
50 W50 W
VTT
VTT = VDD − 2.0 V
NBXSBA030
260
217
175
150
Temperature (°C)
temp. 260°C
20 − 40 sec. max.
Time
60180 sec.
3°C/sec. max.
cooling
6°C/sec. max.
60150 sec.
reflow
peak
pre−heat
ramp−up
Figure 5. Recommended Reflow Soldering Profile
NBXSBA030
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6
PACKAGE DIMENSIONS
6 PIN CLCC, 7x5, 2.54P
CASE 848AB−01
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
0.15 C
TERMINAL 1
INDICATOR
TOP VIEW
A
A1
A3
0.10 C
CSEATING
PLANE
SIDE VIEW
L
6X
12
56
D3
DIM
A
MIN NOM MAX
MILLIMETERS
1.70 1.80 1.90
A1 0.70 REF
b1.30 1.40 1.50
D1 6.17 6.20 6.23
D2 6.66 6.81 6.96
E1 4.37 4.40 4.43
R0.70 REF
L1.17 1.27 1.37
A2 0.36 REF
A3 0.08 0.10 0.12
D7.00 BSC
D3 5.08 BSC
E5.00 BSC
E2 4.65 4.80 4.95
E3 3.49 BSC
e2.54 BSC
D1
E1
D2
E2
A2
3
4
E3
R
4X
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
PITCH
2.54
1.50
6X
5.06
1.50
6X
DIMENSION: MILLIMETERS
H
H1.80 REF
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
NBXSBA030/D
PureEdge is a trademark of Semiconductor Industries, LLC (SCILLC).
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