1
LTC4011
4011p
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
High Efficiency Standalone
Nickel Battery Charger
Complete NiMH/NiCd Charger for 1 to 16 Cells
No Microcontroller or Firmware Required
550kHz Synchronous PWM Current Source Controller
No Audible Noise with Ceramic Capacitors
PowerPath
TM
Control Support
Programmable Charge Current: 5% Accuracy
Wide Input Voltage Range: 4.5V to 34V
Automatic Trickle Precharge
V Fast Charge Termination
Optional T/t Fast Charge Termination
Automatic NiMH Top-Off Charge
Programmable Timer
Automatic Recharge
Multiple Status Outputs
Micropower Shutdown
20-Lead Thermally Enhanced TSSOP Package
Integrated or Standalone Battery Charger
Portable Instruments or Consumer Products
Battery-Powered Diagnostics and Control
Back-Up Battery Management
PowerPath is a trademark of Linear Technology Corporation.
The LTC
®
4011 provides a complete, cost-effective nickel
battery fast charge solution in a small package using few
external components. A 550kHz PWM current source
controller and all necessary charge initiation, monitoring
and termination control circuitry are included.
The LTC4011 automatically senses the presence of a DC
adapter and battery insertion or removal. Heavily dis-
charged batteries are precharged with a trickle current.
The LTC4011 can simultaneously use both –V and T/t
fast charge termination techniques and can detect various
battery faults. If necessary, a top-off charge is automati-
cally applied to NiMH batteries after fast charging is
completed. The IC will also resume charging if the battery
self-discharges after a full charge cycle.
All LTC4011 charging operations are qualified by actual
charge time and maximum average cell voltage. Charging
may also be gated by minimum and maximum tempera-
ture limits. NiMH or NiCd fast charge termination param-
eters are pin-selectable.
Integrated PowerPath control support ensures that the
system remains powered at all times without allowing load
transients to adversely affect charge termination.
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
INFET
FAULT
CHRG
TOC
READY
VCC
TGATE
VCDIV
VCELL
VTEMP
LTC4011
DCIN
TIMER
GND
CHEM
VRT
INTVDD
SENSE
BAT
FROM
ADAPTER
4.5V TO 34V
10µH
10µF
TO
SYSTEM
LOAD
0.05
2-CELL
NiMH PACK
WITH 10k NTC
(2AHr)
4011 TA01a
3k
20k
49.9k
10k 10k
10.7k
0.1µF0.033µF0.068µF
10µF
30.9k
BGATE
PGND
2A NiMH Battery Charger
TIME (MINUTES)
0
1.25
CELL VOLTAGE (V)
BATTERY TEMPERATURE (°C)
1.30
1.40
1.45
1.50
1.60
4011 TA01b
1.35
1.55
28
30
34
36
38
42
32
40
40 100
20 60 80
SINGLE CELL
VOLTAGE
CHARGE
CURRRENT
BATTERY
TEMPERATURE
2A
1A
TOP OFF
Typical NiMH Charge Cycle at 1C
Electrical Specifications Subject to Change
2
LTC4011
4011p
ORDER PART
NUMBER
(Note 1)
V
CC
(Input Supply) to GND .......................0.3V to 40V
DCIN to GND ............................................ 0.3V to 40V
FAULT, CHRG, V
CELL
, V
CDIV
, BAT, TOC
or READY to GND .......................... 0.3V to V
CC
+ 0.3V
SENSE to BAT ...................................................... ±0.3V
CHEM, V
TEMP
or TIMER to GND .............. 0.3V to 3.5V
PGND to GND ...................................................... ±0.3V
Operating Ambient Temperature Range
(Note 2) .................................................. 40°C to 85°C
Operating Junction Temperature (Note 3) ........... 125°C
Storage Temperature Range ................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
LTC4011EFE
T
JMAX
= 125°C, θ
JA
= 38°C/W
EXPOSED PAD (PIN 21) IS GND. MUST BE SOLDERED TO
PCB TO OBTAIN SPECIFIED THERMAL RESISTANCE
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
FE PACKAGE
20-LEAD PLASTIC TSSOP
1
2
3
4
5
6
7
8
9
10
TOP VIEW
20
19
18
17
16
15
14
13
12
11
DCIN
FAULT
CHRG
CHEM
GND
V
RT
V
TEMP
V
CELL
V
CDIV
TIMER
INFET
READY
V
CC
TGATE
PGND
BGATE
INTV
DD
TOC
BAT
SENSE
21
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CC
Supply
V
CC
Input Voltage Range 4.5 34 V
I
SHDN
Shutdown Quiescent Current (Note 5) V
CC
= BAT = 4.8V 5 10 µA
I
Q
Quiescent Current Waiting to Charge (Pause) 35mA
I
CC
Operating Current Fast Charge State, No Gate Load 59mA
V
UVLO
Undervoltage Threshold Voltage V
CC
Increasing 3.95 4.2 4.45 V
V
UV(HYST)
Undervoltage Hysteresis Voltage 170 mV
V
SHDNI
Shutdown Threshold Voltage DCIN – V
CC
, DCIN Increasing 20 30 42 mV
V
SHDND
Shutdown Threshold Voltage DCIN – V
CC
, DCIN Decreasing –45 –25 15 mV
V
CE
Charge Enable Threshold Voltage V
CC
– BAT, V
CC
Increasing 400 510 600 mV
INTV
DD
Regulator
V
DD
Output Voltage No Load 4.5 5 5.5 V
I
DD
Short-Circuit Current (Note 6) INTV
DD
= 0V –100 –50 –28 mA
INTV
DD(MIN)
Output Voltage V
CC
= 4.5V, I
DD
= –10mA 3.85 V
Thermistor Termination
V
RT
Output Voltage R
L
= 10k 3.125 3.3 3.475 V
3.05 3.55 V
I
RT
Short-Circuit Current V
RT
= 0V –9 –1 mA
PWM Current Source
V
FS
BAT – SENSE Full-Scale Regulation 0.3V < BAT < V
CC
– 0.3V (Note 5) 95 100 105 mV
Voltage (Fast Charge) BAT = 4.8V 95 100 105 mV
V
PC
BAT – SENSE Precharge Regulation 0.3V < BAT < V
CC
– 0.3V (Note 5) 16 20 24 mV
Voltage BAT = 4.8V 16 20 24 mV
3
LTC4011
4011p
The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
TC
BAT – SENSE Top-Off Charge 0.3V < BAT < V
CC
– 0.3V (Note 5) 6.5 10 13.5 mV
Regulation Voltage BAT = 4.8V 6.5 10 13.5 mV
V
LI
BAT – SENSE Line Regulation 5.5V < V
CC
< 34V, Fast Charge ±0.3 mV
I
BAT
BAT Input Bias Current 0.3V < BAT < V
CC
– 0.1V –2 2 mA
I
SENSE
SENSE Input Bias Current SENSE = BAT 50 150 µA
I
OFF
Input Bias Current SENSE or BAT, V
CELL
= 0V –1 0 1 µA
f
TYP
Typical Switching Frequency 460 550 615 kHz
f
MIN
Minimum Switching Frequency 20 30 kHz
DC
MAX
Maximum Duty Cycle 98 99 %
V
OL(TG)
TGATE Output Voltage Low V
CC
> 9V, No Load 5 5.6 8.75 V
(V
CC
– TGATE, Note 7) V
CC
< 7.5V, No Load V
CC
–V
CC
V
0.5
V
OH(TG)
TGATE Output Voltage High V
CC
– TGATE, No Load 050mV
t
R(TG)
TGATE Rise Time C
LOAD
= 3nF, 10% to 90% 35 100 ns
t
F(TG)
TGATE Fall Time C
LOAD
= 3nF, 10% to 90% 45 100 ns
V
OL(BG)
BGATE Output Voltage Low No Load 050mV
V
OH(BG)
BGATE Output Voltage High No Load INTV
DD
INTV
DD
V
– 0.075
t
R(BG)
BGATE Rise Time C
LOAD
= 1.6nF, 10% to 90% 35 65 ns
t
F(BG)
BGATE Fall Time C
LOAD
= 1.6nF, 10% to 90% 15 65 ns
ADC Inputs
I
LEAK
Analog Channel Leakage 0V < V
CELL
< 2V, 550mV < V
TEMP
< 2V ±100 nA
Charger Thresholds
V
BP
Battery Present Threshold Voltage 320 350 370 mV
V
BOV
Battery Overvoltage 1.85 1.95 2.05 V
V
MFC
Minimum Fast Charge Voltage 850 900 950 mV
V
FCBF
Fast Charge Battery Fault Voltage 1.17 1.22 1.27 V
V
TERM
V Termination CHEM = 3.3V (NiCd) 16 20 25 mV
CHEM = 0V (NiMH) 61014mV
V
AR
Automatic Recharge Voltage V
CELL
Decreasing 1.275 1.325 1.375 V
T
TERM
T Termination (Note 8) CHEM = 3.3 (NiCd) 1.3 2 2.7 °C/min
CHEM = 0V (NiMH) 0.5 1 1.5 °C/min
T
MIN
Minimum Charging Temperature V
TEMP
Increasing 0.5 5 8.5 °C
(Note 8)
T
MAXI
Maximum Charge Initiation V
TEMP
Decreasing, Not Charging 41.5 45 47 °C
Temperature (Note 8)
T
MAXC
Maximum Fast Charge Temperature V
TEMP
Decreasing, Fast Charge 57 60 63 °C
(Note 8)
V
TEMP(D)
V
TEMP
Disable Threshold Voltage 2.8 3.3 V
V
TEMP(P)
Pause Threshold Voltage 130 280 mV
Charger Timing
t
TIMER
Internal Time Base Error –10 10 %
t
MAX
Programmable Timer Error R
TIMER
= 49.9k –20 20 %
4
LTC4011
4011p
The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PowerPath Control
V
FR
INFET Forward Regulator Voltage DCIN – V
CC
30 55 100 mV
V
OL(INFET)
Output Voltage Low V
CC
– INFET, No Load 3.75 5.2 7 V
V
OH(INFET)
Output Voltage High V
CC
– INFET, No Load 050mV
t
OFF(INFET)
INFET OFF Delay Time C
LOAD
= 10nF, INFET to 50% 3 15 µs
Status and Chemistry Select
V
OL
Output Voltage Low (I
LOAD
= 10mA) V
CDIV
435 700 mV
All Other Status Outputs 300 600 mV
I
LKG
Output Leakage Current All Status Outputs Inactive, V
OUT
= V
CC
–10 10 µA
I
IH(VCDIV)
Input Current High V
CDIV
= V
BAT
(Shutdown) –1 1 µA
V
IL
Input Voltage Low CHEM (NiMH) 900 mV
V
IH
Input Voltage High CHEM (NiCd) 2.85 V
I
IL
Input Current Low CHEM = GND –20 –5 µA
I
IH
Input Current High CHEM = 3.3V –20 20 µA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC4011E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Operating junction temperature T
J
(in °C) is calculated from the
ambient temperature T
A
and the total continuous package power
dissipation P
D
(in watts) by the formula:
T
J
= T
A
+ θ
JA
• P
D
Refer to the Applications Information section for details. This IC includes
overtemperature protection that is intended to protect the device during
momentary overload conditions. Junction temperature will exceed 125°C
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may result in
device degradation or failure.
Note 4: All current into device pins is positive. All current out of device
pins is negative. All voltages are referenced to GND, unless otherwise
specified.
Note 5: These limits are guaranteed by correlation to wafer level
measurements.
Note 6: Output current may be limited by internal power dissipation. Refer
to the Applications Information section for details.
Note 7: Either TGATE V
OH
may apply for 7.5V < V
CC
< 9V.
Note 8: These limits apply specifically to the thermistor network shown in
Figure 5 in the Applications Information section with the values specified
for a 10k NTC (β of 3750). Limits are then guaranteed by specific V
TEMP
voltage measurements during test.
5
LTC4011
4011p
TYPICAL PERFOR A CE CHARACTERISTICS
UW
NiCd Charge at 1C 4 Series NiCd 1300mAhr
NiMH Charge at 0.5C
Charger Efficiency at DCIN = 20V,
IOUT = 2A Charge Current Accuracy
Charger Soft-Start Fast Charge Current Line
Regulation
PowerPath Switching
TIME (MINUTES)
0
CELL VOLTAGE (V)
BATTERY TEMPERATURE (°C)
1.50
1.55
1.60
60
4011 G01
1.45
1.40
20 40 80
1.35
1.30
1.65
30
32
34
28
26
24
1A
22
36
CHARGE CURRENT
BATTERY
TEMPERATURE
SINGLE CELL
VOLTAGE
BATTERY VOLTAGE (V)
0
EFFICIENCY (%)
100
95
90
85
80
75
70
65
60
16
4011 G04
4 8 12 20142 6 10 18
TEMPERATURE (°C)
–12
CURRENT ERROR (%)
–8
–4
0
–10
–6
–2
10 20 30 40
4011 G05
500
FAST CHARGE
PRECHARGE
V
CC
= 12V
BAT = 4.8V
200µs/DIV
VOLTAGE (V)
AMPS (A)
10
5
5
0
2
1
0
4011 G06
TGATE
BGATE
FAST CHARGE CURRENT
PRECHARGE CURRENT
V
CC
(V)
6
–3
CURRENT ERROR (%)
–2
–1
0
1
3
10 14 18 22
4011 G07
26 30
2
50°C
25°C
0°C
BAT = 4.8V
Fast Charge Current Output
Regulation
BAT (V)
0
–3
CURRENT ERROR (%)
–2
0
1
2
48
4011 G08
–1
12 16
3
50°C
25°C
0°C
VCC = 20V
VOLTAGE (V)
8
12
4011 G09
4
100µs/DIV
DC674A WITH 1k SYSTEM LOAD AND 20k
DCIN SHUNT, CHARGER PAUSED
0
V
CC
INFET
DCIN
DCIN OPEN
TIME (MINUTES)
1.30
SINGLE CELL VOLTAGE (V)
BATTERY TEMPEATURE (°C)
1.40
1.50
1.60
1.45
1.45
1.55
15
25
35
45
20
30
40
120
4011 G03
0 20 40 80 100 140 16060 180 200
CHARGE CURRENT
TOP OFF
BATTERY
TEMPERATURE
SINGLE CELL
VOLTAGE
1A
0.5A
4 SERIES NimH 2100mAHr
AA CELLS CHARGED AT 0.5C
TIME (MINUTES)
0
SINGLE CELL VOLTAGE (V)
BATTERY TEMPERATURE (°C)
1.60
1.65
1.70
30
4011 G02
1.55
1.50
10 20 40
1.45
1.35
1.40
1.75
40
45
50
35
30
25
15
20
55
CHARGE CURRENT
BATTERY
TEMPERATURE
SINGLE CELL
VOLTAGE
1A
2A
3A
4 SERIES NiCd 1300mAhr
SC CELLS CHARGED AT 2C
6
LTC4011
4011p
UU
U
PI FU CTIO S
DCIN (Pin 1): DC Power Sense Input. The LTC4011 senses
voltage on this pin to determine when an external DC
power source is present. This input should be isolated
from V
CC
by a blocking diode or PowerPath FET. Refer to
the Applications Information section for complete details.
Operating voltage range is GND to 34V.
FAULT (Pin 2): Active-Low Fault Indicator Output. The
LTC4011 indicates various battery and internal fault con-
ditions by connecting this pin to GND. Refer to the Opera-
tion and Applications Information sections for further
details. This output is capable of driving an LED and should
be left floating if not used. FAULT is an open-drain output
to GND with an operating voltage range of GND to V
CC
.
CHRG (Pin 3): Active-Low Charge Indicator Output. The
LTC4011 indicates it is providing charge to the battery by
connecting this pin to GND. Refer to the Operation and
Applications Information sections for further details. This
output is capable of driving an LED and should be left
floating if not used. CHRG is an open-drain output to GND
with an operating voltage range of GND to V
CC
.
CHEM (Pin 4): Battery Chemistry Selection Input. This pin
should be wired to GND to select NiMH fast charge
termination parameters. If a voltage greater than 2.85V is
applied to this pin, or it is left floating, NiCd parameters are
used. Refer to the Applications Information section for
further details. Operating voltage range is GND to 3.3V.
GND (Pin 5): Ground. This pin provides a single-point
ground for internal references and other critical analog
circuits.
V
RT
(Pin 6): Thermistor Network Termination Output. The
LTC4011 provides 3.3V on this pin to drive an external
thermistor network connected between V
RT,
V
TEMP
and
GND. Additional power should not be drawn from this pin
by the host application.
V
TEMP
(Pin 7): Battery Temperature Input. An external
thermistor network may be connected to V
TEMP
to pro-
vide temperature-based charge qualification and addi-
tional fast charge termination control. Charging may also
be paused by connecting the V
TEMP
pin to GND. Refer to
the Operation and Applications Information sections for
complete details on external thermistor networks and
charge control. If this pin is not used it should be wired
to V
RT
. Operating voltage range is GND to 3.3V.
V
CELL
(Pin 8): Average Single-Cell Voltage Input. An
external voltage divider between BAT and V
CDIV
is attached
to this pin to monitor the average single-cell voltage of the
battery pack. The LTC4011 uses this information to pro-
tect against catastrophic battery overvoltage and to con-
trol the charging state. Refer to the Applications Information
section for further details on the external divider network.
Operating voltage range is GND to BAT.
V
CDIV
(Pin 9): Average Cell Voltage Resistor Divider Ter-
mination. The LTC4011 connects this pin to GND provided
the charger is not in shutdown. V
CDIV
is an open-drain
output to GND with an operating voltage range of GND to
BAT.
TIMER (Pin 10): Charge Timer Input. A resistor connected
between TIMER and GND programs charge cycle timing
limits. Refer to the Applications Information section for
complete details. Operating voltage range is GND to 1V.
SENSE (Pin 11): Charge Current Sense Input. An external
resistor between this input and BAT is used to program
charge current. Refer to the Applications Information
section for complete details on programming charge
current. Operating voltage ranges from (BAT – 50mV) to
(BAT + 200mV).
BAT (Pin 12): Battery Pack Connection. The LTC4011 uses
the voltage on this pin to control current sourced from V
CC
to the battery during charging. Allowable operating volt-
age range is GND to V
CC
.
TOC (Pin 13): Active-Low Top-Off Charge Indicator Out-
put. The LTC4011 indicates the top-off charge state for
NiMH batteries by connecting this pin to GND. Refer to the
Operation and Applications Information sections for fur-
ther details. This output is capable of driving an LED and
should be left floating if not used. TOC is an open-drain
output to GND with an operating voltage range of GND to
V
CC
.
7
LTC4011
4011p
INTV
DD
(Pin 14): Internal 5V Regulator Output. This pin
provides a means of bypassing the internal 5V regulator
used to power the BGATE output driver. Typically, power
should not be drawn from this pin by the application
circuit. Refer to the Application Information section for
additional details.
BGATE (Pin 15): External Synchronous N-channel MOSFET
Gate Control Output. This output provides gate drive to an
optional external NMOS power transistor switch used for
synchronous rectification to increase efficiency in the
step-down DC/DC converter. Operating voltage is GND to
INTV
DD
. BGATE should be left floating if not used.
PGND (Pin 16): Power Ground. This pin provides a return
for switching currents generated by internal LTC4011
circuits. Externally, PGND and GND should be wired
together using a very low impedance connection. Refer to
PCB Layout Considerations in the Applications Informa-
tion section for additional grounding details.
TGATE (Pin 17): External P-channel MOSFET Gate Control
Output. This output provides gate drive to an external
PMOS power transistor switch used in the DC/DC con-
verter. Operating voltage range varies as a function of V
CC
.
Refer to the Electrical Characteristics table for specific
voltages.
UU
U
PI FU CTIO S
V
CC
(Pin 18): Power Input. External PowerPath control
circuits normally connect either the DC input power supply
or the battery to this pin. Refer to the Applications Infor-
mation section for further details. Suggested applied
voltage range is GND to 34V.
READY (Pin 19): Active-Low Ready-to-Charge Output.
The LTC4011 connects this pin to GND if proper operating
voltages for charging are present. Refer to the Operation
section for complete details on charge qualification. This
output is capable of driving an LED and should be left
floating if not used. READY is an open-drain output to GND
with an operating voltage range of GND to V
CC
.
INFET (Pin 20): PowerPath Control Output. For very low
dropout applications, this output may be used to drive the
gate of an input PMOS pass transistor connected between
the DC input (DCIN) and the raw system supply rail (V
CC
).
INFET is internally clamped about 6V below V
CC
. Maxi-
mum operating voltage is V
CC
. INFET should be left
floating if not used.
Exposed Pad (Pin 21): This pin provides enhanced
thermal properties for the TSSOP. It must be soldered to
the PCB copper ground to obtain optimum thermal
performance.
8
LTC4011
4011p
BLOCK DIAGRA
W
7
8
13
14
CHARGER
STATE
CONTROL
LOGIC
THERMISTOR
INTERFACE
A/D
CONVERTER
BATTERY
DETECTOR
VOLTAGE
REGULATOR
UVLO AND
SHUTDOWN
PWM
FET DIODE
CHARGE
TIMER
VOLTAGE
REFERENCE
INTERNAL
VOLTAGE
REGULATOR
VTEMP
6
VRT
4CHEM
3CHRG
2FAULT
1
12
11
15
16
17
DCIN
5GND
VCELL
10 TIMER
9VCDIV
TOC
INTVDD
4011 BD
SENSE
BAT
PGND
19
READY
INFET
VCC
BGATE
TGATE
20
18
9
LTC4011
4011p
OPERATIO
U
CHARGE
QUALIFICATION
SHUTDOWN
DC ADAPTER PRESENT
NiCd OR
NiMH – V
V
CELL
< 1.325V
*t
MAX
IS PROGRAMMED MAXIMUM FAST CHARGE DURATION
**OPTIONAL TEMPERATURE LIMITS APPLY
4011 F01
V
CELL
< 900mV
V
CELL
> 900mV
V
CELL
> 900mV
V
CELL
< 900mV
V
CELL
< 1.22V
AT t
MAX
*/12
OR TIME = t
MAX
V
CELL
> 350mV, ADEQUATE V
CC
,
CHARGER ENABLED AND
TEMPERATURE OK (OPTIONAL)
CHECK
BATTERY
PRECHARGE**
(C/5 FOR
t
MAX
/12)
FAST CHARGE**
(1C)
AUTOMATIC
RECHARGE
FAULT
V
CELL
> 1.95V
OR PWM FAULTS
TOP-OFF
CHARGE**
(C/10)
NiMH
T/t
NO DC ADAPTER
t
MAX
/3
NO BATTERY
OR
V
CC
< 4.25V
Figure 1. LTC4011 State Diagram
10
LTC4011
4011p
OPERATIO
U
Shutdown State
The LTC4011 remains in micropower shutdown until
DCIN (Pin 1) is driven above V
CC
(Pin 8). In shutdown all
status and PWM outputs and internally generated termi-
nations or supply voltages are inactive. Current consump-
tion from V
CC
and BAT is reduced to a very low level.
Charge Qualification State
Once DCIN is greater than V
CC
, the LTC4011 exits mi-
cropower shutdown, enables its own internal supplies,
provides V
RT
voltage for temperature sensing, and switches
V
CDIV
to GND to allow measurement of the average single-
cell voltage. The IC also verifies that V
CC
is at or above
4.25V, V
CC
is 500mV above BAT and V
CELL
is between
350mV and 1.95V. If V
CELL
is above 1.95V, the fault state
is entered, which is described in more detail below. Once
adequate voltage conditions exist for charging, READY is
asserted.
If the voltage between V
TEMP
and GND is below 200mV,
the LTC4011 is paused. If V
TEMP
is above 200mV but
below 2.85V, the LTC4011 verifies that the sensed tem-
perature is between 5°C and 45°C. If these temperature
limits are not met or if its own die temperature is too high,
the LTC4011 will indicate a fault and not allow charging to
begin. If V
TEMP
is greater than 2.85V, battery temperature
related charge qualification, monitoring and termination
are disabled.
Once charging is fully qualified, precharge begins (unless
the LTC4011 is paused). In that case, the V
TEMP
pin is
monitored for further control. The charge status indicators
and PWM outputs remain inactive until charging begins.
Charge Monitoring
The LTC4011 continues to monitor important voltage and
temperature parameters during all charging states. If the
DC input is removed, charging stops and the shutdown
state is entered. If V
CC
drops below 4.25V or V
CELL
drops
below 350mV, charging stops and the LTC4011 returns to
the charge qualification state. If V
CELL
exceeds 1.95V, charg-
ing stops and the IC enters the fault state. If an external
thermistor indicates sensed temperature is beyond a range
of 5°C to 60°C, or the internal die temperature exceeds an
internal thermal limit, charging is suspended, the charge
timer is paused and the LTC4011 indicates a fault condi-
tion. Normal charging resumes from the previous state
when the sensed temperature returns to a satisfactory
range. In addition, other battery faults are detected during
specific charging states as described below.
Precharge State
If the initial voltage on V
CELL
is below 900mV, the LTC4011
enters the precharge state and enables the PWM current
source to trickle charge using one-fifth the programmed
charge current. The CHRG status output is active during
precharge. The precharge state duration is limited to
t
MAX
/12 minutes, where t
MAX
is the maximum fast charge
period programmed with the TIMER pin. If sufficient V
CELL
voltage cannot be developed in this length of time, the fault
state is entered, otherwise fast charge begins.
Fast Charge State
If adequate average single-cell voltage exists, the LTC4011
enters the fast charge state and begins charging at the
programmed current set by the external current sense
resistor connected between the SENSE and BAT pins. The
CHRG status output is active during fast charge. If V
CELL
is initially above 1.325V, cell voltage processing begins
immediately. Otherwise –V termination is disabled for a
stabilization period of t
MAX
/12. In that case, the LTC4011
makes another fault check at t
MAX
/12, requiring the aver-
age cell voltage to be above 1.22V. This ensures the
battery pack is accepting a fast charge. If V
CELL
is not
above this voltage threshold, the fault state is entered. Fast
charge state duration is limited to t
MAX
and the fault state
is entered if this limit is exceeded.
Charge Termination
Fast charge termination parameters are dependent upon
the battery chemistry selected with the CHEM pin. Volt-
age-based termination (–V) is always active after the
initial voltage stabilization period. If an external thermistor
network is present, chemistry-specific limits for T/t
(rate of temperature rise) are also used in the termination
algorithm. Temperature-based termination, if enabled,
becomes active as soon as the fast charge state is entered.
(Refer to Figure 1)
11
LTC4011
4011p
Top-Off Charge State
If NiMH fast charge termination occurs because the T/t
limit is exceeded after an initial period of t
MAX
/12 has ex-
pired, the LTC4011 enters the top-off charge state. Top-off
charge is implemented by sourcing one-tenth the pro-
grammed charge current for t
MAX
/3 minutes to ensure that
100% charge has been delivered to the battery. The CHRG
and TOC status outputs are active during the top-off state.
If NiCd cells have been selected with the CHEM pin, the
LTC4011 never enters the top-off state.
Automatic Recharge State
Once charging is complete, the automatic recharge state
is entered to address the self-discharge characteristics of
nickel chemistry cells. The charge status outputs are
inactive during automatic recharge, but V
CDIV
remains
switched to GND to monitor the average cell voltage. If the
V
CELL
voltage drops below 1.325V without falling below
350mV, the charge timer is reset and a new fast charge
cycle is initiated.
The internal termination algorithms of the LTC4011 are
adjusted when a fast charge cycle is initiated from auto-
matic recharge, because the battery should be almost fully
charged. Voltage-based termination is enabled immedi-
ately and the NiMH T/t limit is fixed at a battery
temperature rise of 1°C/minute.
Fault State
As discussed previously, the LTC4011 enters the fault
state based on detection of invalid battery voltages during
various charging phases. The IC also monitors the regu-
lation of the PWM control loop and will enter the fault state
if this is not within acceptable limits. Once in the fault state,
the battery must be removed or DC input power must be
cycled in order to initiate further charging. In the fault
state, the FAULT output is active, the READY output is
inactive, charging stops and the charge indicator outputs
are inactive. The V
CDIV
output remains connected to GND
to allow detection of battery removal.
Note that the LTC4011 also uses the FAULT output to
indicate that charging is suspended due to invalid battery
or internal die temperatures. However, the IC does not
enter the fault state in these cases and normal operation
will resume when all temperatures return to acceptable
levels. Refer to the Status Outputs section for more detail.
Insertion and Removal of Batteries
The LTC4011 automatically senses the insertion or re-
moval of a battery by monitoring the V
CELL
pin voltage.
Should this voltage fall below 350mV, the IC considers the
battery to be absent. Removing and then inserting a
battery causes the LTC4011 to initiate a completely new
charge cycle beginning with charge qualification.
External Pause Control
After charging is initiated, the V
TEMP
pin may be used to
pause operation at any time. When the voltage between
V
TEMP
and GND drops below 200mV, the charge timer
pauses, fast charge termination algorithms are inhibited
and the PWM outputs are disabled. The status and V
CDIV
outputs all remain active. Normal function is fully restored
from the previous state when pause ends.
Status Outputs
The LTC4011 open-drain status outputs provide valuable
information about the IC’s operating state and can be
used for a variety of purposes in applications. Table 1
summarizes the state of the four status outputs and the
VCDIV pin as a function of LTC4011 operation. The status
outputs can directly drive current-limited LEDs termi-
nated to the DC input. The VCDIV column in Table 1is
strictly informational. VCDIV should only be used for the
VCELL resistor divider, as previously discussed.
OPERATIO
U
Table 1. LTC4011 Status Pins
READY FAULT CHRG TOC V
CDIV
CHARGER STATE
Off Off Off Off Off Off
On Off Off Off On Ready to Charge
(V
TEMP
Held Low)
or Automatic Recharge
On Off On Off On Precharge or Fast Charge
(May be Paused)
On Off On On On NiMH Top-Off Charge
(May be Paused)
On On On or Off On or Off On Temperature Limits
Exceeded
Off On Off Off On Fault State (Latched)
12
LTC4011
4011p
OPERATIO
U
12
+
CC
EA
ITH
IPROG
R3
QPWM CLOCK
S
R
R4
R1
BAT
11 SENSE
RSENSE
15 BGATE
17 TGATE
LTC4011
VCC
P
N
R2
4011 F02
Figure 2. LTC4011 PWM Control Loop
PWM Current Source Controller
An integral part of the LTC4011 is the PWM current source
controller. The charger uses a synchronous step-down
architecture to produce high efficiency and limited thermal
dissipation. The nominal operating frequency of 550kHz
allows use of a smaller external filter components. The
TGATE and BGATE outputs have internally clamped volt-
age swings. They source peak currents tailored to smaller
surface-mount power FETs likely to appear in applications
providing an average charge current of 3A or less. During
the various charging states, the LTC4011 uses the PWM
controller to regulate an average voltage between SENSE
and BAT that ranges from 10mV to 100mV.
A conceptual diagram of the LTC4011 PWM control loop
is shown in Figure 2.
The voltage across the external current programming
resistor R
SENSE
is averaged by integrating error amplifier
EA. An internal programming current is also pulled from
input resistor R1. The I
PROG
• R1 product establishes the
desired average voltage drop across R
SENSE
, and hence,
the average current through R
SENSE
. The I
TH
output of the
error amplifier is a scaled control current for the input of
the PWM comparator CC. The I
TH
• R3 product sets a peak
current threshold for CC such that the desired average
current through R
SENSE
is maintained. The current com-
parator output does this by switching the state of the SR
latch at the appropriate time.
At
the beginning of each oscillator cycle, the PWM clock
sets the SR latch and the external P
-channel
MOSFET is
switched on (N
-channel
MOSFET switched off) to refresh
the current carried by the external inductor. The inductor
current and voltage drop across RSENSE begin to rise
linearly. During normal operation, the PFET is turned off
(NFET on) during the cycle by CC when the voltage
difference across RSENSE reaches the peak value set by
the output of EA. The inductor current then ramps down
linearly until the next rising PWM clock edge. This closes
the loop and maintains the desired average charge current
in the external inductor.
Low Dropout Charging
After charging is initiated, the LTC4011 does not require
that V
CC
remain at least 500mV above BAT because
situations exist where low dropout charging might occur.
In one instance, parasitic series resistance may limit PWM
headroom (between V
CC
and BAT) as 100% charge is
reached. A second case can arise when the DC adapter
selected by the end user is not capable of delivering the
current programmed by R
SENSE
, causing the output volt-
age of the adapter to collapse. While in low dropout, the
LTC4011 PWM runs near 100% duty cycle with a fre-
quency that may not be constant and can be less than
550kHz. The charge current will drop below the pro-
grammed value to avoid generating audible noise, so the
actual charge delivered to the battery may depend prima-
rily on the LTC4011 charge timer.
Internal Die Temperature
The LTC4011 provides internal overtemperature detec-
tion to protect against electrical overstress, primarily at
the FET driver outputs. If the die temperature rises above
this thermal limit, the LTC4011 stops switching and
indicates a fault as previously discussed.
13
LTC4011
4011p
APPLICATIO S I FOR ATIO
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External DC Source
The external DC power source should be connected to the
charging system and the V
CC
pin through either a power
diode or P-channel MOSFET. This prevents catastrophic
system damage in the event of an input short to ground or
reverse-voltage polarity at the DC input. The LTC4011
automatically senses when this input is present. The open-
circuit voltage of the DC source should be between 4.5V
and 34V, depending on the number of cells being charged.
In order to avoid low dropout operation, ensure 100%
capacity at charge termination, and allow reliable detec-
tion of battery insertion, removal or overvoltage, the
following equation can be used to determine the minimum
full-load voltage that should be provided by the external
DC power source.
DCIN(MIN) = (n • 2V) + 0.3V
where n is the number of series cells in the battery pack.
The LTC4011 will properly charge over a wide range of
DCIN and BAT voltage combinations. Operating the
LTC4011 in low dropout or with DCIN much greater than
BAT will force the PWM frequency to be much less than
550kHz. The LTC4011 disables charging and sets a fault if
a large DCIN to BAT differential would cause generation of
audible noise.
PowerPath Control
Proper PowerPath control is an important consideration
when fast charging nickel cells. This control ensures that
the system load remains powered at all times, but that
normal system operation and associated load transients
do not adversely affect fast charge termination. For high
efficiency and low dropout applications, the LTC4011 can
provide gate drive from the INFET pin directly to an input
P-channel MOSFET.
The battery should also be connected to the raw system
supply by a switch that selects the battery for system power
only if an external DC source is not present. Again, for
applications requiring higher efficiency, a P-channel
MOSFET with its gate driven from the DC input can be used
to perform this switching function (see Figure 8). Gate
voltage clamping may be necessary on an external PMOS
transistor used in this manner at higher input voltages.
Alternatively, a diode can be used in place of this FET.
Battery Chemistry Selection
The desired battery chemistry is selected by programming
the CHEM pin to the proper voltage. If it is wired to GND,
a set of parameters specific to charging NiMH cells is
selected. When CHEM is left floating or connected to V
RT
,
charging is optimized for NiCd cells. The various charging
parameters are detailed in Table 2.
Programming Charge Current
Charge current is programmed using the following
equation:
RmV
I
SENSE PROG
=100
R
SENSE
is an external resistor connected between the
SENSE and BAT pins. A 1% resistor with a low temperature
coefficient and sufficient power dissipation capability to
avoid self-heating effects is recommended.
Programming Maximum Charge Times
Connecting the appropriate resistor between the TIMER
pin and GND programs the maximum duration of various
charging states. To some degree, the value should reflect
how closely the programmed charge current matches the
1C rate of targeted battery packs. The maximum fast
charge period is determined by the following equation:
Rt Hours
TIMER MAX
() ()
=30 10 6
Some typical timing values are detailed in Table 3. R
TIMER
should not be less than 15k. The actual time limits used by
the LTC4011 have a resolution of approximately ±30
seconds in addition to the tolerances given the Electrical
Characteristics table. The maximum time period is ap-
proximately 4.3 hours.
14
LTC4011
4011p
Cell Voltage Network Design
An external resistor network is required to provide the
average single-cell voltage to the V
CELL
pin of the LTC4011.
The proper circuit for multicell packs is shown in Figure 3.
The ratio of R2 to R1 should be a factor of (n – 1), where
n is the number of series cells in the battery pack. The value
of R1 should be between 1k and 100k. This range limits the
sensing error caused by V
CELL
leakage current and pre-
vents the ON resistance of the internal NFET between V
CDIV
and GND from causing a significant error in the V
CELL
voltage. The external resistor network is also used to
detect battery insertion and removal. The filter formed by
C1 and the parallel combination of R1 and R2 is recom-
mended for rejecting PWM switching noise. The value of
C1 should be chosen to yield a 1st order lowpass fre-
quency of less than 500Hz. In the case of a single cell, the
external application circuit shown in Figure 4 is recom-
mended to provide the necessary noise filtering and miss-
ing battery detection.
APPLICATIO S I FOR ATIO
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Table 2. LTC4011 Charging Parameters
CHEM BAT
STATE PIN CHEMISTRY TIMER T
MIN
T
MAX
I
CHRG
TERMINATION CONDITION
PC Both t
MAX
/12 5°C45°CI
PROG
/5 Timer Expires
FC Open NiCd t
MAX
5°C60°CI
PROG
–20mV per Cell or 2°C/Minute
GND NiMH t
MAX
5°C60°CI
PROG
1.5°C/Minute for First t
MAX
/12 Minutes if Initial
V
CELL
< 1.325V
–10mV per Cell or 1°C/Minute After t
MAX
/12 Minutes
or if Initial V
CELL
> 1.325V
TOC GND NiMH t
MAX
/3 5°C60°CI
PROG
/10 Timer Expires
AR Both 5°C45°C0V
CELL
< 1.325V
PC: Precharge
FC: Fast Charge (Initial –V Termination Hold Off of t
MAX
/12 Minutes May Apply)
TOC: Top-Off Charge (Only for NiMH T/t FC Termination After Initial t
MAX
/12 Period)
AR: Automatic Recharge (Temperature Limits Apply to State Termination Only)
Table 3. LTC4011 Time Limit Programming Examples
FAST CHARGE TOP-OFF
TYPICAL FAST PRECHARGE LIMIT VOLTAGE STABILIZATION FAST CHARGE LIMIT CHARGE
R
TIMER
CHARGE RATE (MINUTES) (MINUTES) (HOURS) (MINUTES)
24.9k 2C 3.8 3.8 0.75 15
33.2k 1.5C 5 5 1 20
49.9k 1C 7.5 7.5 1.5 30
66.5k 0.75C 10 10 2 40
100k C/2 15 15 3 60
12
9
BAT
LTC4011 R2 +
FOR TWO OR
MORE SERIES CELLS
R1 C1
R2 = R1(n – 1)
4011 F03
V
CDIV
GND
8
5
V
CELL
Figure 3. Mulitple Cell Voltage Divider
15
LTC4011
4011p
APPLICATIO S I FOR ATIO
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RRT
RRT
T
RR R RR RR R R T
RRT if R k
OO
OO
O
OOOO
OO
11 164 2
22
0 141 2
311 46 2 1 2 1 2
12 10
=
()
=
()
+
=++
()
+
()
<
.–
.
.– ,
β
β
β
β
βR1
Figure 4. Single-Cell Monitor Network
12
9
BAT
10k 10k
33nF
1 CELL
4011 F04
VCDIV
8VCELL
The filter formed by R4 and C1 in Figure 5 is optional but
recommended for rejecting PWM switching noise. Alter-
natively, R4 may be replaced by a short, and a value
chosen for C1 which will provide adequate filtering from
the Thevenin impedance of the remaining thermistor net-
work. The filter pole frequency, which should be less than
500Hz, will vary more with battery temperature without
R4. External components should be chosen to make the
Thevenin impedance from V
TEMP
to GND 100k or less,
including R4, if present.
Figure 5. External NTC Thermistor Network
6
7
V
RT
R1
R2R
T
R4
51k
R3
C1
10nF
4011 F05
V
TEMP
Thermistor Network Design
The network for proper temperature sensing using a
thermistor with a negative temperature coefficient (NTC)
is shown in Figure 5. R3 is only required for thermistors
with a room temperature value above 10k. For thermistors
with a room temperature value of 10k or less, replace R3
with a short.
The LTC4011 is designed to work best with a 1% 10k NTC
thermistor with a β of 3750. In this case, the values for the
external network are given by:
R1 = 10.7k
R2 = 30.9k
R3 = 0
However, the LTC4011 will operate with other NTC ther-
mistors having different nominal values or exponential
temperature coefficients. For these thermistors, the gen-
eral-purpose design equations for the passive resistors in
the external linearization network are as follows:
where:
R
O
= Thermistor (R
T
) value at T
O
()
T
O
= Thermistor reference temperature (°K)
β = Thermistor exponential temperature coefficient of
resistance
Disabling Thermistor Functions
Temperature sensing is optional in LTC4011 applications.
For low cost systems where temperature sensing may not
be required, the V
TEMP
pin may simply be wired to V
RT
to
disable temperature qualification of all charging opera-
tions. However, this practice is not recommended for
NiMH cells charged well above or below their 1C rate,
because fast charge termination based solely on voltage
inflection may not be adequate to protect the battery from
a severe overcharge. A resistor between 10k and 20k may
be used to connect V
TEMP
to V
RT
if the pause function is
still desired.
16
LTC4011
4011p
INTV
DD
Regulator Output
If BGATE is left open, the INTV
DD
pin of the LTC4011 can
be used as an additional source of regulated voltage in the
host system any time READY is active. Switching loads on
INTV
DD
may reduce the accuracy of internal analog cir-
cuits used to monitor and terminate fast charging. In
addition, DC current drawn from the INTV
DD
pin can
greatly increase internal power dissipation at elevated V
CC
voltages. A minimum ceramic bypass capacitor of 0.1µF is
recommended.
Calculating Average Power Dissipation
The user should ensure that the maximum rated IC junc-
tion temperature is not exceeded under all operating
conditions. The thermal resistance of the LTC4011 pack-
age (θ
JA
) is 38°C/W, provided the exposed metal pad is
properly soldered to the PCB. The actual thermal resis-
tance in the application will depend on the amount of PCB
copper to which the package is soldered. Feedthrough vias
directly below the package that connect to inner copper
layers are helpful in lowering thermal resistance. The
following formula may be used to estimate the maximum
average power dissipation P
D
(in watts) of the LTC4011
under normal operating conditions.
P V mA I I k Q Q
IIn
VV
R
D CC DD VRT TGATE BGATE
VRT DD CC LED
LED
=+++ +
()
++
7 615
3 3 85 60 30
2
()
––.
where:
I
DD
= Average external INTV
DD
load current, if any
I
VRT
= Load current drawn by the external thermistor
network from V
RT
, if any
Q
TGATE
= Gate charge of external P-channel MOSFET
in coulombs
Q
BGATE
= Gate charge of external N-channel MOSFET
(if used) in coulombs
V
LED
= Maximum external LED forward voltage
R
LED
= External LED current-limiting resistor used in
the application
n = Number of LEDs driven by the LTC4011
Sample Applications
Figures 6 through 9 detail sample charger applications of
various complexities. Combined with the Typical Applica-
tion on the first page of this data sheet, these Figures
demonstrate some of the proper configurations of the
LTC4011. MOSFET body diodes are shown in these fig-
ures strictly for reference only.
Figure 6 shows a minimum application, which might be
encountered in low cost NiCd fast charge applications.
FET-based PowerPath control allows for maximum input
voltage range from the DC adapter. The LTC4011 uses
V to terminate the fast charge state, as no external
temperature information is available. Nonsynchronous
PWM switching is employed to reduce external compo-
nent cost. A single LED indicates charging status.
A 3A NiMH application of medium complexity is shown
in Figure 7. PowerPath control that is completely FET-
based allows for both minimum input voltage overhead
and minimum switchover loss when operating from the
battery.
P-channel MOSFET Q4 functions as a switch to connect
the battery to the system load whenever the DC input
adapter is removed. If the maximum battery voltage is less
than the maximum rated V
GS
of Q4, diode D1 and resistor
R5 are not required. Otherwise choose the Zener voltage
of D1 to be less than the maximum rated V
GS
of Q4. R5
provides a bias current of (V
BAT
– V
ZENER
)/(R5 + 20k) for
D1 when the input adapter is removed. Choose R5 to make
this current, which is drawn from the battery, just large
enough to develop the desired V
GS
across D1.
Precharge, fast charge and top-off states are indicated by
external LEDs. The V
TEMP
thermistor network allows the
LTC4011 to accurately terminate fast charge under a
variety of applied charge rates. Use of a synchronous
PWM topology improves efficiency and lowers power
dissipation.
A full-featured 2A LTC4011 application is shown in Fig-
ure 8. FET-based PowerPath allows for maximum input
voltage range from the DC adapter. The inherent voltage
ratings of the V
CELL
, V
CDIV
, SENSE and BAT pins allow
charging of from one to sixteen series nickel cells in this
application, governed only by the V
CC
overhead limits
APPLICATIO S I FOR ATIO
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17
LTC4011
4011p
APPLICATIO S I FOR ATIO
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Figure 7. 3A NiMH Charger with Full PowerPath Control
Figure 6. Minimum LTC4011 Application
INFET
FAULT
CHRG
TOC
READY
V
CC
TGATE
BGATE
V
CDIV
V
CELL
V
TEMP
LTC4011
GND
TIMER
CHEM
V
RT
INTV
DD
SENSE
BAT
FROM
ADAPTER
4.5V TO 34V
10µH
10µF
NiCd
PACK
(1AHr)
TO
SYSTEM
LOAD
0.1
10µF
R2
0.1µF
49.9k
33nF
10k
4011 F06
R
3k
PGND
INFET
FAULT
CHRG
TOC
READY
VCC
TGATE
VCDIV
VCELL
VTEMP
LTC4011
DCIN
TIMER
GND
CHEM
VRT
INTVDD
SENSE
BAT
FROM
ADAPTER
4.5V TO 34V
10µH
D1
6V 20µF
Q4
TO
SYSTEM
LOAD
33m
20µFR2
30.9k
10.7k
NiMH PACK
WITH 10k NTC
(3AHr)
4011 F07
RR
3k
R5
10k
20k 49.9k
10k
0.1µF0.033µF 0.068µF
3k
PGND
BGATE
18
LTC4011
4011p
APPLICATIO S I FOR ATIO
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previously discussed. The application includes all average
cell voltage and battery temperature sensing circuitry
required for the LTC4011 to utilize its full range of charge
qualification, safety monitoring and fast charge termina-
tion features. A green LED indicates valid DC input voltage
and installed battery, while a pair of red LEDs indicates
charging. A yellow LED indicates fault conditions. The
grounded CHEM pin selects the NiMH charge termination
parameter set.
While the LTC4011 is a complete, standalone solution,
Figure 9 shows that it can also be interfaced to a host
microprocessor. The MCU can control the charger directly
with an open-drain I/O port connected to the V
TEMP
pin, if
that port is low leakage and can tolerate at least 2V. The
charger state is monitored on the four LTC4011 status
outputs. Charging of NiMH batteries is selected in this
example. However, NiCd (CHEM V
RT
) parameters could
be chosen as well.
Unlike all of the other applications discussed so far, the
battery continues to power the system during charging.
The MCU could be powered directly from the battery or
from any type of post regulator operating from the battery.
In this configuration, the LTC4011 relies expressly on the
ability of the host MCU to know when load transients will
be encountered. The MCU should then pause charging
(and thus –V processing) during those events to avoid
premature fast charge termination. If the MPU cannot
reliably perform this function, full PowerPath control
should
be implemented. Excessive battery load current
variations, such as those generated by a post-regulating
PWM, can generate sufficient voltage noise to cause the
LTC4011 to prematurely terminate a charge cycle and/or
prematurely restart a fast charge. In this case, it may be
necessary to inhibit the LTC4011 after charging is com-
plete until external gas gauge circuitry indicates that
recharging is necessary. Shutdown power is applied to the
LTC4011 through the body diode of Q2 in this application.
Figure 8. Full-Featured 2A LTC4011 Application
INFET
FAULT
CHRG
TOC
READY
V
CC
TGATE
V
CDIV
V
CELL
V
TEMP
LTC4011
DCIN
TIMER
GND
CHEM
V
RT
INTV
DD
SENSE
BAT
FROM
ADAPTER
4.5V TO 34V
10µH
6V
NiCd PACK
WITH 10k NTC
(2AHr)
TO
SYSTEM
LOAD
0.05
10µF
R2
33nF 30.9k 10.7k
22nF
0.1µF
10k
51k
10µF
4011 F08
RG Y
R
3k
20k 49.9k
3k 3k 3k
R5
10k
PGND
BGATE
19
LTC4011
4011p
Waveforms
Sample waveforms for a standalone application during a
typical charge cycle are shown in Figure 10. Note that
these waveforms are not to scale and do not represent the
complete range of possible activity. The figure is simply
intended to allow better conceptual understanding and to
highlight the relative behavior of certain signals generated
by the LTC4011 during a typical charge cycle.
Initially, the LTC4011 is in low power shutdown as the
system operates from a heavily discharged battery. A DC
adapter is then connected such that V
CC
rises above 4.25V
and is 500mV above BAT. The READY output is asserted
when the LTC4011 completes charge qualification.
When the LTC4011 determines charging should begin, it
starts a precharge cycle because V
CELL
is less than 900mV.
As long as the temperature remains within prescribed
limits, the LTC4011 charges (TGATE switching), applying
limited current to the battery with the PWM in order to
bring the average cell voltage to 900mV.
APPLICATIO S I FOR ATIO
WUUU
When the precharge state timer expires, the LTC4011 be-
gins fast charge if V
CELL
is greater than 900mV. The PWM,
charge timer and internal termination control are sus-
pended if pause is asserted (V
CELL
< 200mV), but all status
outputs continue to indicate charging is in progress. The
fast charge state continues until the selected voltage or
temperature termination criteria are met. Figure 10 sug-
gests termination based on T/t, which for NiMH would
be an increase of 1°C per minute.
Because NiMH charging terminated due to T/t and the
fast charge cycle had lasted more than t
MAX
/12 minutes,
the LTC4011 begins a top-off charge with a current of
I
PROG
/10. Top-off is an internally timed charge of t
MAX
/3
minutes with the CHRG and TOC outputs continuously
asserted.
Finally, the LTC4011 enters the automatic recharge state
where the CHRG and TOC outputs are deasserted. The
PWM is disabled but V
CDIV
remains asserted to monitor
V
CELL
. The charge timer will be reset and fast charging will
resume if V
CELL
drops below 1.325V. The LTC4011 enters
Figure 9. LTC4011 with MCU Interface
INFET
FAULT
CHRG
TOC
READY
V
CC
TGATE
V
CDIV
V
CELL
LTC4011
DCIN
V
RT
INTV
DD
SENSE
BAT
FROM
ADAPTER
4.5V TO 34V
STATUS
TO
MCU
PAUSE
FROM
MCU
10µH
10µF
NiCd PACK
WITH 10k NTC
(1AHr)
TO
SYSTEM
LOAD
0.1
4011 F09
V
TEMP
V
+
Q1
Q2
Q3
GND
CHEM
20k
49.9k 10k
33nF
R2
68nF 30.9k
10.7k
0.1µF
BGATE
PGND
TIMER
20
LTC4011
4011p
APPLICATIO S I FOR ATIO
WUUU
shutdown when the DC adapter is removed, minimizing
current draw from the battery in the absence of an input
power source.
While not a part of the sample waveforms of Figure 10,
temperature qualification is an ongoing part of the charg-
ing process, if an external thermistor network is detected
by the LTC4011. Should prescribed temperature limits be
exceeded during any particular charging state, charging
would be suspended until the sensed temperature re-
turned to an acceptable range.
Battery-Controlled Charging
Because of the programming arrangement of the LTC4011,
it may be possible to configure it for battery-controlled
charging. In this case, the battery pack is designed to pro-
vide customized information to an LTC4011-based charger,
allowing a single design to service a wide range of appli-
cation batteries. Assume the charger is designed to pro-
vide a maximum charge current of 800mA (R
SENSE
=
125m). Figure 11 shows a 5V NiCd battery pack for which
800mA represents a 0.75C rate. When connected to the
charger, this pack would provide battery temperature in-
formation and correctly configure both fast charge termi-
nation parameters and time limits for the internal NiCd cells.
A second possibility is to configure an LTC4011-based
charger to accept battery packs with varying numbers of
cells. By including R2 of the average cell voltage divider
network shown in Figure 3, battery-based programming
of the number of series-stacked cells could be realized
without defeating LTC4011 detection of battery insertion
or removal. Figure 12 shows a 2-cell NiMH battery pack
Figure 11. NiCd Battery Pack with Time Limit Control
Figure 10. Charging Waveforms Example
SHDN
VCC = 4.25VDCIN
READY
VCDIV
TGATE
VCELL
CHRG
TOC
VTEMP
(PAUSE)
SHDNTOP-OFF AUTO
RECHARGE
FAST CHARGEPRECHARGE
0.9V
EXTERNAL
PAUSE
200mV
4011 F10
7
1200mAhr
NiCd CELLS
BATTERY
PACK
V
TEMP
4
CHEM
10
TIMER
NC
66.5k
4011 F11
+
10k
NTC
21
LTC4011
4011p
APPLICATIO S I FOR ATIO
WUUU
that programs the correct number of series cells when it
is connected to the charger, along with indicating chem-
istry and providing temperature information.
Any of these battery pack charge control concepts could
be combined in a variety of ways to service custom
application needs.
1. Input capacitors should be placed as close as possible
to switching FET supply and ground connections with
the shortest copper traces possible. The switching
FETs must be on the same layer of copper as the input
capacitors. Vias should not be used to make these
connections.
2. Place the LTC4011 close to the switching FET gate
terminals, keeping the connecting traces short to
produce clean drive signals. This rule also applies to
IC supply and ground pins that connect to the switch-
ing FET source pins. The IC can be placed on the
opposite side of the PCB from the switching FETs.
3. Place the inductor input as close as possible to the
drain of the switching FETs. Minimize the surface area
of the switch node. Make the trace width the minimum
needed to support the programmed charge current.
Use no copper fills or pours. Avoid running the con-
nection on multiple copper layers in parallel. Minimize
capacitance from the switch node to any other trace or
plane.
4. Place the charge current sense resistor immediately
adjacent to the inductor output, and orient it such that
current sense traces to the LTC4011 are short. These
feedback traces need to be run together as a single pair
with the smallest spacing possible on any given layer
on which they are routed. Locate any filter component
on these traces next to the LTC4011, and not at the
sense resistor location.
5. Place output capacitors adjacent to the sense resisitor
output and ground.
6. Output capacitor ground connections must feed into
the same copper that connects to the input capacitor
ground before tying back into system ground.
Figure 12. NiMH Battery Pack Indicating Number of Cells
Figure 13. High Speed Switching Path
PCB Layout Considerations
To prevent magnetic and electrical field radiation and high
frequency resonant problems, proper layout of the com-
ponents connected to the LTC4011 is essential. Refer to
Figure 13. For maximum efficiency, the switch node rise
and fall times should be minimized. The following PCB
design priority list will help ensure proper topology. Lay-
out the PCB using this specific order.
7
1500mAhr
NiMH CELLS
BATTERY
PACK
V
TEMP
8
V
CELL
R2
4
CHEM
4011 F12
+
10k
NTC
4011 F13
V
BAT
L1
V
IN
HIGH
FREQUENCY
CIRCULATING
PATH
BAT
SWITCH NODE
C
IN
SWITCHING GROUND
C
OUT
D1
22
LTC4011
4011p
APPLICATIO S I FOR ATIO
WUUU
7. Connection of switching ground to system ground, or
any internal ground plane should be single-point. If
the system has an internal system ground plane, a
good way to do this is to cluster vias into a single star
point to make the connection.
8. Route analog ground as a trace tied back to the
LTC4011 GND pin before connecting to any other
ground. Avoid using the system ground plane. A
useful CAD technique is to make analog ground a
separate ground net and use a 0 resistor to connect
analog ground to system ground.
9. A good rule of thumb for via count in a given high
current path is to use 0.5A per via. Be consistent when
applying this rule.
Figure 14. Kelvin Sensing of Charge Current
10. If possible, place all the parts listed above on the same
PCB layer.
11. Copper fills or pours are good for all power connec-
tions except as noted above in Rule 3. Copper planes
on multiple layers can also be used in parallel. This
helps with thermal management and lowers trace
inductance, which further improves EMI performance.
12. For best current programming accuracy, provide a
Kelvin connection from R
SENSE
to SENSE and BAT.
See Figure 14 for an example.
13. It is important to minimize parasitic capacitance on
the TIMER, SENSE and BAT pins. The traces connect-
ing these pins to their respective resistors should be
as short as possible.
SENSE
4011 F14
DIRECTION OF CHARGING CURRENT
R
SENSE
BAT
23
LTC4011
4011p
U
PACKAGE DESCRIPTIO
FE Package
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation CB
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
FE20 (CB) TSSOP 0204
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
RECOMMENDED SOLDER PAD LAYOUT
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
134
5678910
111214 13
6.40 – 6.60*
(.252 – .260)
3.86
(.152)
2.74
(.108)
20 1918 17 16 15
1.20
(.047)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC 0.195 – 0.30
(.0077 – .0118)
TYP
2
2.74
(.108)
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
3.86
(.152)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
24
LTC4011
4011p
© LINEAR TECHNOLOGY CORPORATION 2005
LT/TP 0205 1K • PRINTED IN THE USA
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Charger Voltage/Current Programming, AC Adapter Current Limit and
Thermistor Sensor and Indicator Outputs
LTC4010 High Efficiency Standalone Nickel Battery Charger Complete NiMH/NiCd Charger in a Small 16-Pin Package,
Constant-Current Switching Regulator
LTC4060 Standalone Linear NiMH/NiCd Fast Charger Complete NiMH/NiCd Charger in a Small Leaded or Leadless
16-Pin Package, No Sense Resistor or Blocking Diode Required
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SMBus Rev. 1.1 Compliant
LTC4150 Coulomb Counter/Battery Gas Gauge High Side Sense of Charge Quantity and Polarity in a 10-Pin MSOP
LTC4412 Low Loss PowerPath Controller Very Low Loss Replacement for Power Supply ORing Diodes
Using Minimal External Components
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear-tech.com