SCBS239F − MARCH 1993 − REVISED JUNE 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DMembers of the Texas Instruments
Widebus Family
DA-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
DTypical VOLP (Output Ground Bounce)
<1 V at VCC = 5 V, TA = 25°C
DDistributed VCC and GND Pins Minimize
High-Speed Switching Noise
DIoff Supports Partial-Power-Down Mode
Operation
DFlow-Through Architecture Optimizes PCB
Layout
DLatch-Up Performance Exceeds 500 mA Per
JESD 17
DESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
The ’ABT162245 devices are 16-bit noninverting
3-state transceivers designed for synchronous
two-way communication between data buses.
The control-function implementation minimizes
external timing requirements.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so that the buses effectively are isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SSOP − DL
Tube SN74ABT162245DL
ABT162245
−40°C to 85°CSSOP − DL Tape and reel SN74ABT162245DLR ABT162245
−40 C to 85 C
TSSOP − DGG Tape and reel SN74ABT162245DGGR ABT162245
−55°C to 125°CCFP − WD Tube SNJ54ABT162245WD SNJ54ABT162245WD
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
!" # $%&" !# '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0 !)) '!!&"&#+
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
SN54ABT162245 . . . WD PACKAGE
SN74ABT162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
'*%$"# $')!" " 1234 !)) '!!&"&# !& "&#"&*
%)&## ",&.#& "&*+ !)) ",& '*%$"# '*%$"
'$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+
SCBS239F − MARCH 1993 − REVISED JUNE 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE DIR OPERATION
L L B data to A bus
LH A data to B bus
H X Isolation
logic diagram (positive logic)
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (except I/O ports) (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO −0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABT162245 (B port) 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT162245 (B port) 128 mA. . . . . . . . . . . . . . . . . . . . . . . . .
SN54/74ABT162245 (A port) 30 mA. . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) −18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2):DGG package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 63°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51−7.
SCBS239F − MARCH 1993 − REVISED JUNE 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54ABT162245 SN74ABT162245
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4.5 5.5 4.5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VIInput voltage 0 VCC 0 VCC V
IOH
High-level output current
B port −24 −32
mA
IOH High-level output current A port −3 −12 mA
IOL
Low-level output current
B port 48 64
mA
IOL Low-level output current A port 12 12 mA
∆t/∆vInput transition rise or fall rate Outputs enabled 10 10 ns/V
TAOperating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SCBS239F − MARCH 1993 − REVISED JUNE 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TA = 25°C SN54ABT162245 SN74ABT162245
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN MAX MIN MAX
UNIT
VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 −1.2 V
VCC = 5 V, IOH = −1 mA 3.8 2.5 2.5
A port
IOH = −1 mA 3.3 3 3
A port V
CC
= 4.5 V IOH = −3 mA 3.1 3 3.1
VOH
VCC = 4.5 V
IOH = −12 mA 2.6* 2.6
V
VOH VCC = 5 V, IOH = −3 mA 3 3 3 V
B port
IOH = −3 mA 2.5 2.5 2.5
B port V
CC
= 4.5 V IOH = −24 mA 2
VCC = 4.5 V
IOH = −32 mA 2* 2
A port IOL = 12 mA 0.8 0.8 0.8
V
OL
B port
V
CC
= 4.5 V IOL = 48 mA 0.45 0.45 0.45 V
VOL
B port
VCC = 4.5 V
IOL = 64 mA 0.55* 0.55
V
Vhys 100 mV
II
Control
inputs
VCC = 5.5 V, VI = VCC or GND
±1±1±1
µA
II
A or B ports
VCC = 5.5 V, VI = VCC or GND
±20 ±20 ±20
µA
IOZH§VCC = 5.5 V, VO = 2.7 V 10 10 10 µA
IOZL§VCC = 5.5 V, VO = 0.5 V −10 −10 −10 µA
Ioff VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
ICEX VCC = 5.5 V,
VO = 5.5 V Outputs high 50 50 50 µA
IO¶
A port
VCC = 5.5 V,
VO = 2.5 V
−25 −50 −100‡−25 −90 −25 −100
mA
IO
¶
B port VCC = 5.5 V, VO = 2.5 V −50 −100 −180 −50 −180 −50 −180 mA
VCC = 5.5 V,
Outputs high 2 2 2
I
CC
A or B port
s
VCC = 5.5 V,
I
O
= 0,
V = V or GND
Outputs low 32 32 32 mA
ICC
A or B ports
IO = 0,
VI = VCC or GND Outputs disabled 2 2 2
mA
Data inputs
VCC = 5.5 V,
One input at 3.4 V,
Outputs enabled 1 2 2
∆ICC#Data inputs
One input at 3.4 V,
Other inputs at
V
CC
or GND Outputs disabled 0.05 1 0.05 mA
CC
Control
inputs VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND 1.5 1.5 1.5
CiVI = 2.5 V or 0.5 V 3 pF
Cio VO = 2.5 V or 0.5 V 6 pF
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†All typical values are at VCC = 5 V.
‡This limit applies only to the SN74ABT162245.
§The parameters IOZH and IOZL include the input leakage current.
¶Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
#This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
SCBS239F − MARCH 1993 − REVISED JUNE 2004
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°CSN54ABT162245 SN74ABT162245
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
UNIT
tPLH
A
B
1 2.2 3.4 1 4.1 1 3.9
ns
tPHL A B 1 2.3 3.7 1 4.4 1 4.2 ns
tPLH
B
A
1 2.7 4.1 1 4.9 1 4.6
ns
tPHL B A 1.5 3.1 4.6 1.5 5.2 1.5 5.1 ns
tPZH
OE
B
1 3.6 5.2 1 6.4 1 6.3
ns
tPZL OE B1 3.7 5.4 1 6.5 1 6.4 ns
tPHZ
OE
B
2 4.4 5.8 2 6.4 2 6.3
ns
tPLZ
OE
B
1.5 3.3 4.7 1.5 5.6 1.5 5.2
ns
tPZH
OE
A
1.5 4.1 6 1.5 7.2 1.5 7.1
ns
tPZL OE A1.5 4.3 6.1 1.5 7.3 1.5 7 ns
tPHZ
OE
A
2 4.5 6.1 2 6.8 2 6.6
ns
tPLZ
OE
A
1.5 3.7 5.1 1.5 6.1 1.5 5.7
ns
SCBS239F − MARCH 1993 − REVISED JUNE 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500 Ω
500 Ω
Data Input
Timing Input 1.5 V 3 V
0 V
1.5 V 1.5 V 3 V
0 V
3 V
0 V
1.5 V 1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V 1.5 V 3 V
0 V
1.5 V1.5 V
Input
1.5 V
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
3.5 V
0 V
1.5 V VOL + 0.3 V
1.5 V VOH − 0.3 V
≈0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
N
OTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns
.
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Output
Control
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9677401QXA ACTIVE CFP WD 48 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9677401QX
A
SNJ54ABT162245
WD
74ABT162245DGGRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
74ABT162245DGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
74ABT162245DLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
SN74ABT162245DGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
SN74ABT162245DL ACTIVE SSOP DL 48 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
SN74ABT162245DLG4 ACTIVE SSOP DL 48 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
SN74ABT162245DLR ACTIVE SSOP DL 48 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ABT162245
SNJ54ABT162245WD ACTIVE CFP WD 48 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9677401QX
A
SNJ54ABT162245
WD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ABT162245, SN74ABT162245 :
•Catalog: SN74ABT162245
•Military: SN54ABT162245
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ABT162245DGGR TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1
SN74ABT162245DLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ABT162245DGGR TSSOP DGG 48 2000 367.0 367.0 45.0
SN74ABT162245DLR SSOP DL 48 1000 367.0 367.0 55.0
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
WD (R-GDFP-F**) CERAMIC DUAL FLATPACK
4040176/D 10/97
48 LEADS SHOWN
48
48
25
56
0.610
(18,80)
0.710
(18,03)
0.7400.640
0.390 (9,91)
0.370 (9,40)
0.870 (22,10)
1.130 (28,70)
1
A
0.120 (3,05)
0.075 (1,91)
LEADS**
24
NO. OF
A MIN
A MAX (16,26)
(15,49)
0.025 (0,635)
0.009 (0,23)
0.004 (0,10)
0.370 (9,40)
0.250 (6,35)
0.370 (9,40)
0.250 (6,35)
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only
E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA
GDFP1-F56 and JEDEC MO-146AB
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUAR Y 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040078/F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20 8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0°–8°
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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