LOW COST 16.2 TO 28 MHZ 3.3 VOLT VCXO
MDS 3721 E 3Revision 103003
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3721
External Component Selectio n
The MK3721 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0. 01µF should be conne cted
between VDD a nd GND on pins 2 and 4 as close to the
MK3721 as possible. F or optimum de vice performance,
the decouplin g cap a cito r sh ou ld be mo un te d on the
component side of the PCB . Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB tra ce be tween the clock outpu t a nd the
load is over 1 inch, series termination should be used.
To series ter minate a 50Ω trace (a commonly used
trace impedance), place a 33Ω resistor in series with
the clock line, as close to the clock output pin as
possib le. The nominal impe dance of the cloc k output is
20Ω.
Quartz Crystal
The MK3721 VCXO function consist s of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The oscillation frequency of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK37 21 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3721 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14 pF.
Recommended Crystal Parameters:
Initial Accuracy at 25°C±20 ppm
Temperature Stability ±30 ppm
Aging ±20 ppm
Load Capacitance 14 pf
Shunt Capacitance, C0 7 pF Max
C0/C1 Ratio 250 Max
Equivalent Series Resistance 35 Ω Max
The e xternal crystal must be connected as close to the
chip as possib le and should be on th e same side of the
PCB as the MK3721. There should be no via’ s betw een
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal. See application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB la yout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.