TL/F/9878
100324 Low Power Hex TTL-to-ECL Translator
July 1992
100324
Low Power Hex TTL-to-ECL Translator
General Description
The 100324 is a hex translator, designed to convert TTL
logic levels to 100K ECL logic levels. The inputs are com-
patible with standard or Schottky TTL. A common Enable
(E), when LOW, holds all inverting outputs HIGH and holds
all true outputs LOW. The differential outputs allow each
circuit to be used as an inverting/non-inverting translator, or
as a differential line driver. The output levels are voltage
compensated over the full b4.2V to b5.7V range.
When the circuit is used in the differential mode, the
100324, due to its high common mode rejection, overcomes
voltage gradients between the TTL and ECL ground sys-
tems. The VEE and VTTL power may be applied in either
order.
The 100324 is pin and function compatible with the 100124
with similar AC performance, but features power dissi-
pation roughly half of the 100124 to ease system cooling
requirements.
Features
YPin/function compatible with 100124
YMeets 100124 AC specifications
Y50% power reduction of the 100124
YDifferential outputs
Y2000V ESD protection
Yb4.2V to b5.7V operating range
YAvailable to MIL-STD-883
YAvailable to industrial grade temperature range
Logic Diagram
TL/F/98784
Pin Names Description
D0–D5Data Inputs
E Enable Input
Q0–Q5Data Outputs
Q0–Q5Complementary
Data Outputs
Connection Diagrams
24-Pin DIP/SOIC
TL/F/98781
28-Pin PCC
TL/F/98783
24-Pin Quad Cerpak
TL/F/98782
C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
Above which the useful life may be impaired. (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature (TSTG)b65§Ctoa
150§C
Maximum Junction Temperature (TJ)
Ceramic a175§C
Plastic a150§C
VEE Pin Potential to Ground Pin b7.0V to a0.5V
VTTL Pin Potential to Ground Pin b0.5V to a6.0V
Input Voltage (DC) b0.5V to a6.0V
Output Current (DC Output HIGH) b50 mA
ESD (Note 2) t2000V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Recommended Operating
Conditions
Case Temperature (TC)
Commercial 0§Ctoa
85§C
Industrial b40§Ctoa
85§C
Military b55§Ctoa
125§C
Supply Voltage (VEE)b5.7V to b4.2V
Commercial Version
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCe0§Ctoa
85§C (Note 3), VTTL ea
4.5V to a5.5V
Symbol Parameter Min Typ Max Units Conditions
VOH Output HIGH Voltage b1025 b955 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1705 b1620 or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1035 mV VIN eVIH(Min) Loading with
VOLC Output LOW Voltage b1610 or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage 2.0 5.0 V Guaranteed HIGH
Signal for All Inputs
VIL Input LOW Voltage 0 0.8 V Guaranteed LOW
Signal for All Inputs
VCD Input Clamp Diode Voltage b1.2 V IIN eb
18 mA
IIH Input HIGH Current VIN ea
2.4V,
Data 20 mA All Other Inputs VIN eGND
Enable 120
Input HIGH Current 1.0 mA VIN ea
5.5V,
Breakdown Test, All Inputs All Other Inputs eGND
IIL Input LOW Current VIN ea
0.4V,
Data b0.9 mA All Other Inputs VIN eVIH
Enable b5.4
IEE VEE Power Supply Current b70 b45 b22 mA All Inputs VIN ea
4.0V
ITTL VTTL Power Supply Current 25 38 mA All Inputs VIN eGND
Note 3: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operation under ‘‘worst case’’ conditions.
2
Commercial Version (Continued)
DIP AC Electric Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, VTTL ea
4.5V to a5.5V
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.50 3.00 0.50 2.90 0.50 3.00 ns
tPHL Data and Enable to Output
Figures 1
and
2
tTLH Transition Time 0.45 1.80 0.45 1.80 0.45 1.80 ns
tTHL 20% to 80%, 80% to 20%
SOIC, PCC and Cerpak AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, VTTL ea
4.5V to a5.5V
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.50 2.80 0.50 2.70 0.50 2.80 ns
tPHL Data and Enable to Output
Figures 1
and
2
tTLH Transition Time 0.45 1.70 0.45 1.70 0.45 1.70 ns
tTHL 20% to 80%, 80% to 20%
tOSHL Maximum Skew Common Edge PCC Only
Output-to-Output Variation 0.95 0.95 0.95 ns (Note 1)
Data to Output Path
tOSLH Maximum Skew Common Edge PCC Only
Output-to-Output Variation 0.70 0.70 0.70 ns (Note 1)
Data to Output Path
tOST Maximum Skew Opposite Edge PCC Only
Output-to-Output Variation 1.60 1.60 1.60 ns (Note 1)
Data to Output Path
tPS Maximum Skew PCC Only
Pin (Signal) Transition Variation 1.20 1.20 1.20 ns (Note 1)
Data to Output Path
Note 1: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged
device. The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL), or LOW to HIGH (tOSLH), or in opposite directions both
HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
3
Industrial Version
PCC DC Electrical Characteristics (Note)
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
40§Ctoa
85§C, VTTL ea
4.5V to a5.5V
Symbol Parameter TCeb
40§CT
C
e
0
§
Ctoa
85§CUnits Conditions
Min Max Min Max
VOH Output HIGH Voltage b1085 b870 b1025 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1575 b1830 b1620 or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1095 b1035 mV VIN eVIH(Min) Loading with
VOLC Output LOW Voltage b1565 b1610 or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage 2.0 5.0 2.0 5.0 V Guaranteed HIGH
Signal for All Inputs
VIL Input LOW Voltage 0 0.8 0 0.8 V Guaranteed LOW
Signal for All Inputs
VCD Input Clamp Diode Voltage b1.2 b1.2 V IIN eb
18 mA
IIH Input HIGH Current VIN ea
2.4V,
Data 20 20 mA All Other Inputs VIN eGND
Enable 120 120
Input HIGH Current 1.0 1.0 mA VIN ea
5.5V,
Breakdown Test, All Inputs All Other Inputs eGND
IIL Input LOW Current VIN ea
0.4V,
Data b0.9 b0.9 mA All Other Inputs VIN eVIH
Enable b5.4 b5.4
IEE VEE Power Supply Current b70 b22 b70 b22 mA All Inputs VIN ea
4.0V
ITTL VTTL Power Supply Current 38 38 mA All Inputs VIN eGND
Note: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operation under ‘‘worst case’’ conditions.
PCC AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, VTTL ea
4.5V to a5.5V
Symbol Parameter TCeb
40§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.50 2.80 0.50 2.70 0.50 2.80 ns
Figures 1
and
2
tPHL Data and Enable to Output
tTLH Transition Times 0.35 1.80 0.45 1.70 0.45 1.70 ns
Figures 1
and
2
tTHL 20% to 80%, 80% to 20%
4
Military Version
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
55§Ctoa
125§C, VTTL ea
4.5V to a5.5V
Symbol Parameter Min Max Units TCConditions Notes
VOH Output HIGH Voltage b1025 b870 mV 0§Ctoa
125§C
VIN eVIH (Max)
or VIL (Min) 50Xto b2.0V
Loading with 1, 2, 3
b1085 b870 mV b55§C
VOL Output LOW Voltage b1830 b1620 mV 0§Ctoa
125§C
b1830 b1555 mV b55§C
VOHC Output HIGH Voltage b1035 mV 0§Ctoa
125§C
VIN eVIH (Max)
or VIL (Min) 50Xto b2.0V
Loading with 1, 2, 3
b1085 mV b55§C
VOLC Output LOW Voltage b1610 mV 0§Ctoa
125§C
b1555 mV b55§C
VIH Input HIGH Voltage 2.0 5.0 V b55§Ctoa
125§C Over VTTL,V
EE,T
CRange 1, 2, 3, 4
VIL Input LOW Voltage 0.0 0.8 V b55§Ctoa
125§C Over VTTL,V
EE,T
CRange 1, 2, 3, 4
IIH Input HIGH Current 20 mAb55§Ctoa
125§CV
IN ea
2.7V 1, 2, 3
Breakdown Test 100 mAb55§Ctoa
125§CV
IN ea
7.0V
IIL Input LOW Current
Data b0.9 mA b55§Ctoa
125§CV
IN ea
0.4V 1, 2, 3
Enable b5.4
VFCD Input Clamp b1.2 V b55§Ctoa
125§CIIN eb
18 mA 1, 2, 3
Diode Voltage
IEE VEE Power b70 b22 mA b55§Ctoa
125§CAll Inputs VIN ea
4.0V 1, 2, 3
Supply Current
ITTL VTTL Power 38 mA b55§Ctoa
125§CAll Inputs VIN eGND 1, 2, 3
Supply Current
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides ‘‘cold start’’ specs which can be
considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at b55§C, a25§C, and a125§C, Subgroups 1, 2, 3, 7, and 8.
Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at b55§C, a25§C, and a125§C, Subgroups A1, 2, 3, 7, and 8.
Note 4: Guaranteed by applying specified input condition and testing VOH/VOL.
AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, VTTL ea
4.5V to a5.5V
Symbol Parameter TCeb
55§CT
C
ea
25§CT
C
ea
125§CUnits Conditions Notes
Min Max Min Max Min Max
tPLH Propagation Delay 0.50 3.00 0.50 2.90 0.30 3.30 ns 1, 2, 3,
tPHL Data and Enable to Output
Figures 1
and
2
tTLH Transition Time 0.35 1.80 0.45 1.80 0.45 1.80 ns 4
tTHL 20% to 80%, 80% to 20%
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately after power-up. This provides ‘‘cold start’’ specs which can be considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at a25§C temperature only, Subgroup A9.
Note 3: Sample tested (Method 5005, Table I) on each manufactured lot at a25§C, Subgroup A9, and at a125§C and b55§C temperatures, Subgroups A10 and
A11.
Note 4: Not tested at a25§C, a125§C, and b55§C temperature (design characterization data).
5
Switching Waveform
TL/F/98786
FIGURE 1. Propagation Delay and Transition Times
Test Circuit
TL/F/98785
FIGURE 2. AC Test Circuit
Notes:
VCC,V
CCA e0V, VEE eb
4.5V, VTTL ea
5.0V, VIH ea
3.0V
L1, L2 and L3 eequal length 50Ximpedance lines
RTe50Xterminator internal to scope
Decoupling 0.1 mF from GND to VCC,V
EE and VTTL
All unused outputs are loaded with 50Xto b2V or with equivalent ECL terminator network
CLeFixture and stray capacitance s3pF
6
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are
defined as follows:
100324 D C QB
Device Type (Basic) Special Variation
QB eMilitary grade device with
Package Code environmental and burn-in processing
DeCeramic DIP shipped in tubes
FeQuad Cerpak
PePlastic DIP Temperature Range
QePlastic Leaded Chip Carrier (PCC) C eCommercial (0§Ctoa
85§C)
SeSmall Outline (SOIC) I eIndustry (b40§Ctoa
85§C) (PCC Only)
MeMilitary (b55§Ctoa
125§C)
7
Physical Dimensions inches (millimeters)
24-Lead Ceramic Dual-In-Line Package (0.400×Wide) (D)
NS Package Number J24E
24-Lead Molded Package (0.300×Wide) (S)
NS Package Number M24B
8
Physical Dimensions inches (millimeters) (Continued)
24-Lead Plastic Dual-In-Line Package (P)
NS Package Number N24E
28-Lead Plastic Chip Carrier (Q)
NS Package Number V28A
9
100324 Low Power Hex TTL-to-ECL Translator
Physical Dimensions inches (millimeters) (Continued) Lit. Ý103900
24 Lead Quad Cerpak (F)
NS Package Number W24B
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failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
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