Supertex inc.
LR12
Supertex inc.
www.supertex.com
Doc.# DSFP-LR12
C080113
High Input Voltage, Adjustable
3-Terminal Linear Regulator
Features
►13.2 to 100V input voltage range
►Stable with 100nF output capacitor
►Adjustable 1.20 to 88V output regulation
►5% reference voltage tolerance
►Output current limiting, 50mA min.
►10µA typical ADJ current
►Over temperature protection
►Available in 3 different packages
Applications
►DC/DC SMPS startup circuits
►Adjustable high voltage constant current sources
►Industrial controls
►Motor controls
►Battery powered systems
►Power supplies
►Telecom applications
►LED drivers
►Automotive applications
General Description
The Supertex LR12 is a high voltage, low output current,
adjustable linear regulator. It has a wide operating input voltage
range of 13.2 - 100V. The output voltage can be adjusted from
1.20 - 88V, provided that the input voltage is at least 12V greater
than the output voltage. The output voltage can be adjusted
by means of two external resistors R1 and R2 as shown in the
typical application circuits. The LR12 regulates the voltage
difference between VOUT and ADJ pins to a nominal value of
1.20V. The 1.20V is amplied by the external resistor ratio R1
and R2. An internal constant bias current of typically 10µA is
connected to the ADJ pin. This increases VOUT by a constant
voltage of 10µA times R2.
The LR12 has current limiting and temperature limiting. The
output current limit is 100mA maximum and the minimum
temperature limit is 125°C. An output short circuit current will
therefore be limited to 100mA maximum. When the junction
temperature reaches its temperature limit, the output current
and/or output voltage will decrease to keep the junction
temperature from exceeding its temperature limit. For SMPS
start-up circuit applications, the LR12 turns off when an external
voltage greater than the output voltage of the LR12 is applied
to VOUT of the LR12. To maintain stability, a bypass capacitor
of 100nF or larger and a minimum DC output current of 500µA
are required.
LR12 Typical Application
VIN
13.2 to 100V
*
* Required for conditions where VIN is less than VOUT.
R1
R2
C2
C1RLOAD
VOUT
1.2 to 88V
LR12
VOUT
ADJ
VIN
2
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Pin Conguration
Absolute Maximum Ratings
Parameter Value
VIN-ADJ -0.5V to +120V
VOUT-ADJ -10V to +10V
VIN - VOUT -0.5V to +120V
Operating ambient temperature -40°C to +85°C
Operating junction temperature -40°C to +125°C
Storage temperature -65°C to +150°C
Power Dissipation @ TA = 25OC
TO-252 (D-PAK)
8-Lead SOIC
TO-92
2.0W
1.8W
0.6W
Package θja (OC/W)
TO-252 81OC/W
8-Lead SOIC 101OC/W
TO-92 132OC/W
Sym Parameter Min Typ Max Units Conditions
VIN - VOUT Input to output voltage difference 12 - 98.8 V ---
VOUT Overall output voltage regulation 1.14 1.20 1.26 V 13.2V < VIN <100V, R1 = 2.4KΩ, R2 = 0
ΔVOUT
Line regulation - 0.003 0.03 %/V 15V < VIN <100V, VOUT = 5.0V, IOUT = 0.5A
Load regulation - 1.4 3.0 % VIN = 15V, VOUT = 5.0V,
0.5mA< IOUT<50mA
Temperature regulation -1.0 - +1.0 % VIN = 15V, VOUT = 5.0V, IOUT = 10mA,
-40OC < TA < 85OC
Electrical Characteristics (Test conditions unless otherwise specied: -40OC < TA < +85OC)
8-Lead SOIC
TO-252 (D-PAK)
Product Marking
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
YYWW
LR12
LLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Si YYWW
LR12K4
LLLLLLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
SiLR
12
YWLL
TO-92
TO-252 (D-PAK)
8-Lead SOIC
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
TO-92
VIN
ADJ
VOUT
ADJ
NC
NC
VIN
VOUT
VOUT
VOUT
VOUT
ADJ
VIN
VOUT
Ordering Information
Part Number Package Options Packing
LR12K4-G TO-252 (D-PAK) 2000/Reel
LR12LG-G 8-Lead SOIC 2500/Reel
LR12N3-G TO-92 1000/Bag
LR12N3-G P002 TO-92 2000/Reel
LR12N3-G P003 TO-92 2000/Reel
LR12N3-G P005 TO-92 2000/Reel
LR12N3-G P013 TO-92 2000/Reel
LR12N3-G P014 TO-92 2000/Reel
-G denotes a lead (Pb)-free / RoHS compliant package
Typical Thermal Resistance
3
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Functional Block Diagram
Electrical Characteristics (cont.)
Sym Parameter Min Typ Max Units Conditions
IOUT
Output current limit 50 - 100 ma TJ < 85OC, VIN - VOUT < 12V
- - -0.5 TJ < 125OC, VIN - VOUT < 100V
Minimum output current 0.5 - - mA Includes R1 and load current
IADJ Adjust output current 5.0 10 15 µA ---
C2 Minimum output load
capacitance 100 - - nF ---
DVOUT/DVIN Ripple rejection ratio 50 60 - dB 120Hz, VOUT = 5.0V
TLIMIT Junction temperature limit 125 - - OC ---
Overtemp &
Overcurrent 10μA
1.2V
VIN VOUT
ADJ
LR12
Pass
Element
6.5V
1.0kΩ
Current Limit
-40 -20 0 20 40 60 80 100
100
90
80
70
60
50
Temperature (OC)
IC (mA)
4
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Figure 3: High Voltage Adjustable Constant Current Source
Figure 2: SMPS Start-Up Circuit
Typical Application Circuits
FB
LR12
VIN = 15 to 100V
VOUT1
VOUT2
+
+
-
-
VCC
VAUX
VOUT
ADJ
VIN
PWM IC
R
IOUT = 1.20V
R
+
-
100nF
VIN =
15 - 100V
VOUT
ADJ
VIN
LR12
Figure 1: High Input Voltage, 5.0V Output Linear Regulator
* Required for conditions where VIN is less than VOUT.
LR12
VIN =
17 - 100V
*
R2
18.2kΩ
±1%
C2
100nF
C1
VOUT = 5.0V
VOUT = 1.20V + IADJ R2
1+ R2
R1
VOUT
ADJ
VIN
RLOAD ≤ 16.5kΩ
R1
6.04kΩ
±1%
5
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Typical Performance Curves
13.2V 2.4kΩ 100nF
VOUT = 1.2V
VOUT
ADJ
VIN
LR12
VOUT (V)
T(junction) (oC)
Temperature Variation
-50 -25 0 25 50 75 100 125
1.30
1.25
1.20
1.15
1.10
1.05
1.00
6.04kΩ
±1%
18.2kΩ
±1%
100nF RLOAD
25V
IOUT
VOUT = 5.0V
LR12
VOUT
ADJ
VIN
VOUT (V)
IOUT (mA)
Load Regulation
0 5 10 15 20 25 30 35 40 45 50
5.30
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
6
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Typical Performance Curves (cont.)
6.04kΩ
±1%
18.2kΩ±1%
100nF
1.0kΩ
0V to 50V
VOUT = 5.0V
VOUT
ADJ
VIN
LR12
VOUT vs. VIN
VOUT (V)
VIN (V)
0 20 40 60 80 100
6.0
5.0
4.0
3.0
2.0
1.0
0
6.04kΩ
±1%
18.2kΩ ±1%
100nF
RLOAD
65V
IOUT
20VP-P
@ 120Hz
VOUT = 5.0V
VOUT
ADJ
VIN
LR12
Ripple Rejection
Ripple Rejection Ratio (dB)
IOUT (mA)
0 10 20 30 40 50
-65
-64
-63
-62
-61
-60
7
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
Typical Performance Curves (cont)
25V
18.2kΩ
±1%
100nF SW
100nF
10kΩ
0V
100V
VIN
0V
VIN
LR12
VOUT
ADJ
VIN
VOUT = 5.0V
6.04kΩ
±1%
10kΩ
509Ω
LR12
VOUT
ADJ
VIN
18.2kΩ
±1%
6.04kΩ
±1%
Load Transient Response Line Transient Response
Line Power Up Transient Line Power Down Transient
Load Transient Response, Load = 509Ω Line Turn On/Off Response
8
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
3-Lead TO-252 (D-PAK) Package Outline (K4)
Note:
1. Although 4 terminal locations are shown, only 3 are functional. Lead number 2 was removed.
1 2 3
4
L4 L5
b
b2
e
D1
E1
L1
L
Seating
Plane
A1
Gauge
Plane
θ
D
E
View B
Front View Side View
Rear View
View B
θ1
H
c2
A
L3
L2
b3
Note 1
Symbol A A1 b b2 b3 c2 D D1 E E1 e H L L1 L2 L3 L4 L5 θθ1
Dimen-
sion
(inches)
MIN .086 .000* .025 .030 .195 .018 .235 .205 .250 .170
.090
BSC
.370 .055
.108
REF
.020
BSC
.035 .025* .045 0O0O
NOM - - - - - - .240 - - - - .060 - - - - -
MAX .094 .005 .035 .045 .215 .035 .245 .217* .265 .182* .410 .070 .050 .040 .060 10O15O
JEDEC Registration TO-252, Variation AA, Issue E, June 2004.
* This dimension is not specied in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO252K4, Version E091009.
9
Supertex inc.
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Doc.# DSFP-LR12
C080113
LR12
8-Lead SOIC (Narrow Body) Package Outline (LG)
4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
1
8
Seating
Plane
Gauge
Plane
L
L1
L2
EE1
D
eb
AA2
A1
Seating
Plane
A
A
Top View
Side View
View B View B
θ1
θ
Note 1
(Index Area
D/2 x E1/2)
View A-A
h
h
Note 1
Symbol A A1 A2 b D E E1 e h L L1 L2 θ θ1
Dimension
(mm)
MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*
1.27
BSC
0.25 0.40
1.04
REF
0.25
BSC
0O5O
NOM - - - - 4.90 6.00 3.90 - - - -
MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8O15O
JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.
* This dimension is not specied in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-8SOLGTG, Version I041309.
Note:
1. This chamfer feature is optional. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier;
an embedded metal marker; or a printed indicator.
10
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
LR12
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-LR12
C080113
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014†.014†.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022†.022†.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specied in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.
Seating
Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A