Copyright©2008-2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2011.6
FUJITSU SEMICONDUCTOR
DATA SHEET
8-bit Microcontrollers
CMOS
New 8FX MB95260H/270H/280H Series
MB95F262H/F262K/F263H/F263K/F264H/F264K
MB95F272H/F272K/F273H/F273K/F274H/F274K
MB95F282H/F282K/F283H/F283K/F284H/F284K
DESCRIPTION
MB95260H/270H/280H are series of general-purpose, single-chip microcontrollers. In addition to a compact
instruction set, the microcontrollers of these series contain a variety of peripheral resources.
FEATURES
•F
2MC-8FX CPU core
Instruction set optimized for controllers
Multiplication and division instructions
16-bit arithmetic operations
Bit test branch instructions
Bit manipulation instructions, etc.
Note: F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
Clock (main OSC clock and sub-OSC clock are only available on MB95F262H/F262K/F263H/F263K/F264H/
F264K/F282H/F282K/F283H/F283K/F284H/F284K)
Selectable main clock source
Main OSC clock (up to 16.25 MHz, maximum machine clock frequency: 8.125 MHz)
External clock (up to 32.5 MHz, maximum machine clock frequency: 16.25 MHz)
Main CR clock (1/8/10 MHz ±3%, maximum machine clock frequency: 10 MHz)
Selectable subclock source
Sub-OSC clock (32.768 kHz)
External clock (32.768 kHz)
Sub CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 200 kHz)
•Timer
8/16-bit composite timer
Time-base timer
Watch prescaler
LIN-UART (only available on MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/F283H/
F283K/F284H/F284K)
Full duplex double buffer
Capable of clock-synchronized serial data transfer and clock-asynchronized serial data transfer
(Continued)
DS07–12627–7E
MB95260H/270H/280H Series
2DS07–12627–7E
(Continued)
External interrupt
Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
Can be used to wake up the device from different low power consumption (standby) modes
8/10-bit A/D converter
8-bit or 10-bit resolution can be selected.
Low power consumption (standby) modes
Stop mode
Sleep mode
•Watch mode
Time-base timer mode
I/O port (Max: 17) (MB95F262K/F263K/F264K)
General-purpose I/O ports (Max):
CMOS I/O: 15, N-ch open drain: 2
I/O port (Max: 16) (MB95F262H/F263H/F264H)
General-purpose I/O ports (Max):
CMOS I/O: 15, N-ch open drain: 1
I/O port (Max: 5) (MB95F272K/F273K/F274K)
General-purpose I/O ports (Max):
CMOS I/O: 3, N-ch open drain: 2
I/O port (Max: 4) (MB95F272H/F273H/F274H)
General-purpose I/O ports (Max):
CMOS I/O: 3, N-ch open drain: 1
I/O port (Max: 13) (MB95F282K/F283K/F284K)
General-purpose I/O ports (Max):
CMOS I/O: 11, N-ch open drain: 2
I/O port (Max: 12) (MB95F282H/F283H/F284H)
General-purpose I/O ports (Max):
CMOS I/O: 11, N-ch open drain: 1
On-chip debug
1-wire serial control
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
Built-in hardware watchdog timer
Built-in software watchdog timer
Power-on reset
A power-on reset is generated when the power is switched on.
Low-voltage detection reset circuit
Built-in low-voltage detector
Clock supervisor counter
Built-in clock supervisor counter function
Programmable port input voltage level
CMOS input level / hysteresis input level
Dual operation Flash memory
The program/erase operation and the read operation can be executed in different banks (upper bank/lower
bank) simultaneously.
Flash memory security function
Protects the content of the Flash memory
MB95260H/270H/280H Series
DS07–12627–7E 3
PRODUCT LINE-UP
MB95260H Series
(Continued)
Part number
Parameter
MB95F262H MB95F263H MB95F264H MB95F262K MB95F263K MB95F264K
Type Flash memory product
Clock
supervisor
counter
It supervises the main clock oscillation.
Flash memory
capacity 8 Kbyte 12 Kbyte 20 Kbyte 8 Kbyte 12 Kbyte 20 Kbyte
RAM capacity 240 bytes 496 bytes 496 bytes 240 bytes 496 bytes 496 bytes
Power-on reset Yes
Low-voltage
detection reset No Yes
Reset input Dedicated Selected by software
CPU functions
Number of basic instructions : 136
Instruction bit length : 8 bits
Instruction length : 1 to 3 bytes
Data bit length : 1, 8 and 16 bits
Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
Interrupt processing time : 0.6 µs (machine clock frequency = 16.25 MHz)
General-
purpose I/O
I/O ports (Max) : 16
CMOS I/O : 15
N-ch open drain: 1
I/O ports (Max) : 17
•CMOS I/O :15
N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
software
watchdog timer
Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
The sub CR clock can be used as the source clock of the hardware watchdog timer.
Wild register It can be used to replace three bytes of data.
LIN-UART
A wide range of communication speed can be selected by a dedicated reload timer.
It has a full duplex double buffer.
Clock-synchronized serial data transfer and clock-asynchronized serial data transfer is en-
abled.
The LIN function can be used as a LIN master or a LIN slave.
8/10-bit A/D
converter
6 channels
8-bit or 10-bit resolution can be selected.
8/16-bit
composite timer
2 channels
The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
External
interrupt
6 channels
Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
It can be used to wake up the device from the standby mode.
On-chip debug 1-wire serial control
It supports serial writing. (asynchronous mode)
MB95260H/270H/280H Series
4DS07–12627–7E
(Continued)
Part number
Parameter
MB95F262H MB95F263H MB95F264H MB95F262K MB95F263K MB95F264K
Watch prescaler Eight different time intervals can be selected.
Flash memory
It supports automatic programming, Embedded Algorithm, program/erase/erase-suspend/
erase-resume commands.
It has a flag indicating the completion of the operation of Embedded Algorithm.
Number of program/erase cycles: 100000
Data retention time: 20 years
Flash security feature for protecting the content of the Flash memory
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
Package
DIP-24P-M07
LCC-32P-M19
FPT-20P-M09
FPT-20P-M10
MB95260H/270H/280H Series
DS07–12627–7E 5
MB95270H Series
Part number
Parameter
MB95F272H MB95F273H MB95F274H MB95F272K MB95F273K MB95F274K
Type Flash memory product
Clock
supervisor
counter
It supervises the main clock oscillation.
Flash memory
capacity 8 Kbyte 12 Kbyte 20 Kbyte 8 Kbyte 12 Kbyte 20 Kbyte
RAM capacity 240 bytes 496 bytes 496 bytes 240 bytes 496 bytes 496 bytes
Power-on reset Yes
Low-voltage
detection reset No Yes
Reset input Dedicated Selected by software
CPU functions
Number of basic instructions : 136
Instruction bit length : 8 bits
Instruction length : 1 to 3 bytes
Data bit length : 1, 8 and 16 bits
Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
Interrupt processing time : 0.6 µs (machine clock frequency = 16.25 MHz)
General-
purpose I/O
I/O ports (Max) : 4
CMOS I/O : 3
N-ch open drain: 1
I/O ports (Max) : 5
•CMOS I/O :3
N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
software
watchdog timer
Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
The sub-internal CR clock can be used as the source clock of the hardware watchdog timer.
Wild register It can be used to replace three bytes of data.
LIN-UART No LIN-UART
8/10-bit A/D
converter
2 channels
8-bit or 10-bit resolution can be selected.
8/16-bit
composite timer
1 channel
The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
External
interrupt
2 channels
Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
It can be used to wake up the device from standby modes.
On-chip debug 1-wire serial control
It supports serial writing. (asynchronous mode)
Watch prescaler Eight different time intervals can be selected.
Flash memory
It supports automatic programming, Embedded Algorithm, program/erase/erase-suspend/
erase-resume commands.
It has a flag indicating the completion of the operation of Embedded Algorithm.
Number of program/erase cycles: 100000
Data retention time: 20 years
Flash security feature for protecting the content of the Flash memory
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
Package DIP-8P-M03
FPT-8P-M08
MB95260H/270H/280H Series
6DS07–12627–7E
MB95280H Series
(Continued)
Part number
Parameter
MB95F282H MB95F283H MB95F284H MB95F282K MB95F283K MB95F284K
Type Flash memory product
Clock
supervisor
counter
It supervises the main clock oscillation.
Flash memory
capacity 8 Kbyte 12 Kbyte 20 Kbyte 8 Kbyte 12 Kbyte 20 Kbyte
RAM capacity 240 bytes 496 bytes 496 bytes 240 bytes 496 bytes 496 bytes
Power-on reset Yes
Low-voltage
detection reset No Yes
Reset input Dedicated Selected by software
CPU functions
Number of basic instructions : 136
Instruction bit length : 8 bits
Instruction length : 1 to 3 bytes
Data bit length : 1, 8 and 16 bits
Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
Interrupt processing time : 0.6 µs (machine clock frequency = 16.25 MHz)
General-
purpose I/O
I/O ports (Max) : 12
CMOS I/O : 11
N-ch open drain: 1
I/O ports (Max) : 13
•CMOS I/O :11
N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
software
watchdog timer
Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
The sub-internal CR clock can be used as the source clock of the hardware watchdog timer.
Wild register It can be used to replace three bytes of data.
LIN-UART
A wide range of communication speed can be selected by a dedicated reload timer.
It has a full duplex double buffer.
Clock-synchronized serial data transfer and clock-asynchronized serial data transfer is en-
abled.
The LIN function can be used as a LIN master or a LIN slave.
8/10-bit A/D
converter
5 channels
8-bit or 10-bit resolution can be selected.
8/16-bit
composite timer
1 channel
The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel".
It has built-in timer function, PWC function, PWM function and input capture function.
Count clock: it can be selected from internal clocks (seven types) and external clocks.
It can output square wave.
External
interrupt
6 channels
Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
It can be used to wake up the device from standby modes.
On-chip debug 1-wire serial control
It supports serial writing. (asynchronous mode)
MB95260H/270H/280H Series
DS07–12627–7E 7
(Continued)
Part number
Parameter
MB95F282H MB95F283H MB95F284H MB95F282K MB95F283K MB95F284K
Watch prescaler Eight different time intervals can be selected.
Flash memory
It supports automatic programming, Embedded Algorithm, program/erase/erase-suspend/
erase-resume commands.
It has a flag indicating the completion of the operation of Embedded Algorithm.
Number of program/erase cycles: 100000
Data retention time: 20 years
Flash security feature for protecting the content of the Flash memory
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
Package
LCC-32P-M19
DIP-16P-M06
FPT-16P-M06
MB95260H/270H/280H Series
8DS07–12627–7E
PACKAGES AND CORRESPONDING PRODUCTS
O: Available
X: Unavailable
Part number
Package
MB95F
262H
MB95F
262K
MB95F
263H
MB95F
263K
MB95F
264H
MB95F
264K
MB95F
272H
MB95F
272K
MB95F
273H
MB95F
273K
MB95F
274H
MB95F
274K
DIP-24P-M07 OOOOOOXXXXXX
FPT-20P-M09 OOOOOOXXXXXX
FPT-20P-M10 OOOOOOXXXXXX
DIP-16P-M06 XXXXXXXXXXXX
FPT-16P-M06XXXXXXXXXXXX
DIP-8P-M03 XXXXXXOOOOOO
FPT-8P-M08 XXXXXXOOOOOO
LCC-32P-M19OOOOOOXXXXXX
Part number
Package
MB95F
282H
MB95F
282K
MB95F
283H
MB95F
283K
MB95F
284H
MB95F
284K
DIP-24P-M07 XXXXXX
FPT-20P-M09XXXXXX
FPT-20P-M10XXXXXX
DIP-16P-M06 OOOOOO
FPT-16P-M06 OOOOOO
DIP-8P-M03 XXXXXX
FPT-8P-M08 XXXXXX
LCC-32P-M19OOOOOO
MB95260H/270H/280H Series
DS07–12627–7E 9
DIFFERENCES AMONG PRODUCTS AND NOTES ON PRODUCT SELECTION
• Current consumption
When using the on-chip debug function, take account of the current consumption of flash erase/write.
For details of current consumption, see “ELECTRICAL CHARACTERISTICS”.
• Package
For details of information on each package, see “PACKAGES AND CORRESPONDING PRODUCTS” and
PACKAGE DIMENSION”.
• Operating voltage
The operating voltage varies, depending on whether the on-chip debug function is used or not.
For details of the operating voltage, see “ELECTRICAL CHARACTERISTICS”.
• On-chip debug function
The on-chip debug function requires that VCC, VSS and 1 serial-wire be connected to an evaluation tool. In
addition, if the Flash memory data has to be updated, the PF2/RST pin must also be connected to the same
evaluation tool.
MB95260H/270H/280H Series
10 DS07–12627–7E
PIN ASSIGNMENT
(Continued)
P12/EC0/DBG
NC
P07/INT07
P06/INT06/TO01
P05/INT05/AN05/TO00
P04/INT04/AN04/SIN/EC0
P03/INT03/AN03/SOT
P02/INT02/AN02/SCK
P01/AN01
P00/AN00
NC
P64/EC1
X0/PF0
NC
X1/PF1
Vss
X1A/PG2
X0A/PG1
Vcc
C
RST/PF2
TO10/P62
NC
TO11/P63
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
P12/EC0/DBG
P07/INT07
P06/INT06/TO01
P05/INT05/AN05/TO00
P04/INT04/AN04/SIN/EC0
P03/INT03/AN03/SOT
P02/INT02/AN02/SCK
P01/AN01
P00/AN00
P64/EC1
X0/PF0
X1/PF1
Vss
X1A/PG2
X0A/PG1
Vcc
C
RST/PF2
TO10/P62
TO11/P63
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
P12/EC0/DBG
P07/INT07
P06/INT06/TO01
P05/INT05/AN05/TO00
P04/INT04/AN04/SIN/EC0
P03/INT03/AN03/SOT
P02/INT02/AN02/SCK
P01/AN01
P00/AN00
P64/EC1
X1/PF1
X0/PF0
Vss
X1A/PG2
X0A/PG1
Vcc
C
RST/PF2
TO10/P62
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TO11/P63
20
21
22
23
24
323130292827 26 25
19
18
17
161514
13
1211
1
2
3
4
5
6
7
8
910
(TOP VIEW)
24 pins
DIP-24P-M07
The number of usable pins is 20.
(TOP VIEW)
32 pins
LCC-32P-M19
The number of usable pins is 20.
(TOP VIEW)
20 pins
FPT-20P-M09
FPT-20P-M10
MB95260H/270H/280H Series
DS07–12627–7E 11
(Continued)
P12/EC0/DBG
P06/INT06/TO01
P05/AN05/TO00
P04/INT04/AN04/EC0
Vss
Vcc
C
RST/PF2
8
7
6
5
1
2
3
4
P12/EC0/DBG
P07/INT07
P06/INT06/TO01
P05/INT05/AN05/TO00
P04/INT04/AN04/SIN/EC0
P03/INT03/AN03/SOT
P01/AN01
P02/INT02/AN02/SCK
X0/PF0
X1/PF1
Vss
X1A/PG2
X0A/PG1
Vcc
RST/PF2
C
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
P12/EC0/DBG
P07/INT07
P06/INT06/TO01
P05/INT05/AN05/TO00
P04/INT04/AN04/SIN/EC0
P03/INT03/AN03/SOT
P02/INT02/AN02/SCK
P01/AN01
X1/PF1
X0/PF0
Vss
X1A/PG2
X0A/PG1
Vcc
C
RST/PF2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
20
21
22
23
24
323130292827 26 25
19
18
17
16
15
14131211
1
2
3
4
5
6
7
8
910
(TOP VIEW)
16 pins
DIP-16P-M06
FPT-16P-M06
(TOP VIEW)
32 pins
LCC-32P-M19
The number of usable pins is 16.
(TOP VIEW)
8 pins
DIP-8P-M03 / FPT-8P-M08
MB95260H/270H/280H Series
12 DS07–12627–7E
PIN DESCRIPTION (MB95260H Series, 32 pins)
(Continued)
Pin no. Pin name
I/O
circuit
type*
Function
1PF1 BGeneral-purpose I/O port
X1 Main clock I/O oscillation pin
2PF0 BGeneral-purpose I/O port
X0 Main clock input oscillation pin
3VssPower supply pin (GND)
4PG2 CGeneral-purpose I/O port
X1A Subclock I/O oscillation pin
5PG1 CGeneral-purpose I/O port
X0A Subclock input oscillation pin
6VccPower supply pin
7CCapacitor connection pin
8
PF2
A
General-purpose I/O port
RST Reset pin
This is a dedicated reset pin in MB95F262H/F263H/F264H.
9P63 D
General-purpose I/O port
High-current pin
TO11 8/16-bit composite timer ch. 1 output pin
10 P62 D
General-purpose I/O port
High-current pin
TO10 8/16-bit composite timer ch. 1 output pin
11 NC It is an internally connected pin. Always leave it unconnected.
12 NC It is an internally connected pin. Always leave it unconnected.
13 NC It is an internally connected pin. Always leave it unconnected.
14 NC It is an internally connected pin. Always leave it unconnected.
15 P00 EGeneral-purpose I/O port
AN00 A/D converter analog input pin
16 P64 DGeneral-purpose I/O port
EC1 8/16-bit composite timer ch. 1 clock input pin
17 P01 EGeneral-purpose I/O port
AN01 A/D converter analog input pin
18
P02
E
General-purpose I/O port
INT02 External interrupt input pin
AN02 A/D converter analog input pin
SCK LIN-UART clock I/O pin
19
P03
E
General-purpose I/O port
INT03 External interrupt input pin
AN03 A/D converter analog input pin
SOT LIN-UART data output pin
MB95260H/270H/280H Series
DS07–12627–7E 13
(Continued)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
20
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
SIN LIN-UART data input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
21
P05
E
General-purpose I/O port
High-current pin
INT05 External interrupt input pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 output pin
22
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 output pin
23
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
24 P07 GGeneral-purpose I/O port
INT07 External interrupt input pin
25 NC It is an internally connected pin. Always leave it unconnected.
26 NC It is an internally connected pin. Always leave it unconnected.
27 NC It is an internally connected pin. Always leave it unconnected.
28 NC It is an internally connected pin. Always leave it unconnected.
29 NC It is an internally connected pin. Always leave it unconnected.
30 NC It is an internally connected pin. Always leave it unconnected.
31 NC It is an internally connected pin. Always leave it unconnected.
32 NC It is an internally connected pin. Always leave it unconnected.
MB95260H/270H/280H Series
14 DS07–12627–7E
PIN DESCRIPTION (MB95260H Series, 24 pins)
(Continued)
Pin no. Pin name
I/O
circuit
type*
Function
1PF0 BGeneral-purpose I/O port
X0 Main clock input oscillation pin
2 NC It is an internally connected pin. Always leave it unconnected.
3PF1 BGeneral-purpose I/O port
X1 Main clock I/O oscillation pin
4V
SS Power supply pin (GND)
5PG2 CGeneral-purpose I/O port
X1A Subclock I/O oscillation pin
6PG1 CGeneral-purpose I/O port
X0A Subclock input oscillation pin
7V
CC Power supply pin
8 C Capacitor connection pin
9
PF2
A
General-purpose I/O port
RST Reset pin
This is a dedicated reset pin in MB95F262H/F263H/F264H.
10 P62 D
General-purpose I/O port
High-current pin
TO10 8/16-bit composite timer ch. 1 output pin
11 NC It is an internally connected pin. Always leave it unconnected.
12 P63 D
General-purpose I/O port
High-current pin
TO11 8/16-bit composite timer ch. 1 output pin
13 P64 DGeneral-purpose I/O port
EC1 8/16-bit composite timer ch. 1 clock input pin
14 NC It is an internally connected pin. Always leave it unconnected.
15 P00 EGeneral-purpose I/O port
AN00 A/D converter analog input pin
16 P01 EGeneral-purpose I/O port
AN01 A/D converter analog input pin
17
P02
E
General-purpose I/O port
INT02 External interrupt input pin
AN02 A/D converter analog input pin
SCK LIN-UART clock I/O pin
MB95260H/270H/280H Series
DS07–12627–7E 15
(Continued)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
18
P03
E
General-purpose I/O port
INT03 External interrupt input pin
AN03 A/D converter analog input pin
SOT LIN-UART data output pin
19
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
SIN LIN-UART data input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
20
P05
E
General-purpose I/O port
High-current pin
INT05 External interrupt input pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 output pin
21
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 output pin
22 P07 GGeneral-purpose I/O port
INT07 External interrupt input pin
23 NC It is an internally connected pin. Always leave it unconnected.
24
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
MB95260H/270H/280H Series
16 DS07–12627–7E
PIN DESCRIPTION (MB95260H Series, 20 pins)
(Continued)
Pin no. Pin name
I/O
circuit
type*
Function
1PF0 BGeneral-purpose I/O port
X0 Main clock input oscillation pin
2PF1 BGeneral-purpose I/O port
X1 Main clock I/O oscillation pin
3V
SS Power supply pin (GND)
4PG2 CGeneral-purpose I/O port
X1A Subclock I/O oscillation pin
5PG1 CGeneral-purpose I/O port
X0A Subclock input oscillation pin
6V
CC Power supply pin
7 C Capacitor connection pin
8
PF2
A
General-purpose I/O port
RST Reset pin
This is a dedicated reset pin in MB95F262H/F263H/F264H.
9P62 D
General-purpose I/O port
High-current pin
TO10 8/16-bit composite timer ch. 1 output pin
10 P63 D
General-purpose I/O port
High-current pin
TO11 8/16-bit composite timer ch. 1 output pin
11 P64 DGeneral-purpose I/O port
EC1 8/16-bit composite timer ch. 1 clock input pin
12 P00 EGeneral-purpose I/O port
AN00 A/D converter analog input pin
13 P01 EGeneral-purpose I/O port
AN01 A/D converter analog input pin
14
P02
E
General-purpose I/O port
INT02 External interrupt input pin
AN02 A/D converter analog input pin
SCK LIN-UART clock I/O pin
15
P03
E
General-purpose I/O port
INT03 External interrupt input pin
AN03 A/D converter analog input pin
SOT LIN-UART data output pin
MB95260H/270H/280H Series
DS07–12627–7E 17
(Continued)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
16
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
SIN LIN-UART data input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
17
P05
E
General-purpose I/O port
High-current pin
INT05 External interrupt input pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 output pin
18
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 output pin
19 P07 GGeneral-purpose I/O port
INT07 External interrupt input pin
20
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
MB95260H/270H/280H Series
18 DS07–12627–7E
s
PIN DESCRIPTION (MB95270H Series, 8 pins)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
1V
SS Power supply pin (GND)
2V
CC Power supply pin
3 C Capacitor connection pin
4
PF2
A
General-purpose I/O port
RST Reset pin
This pin is a dedicated reset pin in MB95F272H/F273H/F274H.
5
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
6
P05
E
General-purpose I/O port
High-current pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 output pin
7
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 output pin
8
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
MB95260H/270H/280H Series
DS07–12627–7E 19
PIN DESCRIPTION (MB95280H Series, 32 pins)
(Continued)
Pin no. Pin name
I/O
circuit
type*
Function
1PF1 BGeneral-purpose I/O port
X1 Main clock I/O oscillation pin
2PF0 BGeneral-purpose I/O port
X0 Main clock input oscillation pin
3VssPower supply pin (GND)
4PG2 CGeneral-purpose I/O port
X1A Subclock I/O oscillation pin
5PG1 CGeneral-purpose I/O port
X0A Subclock input oscillation pin
6VccPower supply pin
7CCapacitor connection pin
8
PF2
A
General-purpose I/O port
RST Reset pin
This is a dedicated reset pin in MB95F282H/F283H/F284H.
9NCIt is an internally connected pin. Always leave it unconnected.
10 NC It is an internally connected pin. Always leave it unconnected.
11 NC It is an internally connected pin. Always leave it unconnected.
12 NC It is an internally connected pin. Always leave it unconnected.
13 NC It is an internally connected pin. Always leave it unconnected.
14 NC It is an internally connected pin. Always leave it unconnected.
15 NC It is an internally connected pin. Always leave it unconnected.
16 NC It is an internally connected pin. Always leave it unconnected.
17 P01 EGeneral-purpose I/O port
AN01 A/D converter analog input pin
18
P02
E
General-purpose I/O port
INT02 External interrupt input pin
AN02 A/D converter analog input pin
SCK LIN-UART clock I/O pin
19
P03
E
General-purpose I/O port
INT03 External interrupt input pin
AN03 A/D converter analog input pin
SOT LIN-UART data output pin
20
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
SIN LIN-UART data input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
MB95260H/270H/280H Series
20 DS07–12627–7E
(Continued)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
21
P05
E
General-purpose I/O port
High-current pin
INT05 External interrupt input pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 output pin
22
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 output pin
23
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
24 P07 GGeneral-purpose I/O port
INT07 External interrupt input pin
25 NC It is an internally connected pin. Always leave it unconnected.
26 NC It is an internally connected pin. Always leave it unconnected.
27 NC It is an internally connected pin. Always leave it unconnected.
28 NC It is an internally connected pin. Always leave it unconnected.
29 NC It is an internally connected pin. Always leave it unconnected.
30 NC It is an internally connected pin. Always leave it unconnected.
31 NC It is an internally connected pin. Always leave it unconnected.
32 NC It is an internally connected pin. Always leave it unconnected.
MB95260H/270H/280H Series
DS07–12627–7E 21
PIN DESCRIPTION (MB95280H Series, 16 pins)
(Continued)
Pin no. Pin name
I/O
circuit
type*
Function
1PF0 BGeneral-purpose I/O port
X0 Main clock input oscillation pin
2PF1 BGeneral-purpose I/O port
X1 Main clock I/O oscillation pin
3V
SS Power supply pin (GND)
4PG2 CGeneral-purpose I/O port
X1A Subclock I/O oscillation pin
5PG1 CGeneral-purpose I/O port
X0A Subclock input oscillation pin
6V
CC Power supply pin
7
PF2
A
General-purpose I/O port
RST Reset pin
This pin is a dedicated reset pin in MB95F282H/F283H/F284H.
8 C Capacitor connection pin
9
P02
E
General-purpose I/O port
INT02 External interrupt input pin
AN02 A/D converter analog input pin
SCK LIN-UART clock I/O pin
10 P01 EGeneral-purpose I/O port
AN01 A/D converter analog input pin
11
P03
E
General-purpose I/O port
INT03 External interrupt input pin
AN03 A/D converter analog input pin
SOT LIN-UART data output pin
12
P04
F
General-purpose I/O port
INT04 External interrupt input pin
AN04 A/D converter analog input pin
SIN LIN-UART data input pin
EC0 8/16-bit composite timer ch. 0 clock input pin
MB95260H/270H/280H Series
22 DS07–12627–7E
(Continued)
*: For the I/O circuit types, see “I/O CIRCUIT TYPE”.
Pin no. Pin name
I/O
circuit
type*
Function
13
P05
E
General-purpose I/O port
High-current pin
INT05 External interrupt input pin
AN05 A/D converter analog input pin
TO00 8/16-bit composite timer ch. 0 clock input pin
14
P06
G
General-purpose I/O port
High-current pin
INT06 External interrupt input pin
TO01 8/16-bit composite timer ch. 0 clock input pin
15 P07 GGeneral-purpose I/O port
INT07 External interrupt input pin
16
P12
H
General-purpose I/O port
EC0 8/16-bit composite timer ch. 0 clock input pin
DBG DBG input pin
MB95260H/270H/280H Series
DS07–12627–7E 23
I/O CIRCUIT TYPE
(Continued)
Type Circuit Remarks
A N-ch open drain output
Hysteresis input
Reset output
B Oscillation circuit
High-speed side
Feedback resistance:
approx. 1 MΩ
CMOS output
Hysteresis input
C Oscillation circuit
Low-speed side
Feedback resistance:
approx.10 MΩ
CMOS output
Hysteresis input
Pull-up control available
N-ch
Reset output / Digital output
Reset input / Hysteresis input
Standby control / Port select
Clock input
Port select
Digital output
Digital output
Standby control
Hysteresis input
Digital output
Digital output
Standby control
Hysteresis input
Port select
X1
X0
N-ch
P-ch
N-ch
P-ch
Clock input
X1A
X0A
Standby control / Port select
N-ch
P-ch
Port select
Digital output
Digital output
Standby control
Hysteresis input
N-ch
Digital output
Digital output
Digital output
Standby control
Hysteresis input
P-ch
RPull-up control
Port select
P-ch
RPull-up control
MB95260H/270H/280H Series
24 DS07–12627–7E
(Continued)
Type Circuit Remarks
D CMOS output
Hysteresis input
E CMOS output
Hysteresis input
Pull-up control available
F CMOS output
Hysteresis input
•CMOS input
Pull-up control available
G Hysteresis input
CMOS output
Pull-up control available
H N-ch open drain output
Hysteresis input
N-ch
P-ch
Digital output
Digital output
Standby control
Hysteresis input
N-ch
P-ch
P-ch
RPull-up control
Digital output
Digital output
Analog input
A/D control
Standby control
Hysteresis input
N-ch
P-ch
P-ch
RPull-up control
Digital output
Digital output
Analog input
A/D control
Standby control
Hysteresis input
CMOS input
N-ch
P-ch
P-ch
RPull-up control
Digital output
Digital output
Standby control
Hysteresis input
N-ch
Standby control
Hysteresis input
Digital output
MB95260H/270H/280H Series
DS07–12627–7E 25
NOTES ON DEVICE HANDLING
Preventing latch-ups
When using the device, ensure that the voltage applied does not exceed the maximum voltage rating.
In a CMOS IC, if a voltage higher than VCC or a voltage lower than VSS is applied to an input/output pin that
is neither a medium-withstand voltage pin nor a high-withstand voltage pin, or if a voltage out of the rating
range of power supply voltage mentioned in “1. Absolute Maximum Ratings” of “ELECTRICAL CHARAC-
TERISTICS” is applied to the VCC pin or the VSS pin, a latch-up may occur.
When a latch-up occurs, power supply current increases significantly, which may cause a component to be
thermally destroyed.
Stabilizing supply voltage
Supply voltage must be stabilized.
A malfunction may occur when power supply voltage fluctuates rapidly even though the fluctuation is within
the guaranteed operating range of the VCC power supply voltage.
As a rule of voltage stabilization, suppress voltage fluctuation so that the fluctuation in VCC ripple (p-p value)
at the commercial frequency (50 Hz/60 Hz) does not exceed 10% of the standard VCC value, and the transient
fluctuation rate does not exceed 0.1 V/ms at a momentary fluctuation such as switching the power supply.
Notes on using the external clock
When an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up
from subclock mode or stop mode.
PIN CONNECTION
Treatment of unused pins
If an unused input pin is left unconnected, a component may be permanently damaged due to malfunctions
or latch-ups. Always pull up or pull down an unused input pin through a resistor of at least 2 kΩ. Set an
unused input/output pin to the output state and leave it unconnected, or set it to the input state and treat it
the same as an unused input pin. If there is an unused output pin, leave it unconnected.
Power supply pins
To reduce unnecessary electro-magnetic emission, prevent malfunctions of strobe signals due to an increase
in the ground level, and conform to the total output current standard, always connect the VCC pin and the VSS
pin to the power supply and ground outside the device. In addition, connect the current supply source to the
VCC pin and the VSS pin with low impedance.
It is also advisable to connect a ceramic capacitor of approximately 0.1 µF as a bypass capacitor between
the VCC pin and the VSS pin at a location close to this device.
DBG pin
Connect the DBG pin directly to an external pull-up resistor.
To prevent the device from unintentionally entering the debug mode due to noise, minimize the distance
between the DBG pin and the VCC or VSS pin when designing the layout of the printed circuit board.
The DBG pin should not stay at “L” level after power-on until the reset output is released.
RST pin
Connect the RST pin directly to an external pull-up resistor.
To prevent the device from unintentionally entering the reset mode due to noise, minimize the distance
between the RST pin and the VCC or VSS pin when designing the layout of the printed circuit board.
The PF2/RST pin functions as the reset input/output pin after power-on. In addition, the reset output of the
PF2/RST pin can be enabled by the RSTOE bit of the SYSC register, and the reset input function and the
general purpose I/O function can be selected by the RSTEN bit of the SYSC register.
MB95260H/270H/280H Series
26 DS07–12627–7E
C pin
Use a ceramic capacitor or a capacitor with equivalent frequency characteristics. The bypass capacitor for
the VCC pin must have a capacitance larger than CS. For the connection to a smoothing capacitor CS, see
the diagram below. To prevent the device from unintentionally entering a mode to which the device is not set
to transit due to noise, minimize the distance between the C pin and CS and the distance between CS and
the VSS pin when designing the layout of a printed circuit board.
C
Cs
DBG
RST
DBG/RST/C pins connection diagram
MB95260H/270H/280H Series
DS07–12627–7E 27
BLOCK DIAGRAM (MB95260H Series)
MB95260H/270H/280H Series
28 DS07–12627–7E
BLOCK DIAGRAM (MB95270H Series)
Flash with security function
(20/12/8 Kbyte)
RAM (496/240 bytes)
Interrupt controller
8/10-bit A/D converter
8/16-bit composite timer (0)
Reset with LVD
CR oscillator
Clock control
On-chip debug
Wild register
External interrupt
Port Port
F
2
MC-8FX CPU
Internal Bus
(P05
*3
/TO00)
(P06
*3
/TO01)
P12
*1
/EC0, (P04/EC0)
P05
*3
/AN05, (P04/AN04)
(P12/DBG)
P04/INT04, P06
*3
/INT06
C
V
CC
V
SS
*1: PF2 and P12 are N-ch open drain pins.
*2: Software option
*3: P05 and P06 are high-current ports.
PF2
*1
/RST
*2
Note: Pins in parentheses indicate that functions of those pins are shared among different resources.
MB95260H/270H/280H Series
DS07–12627–7E 29
BLOCK DIAGRAM (MB95280H Series)
MB95260H/270H/280H Series
30 DS07–12627–7E
CPU CORE
• Memory Space
The memory space of the MB95260H/270H/280H Series is 64 Kbyte in size, and consists of an I/O area, a
data area, and a program area. The memory space includes areas intended for specific purposes such as
general-purpose registers and a vector table. The memory maps of the MB95260H/270H/280H Series are
shown below.
• Memory Maps
I/O area
Access prohibited
RAM 496 bytes
Register
Access prohibited
Extension I/O area
Access prohibited
Flash 20 Kbyte
0000H
0080H
0090H
0100H
0200H
0280H
0F80H
1000H
B000H
FFFFH
MB95F264H/F264K/F274H/
F274K/F284H/F284K
I/O area
Access prohibited
RAM 496 bytes
Register
Access prohibited
Access prohibited
Extension I/O area
Access prohibited
Flash 8 Kbyte
0000H
0080H
0090H
0100H
0280H
0200H
0F80H
1000H
B000H
C000H
E000H
FFFFH
MB95F263H/F263K/F273H/
F273K/F283H/F283K
I/O area
Access prohibited
RAM 240 bytes
Register
Access prohibited
Extension I/O area
Access prohibited
Access prohibited
Flash 4 Kbyte
Flash 4 Kbyte Flash 4 Kbyte
0000H
0080H
0090H
0100H
0180H
0F80H
1000H
B000H
C000H
F000H
FFFFH
MB95F262H/F262K/F272H/
F272K/F282H/F282K
MB95260H/270H/280H Series
DS07–12627–7E 31
I/O MAP (MB95260H Series)
(Continued)
Address Register
abbreviation Register name R/W Initial value
0000HPDR0 Port 0 data register R/W 00000000B
0001HDDR0 Port 0 direction register R/W 00000000B
0002HPDR1 Port 1 data register R/W 00000000B
0003HDDR1 Port 1 direction register R/W 00000000B
0004H (Disabled)
0005HWATR Oscillation stabilization wait time setting register R/W 11111111B
0006H (Disabled)
0007HSYCC System clock control register R/W 0000X011B
0008HSTBC Standby control register R/W 00000XXXB
0009HRSRR Reset source register R/W 000XXXXXB
000AHTBTC Time-base timer control register R/W 00000000B
000BHWPCR Watch prescaler control register R/W 00000000B
000CHWDTC Watchdog timer control register R/W 00XX0000B
000DHSYCC2 System clock control register 2 R/W XX100011B
000EH
to
0015H
(Disabled)
0016HPDR6 Port 6 data register R/W 00000000B
0017HDDR6 Port 6 direction register R/W 00000000B
0018H
to
0027H
(Disabled)
0028HPDRF Port F data register R/W 00000000B
0029HDDRF Port F direction register R/W 00000000B
002AHPDRG Port G data register R/W 00000000B
002BHDDRG Port G direction register R/W 00000000B
002CHPUL0 Port 0 pull-up register R/W 00000000B
002DH
to
0034H
(Disabled)
0035HPULG Port G pull-up register R/W 00000000B
0036HT01CR1 8/16-bit composite timer 01 status control register 1 ch. 0 R/W 00000000B
0037HT00CR1 8/16-bit composite timer 00 status control register 1 ch. 0 R/W 00000000B
0038HT11CR1 8/16-bit composite timer 11 status control register 1 ch. 1 R/W 00000000B
0039HT10CR1 8/16-bit composite timer 10 status control register 1 ch. 1 R/W 00000000B
003AH
to
0048H
(Disabled)
0049HEIC10 External interrupt circuit control register ch. 2/ch. 3 R/W 00000000B
MB95260H/270H/280H Series
32 DS07–12627–7E
(Continued)
Address Register
abbreviation Register name R/W Initial value
004AHEIC20 External interrupt circuit control register ch. 4/ch. 5 R/W 00000000B
004BHEIC30 External interrupt circuit control register ch. 6/ch. 7 R/W 00000000B
004CH
to
004FH
(Disabled)
0050HSCR LIN-UART serial control register R/W 00000000B
0051HSMR LIN-UART serial mode register R/W 00000000B
0052HSSR LIN-UART serial status register R/W 00001000B
0053HRDR/TDR LIN-UART receive/transmit data register R/W 00000000B
0054HESCR LIN-UART extended status control register R/W 00000100B
0055HECCR LIN-UART extended communication control register R/W 000000XXB
0056H
to
006BH
(Disabled)
006CHADC1 8/10-bit A/D converter control register 1 R/W 00000000B
006DHADC2 8/10-bit A/D converter control register 2 R/W 00000000B
006EHADDH 8/10-bit A/D converter data register upper R/W 00000000B
006FHADDL 8/10-bit A/D converter data register lower R/W 00000000B
0070H (Disabled)
0071HFSR2 Flash memory status register 2 R/W 00000000B
0072HFSR Flash memory status register R/W 000X0000B
0073HSWRE0 Flash memory sector write control register 0 R/W 00000000B
0074HFSR3 Flash memory status register 3 R 0000XXXXB
0075H (Disabled)
0076HWREN Wild register address compare enable register R/W 00000000B
0077HWROR Wild register data test setting register R/W 00000000B
0078HMirror of register bank pointer (RP) and direct bank pointer
(DP) ——
0079HILR0 Interrupt level setting register 0 R/W 11111111B
007AHILR1 Interrupt level setting register 1 R/W 11111111B
007BHILR2 Interrupt level setting register 2 R/W 11111111B
007CHILR3 Interrupt level setting register 3 R/W 11111111B
007DHILR4 Interrupt level setting register 4 R/W 11111111B
007EHILR5 Interrupt level setting register 5 R/W 11111111B
007FH (Disabled)
0F80HWRARH0 Wild register address setting register (Upper) ch. 0 R/W 00000000B
MB95260H/270H/280H Series
DS07–12627–7E 33
(Continued)
Address Register
abbreviation Register name R/W Initial value
0F81HWRARL0 Wild register address setting register (Lower) ch. 0 R/W 00000000B
0F82HWRDR0 Wild register data setting register ch. 0 R/W 00000000B
0F83HWRARH1 Wild register address setting register (Upper) ch. 1 R/W 00000000B
0F84HWRARL1 Wild register address setting register (Lower) ch. 1 R/W 00000000B
0F85HWRDR1 Wild register data setting register ch. 1 R/W 00000000B
0F86HWRARH2 Wild register address setting register (Upper) ch. 2 R/W 00000000B
0F87HWRARL2 Wild register address setting register (Lower) ch. 2 R/W 00000000B
0F88HWRDR2 Wild register data setting register ch. 2 R/W 00000000B
0F89H
to
0F91H
(Disabled)
0F92HT01CR0 8/16-bit composite timer 01 status control register 0 ch. 0 R/W 00000000B
0F93HT00CR0 8/16-bit composite timer 00 status control register 0 ch. 0 R/W 00000000B
0F94HT01DR 8/16-bit composite timer 01 data register ch. 0 R/W 00000000B
0F95HT00DR 8/16-bit composite timer 00 data register ch. 0 R/W 00000000B
0F96HTMCR0 8/16-bit composite timer 00/01 timer mode control register
ch. 0 R/W 00000000B
0F97HT11CR0 8/16-bit composite timer 11 status control register 0 ch. 1 R/W 00000000B
0F98HT10CR0 8/16-bit composite timer 10 status control register 0 ch. 1 R/W 00000000B
0F99HT11DR 8/16-bit composite timer 11 data register ch. 1 R/W 00000000B
0F9AHT10DR 8/16-bit composite timer 10 data register ch. 1 R/W 00000000B
0F9BHTMCR1 8/16-bit composite timer 10/11 timer mode control register
ch. 1 R/W 00000000B
0F9CH
to
0FBBH
(Disabled)
0FBCHBGR1 LIN-UART baud rate generator register 1 R/W 00000000B
0FBDHBGR0 LIN-UART baud rate generator register 0 R/W 00000000B
0FBEH
to
0FC2H
(Disabled)
0FC3HAIDRL A/D input disable register (Lower) R/W 00000000B
0FC4H
to
0FE3H
(Disabled)
0FE4HCRTH Main CR clock trimming register (Upper) R/W 1XXXXXXXB
0FE5HCRTL Main CR clock trimming register (Lower) R/W 000XXXXXB
MB95260H/270H/280H Series
34 DS07–12627–7E
(Continued)
• R/W access symbols
• Initial value symbols
Note: Do not write to an address that is “(Disabled)”. If a “(Disabled)” address is read, an indeterminate value
is returned.
Address Register
abbreviation Register name R/W Initial value
0FE6H,
0FE7H (Disabled)
0FE8HSYSC System configuration register R/W 11000011B
0FE9HCMCR Clock monitoring control register R/W 00000000B
0FEAHCMDR Clock monitoring data register R/W 00000000B
0FEBHWDTH Watchdog timer selection ID register (Upper) R/W XXXXXXXXB
0FECHWDTL Watchdog timer selection ID register (Lower) R/W XXXXXXXXB
0FEDH (Disabled)
0FEEHILSR Input level select register R/W 00000000B
0FEFH
to
0FFFH
(Disabled)
R/W : Readable / Writable
R : Read only
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is undefined.
MB95260H/270H/280H Series
DS07–12627–7E 35
I/O MAP (MB95270H Series)
(Continued)
Address Register
abbreviation Register name R/W Initial value
0000HPDR0 Port 0 data register R/W 00000000B
0001HDDR0 Port 0 direction register R/W 00000000B
0002HPDR1 Port 1 data register R/W 00000000B
0003HDDR1 Port 1 direction register R/W 00000000B
0004H (Disabled)
0005HWATR Oscillation stabilization wait time setting register R/W 11111111B
0006H (Disabled)
0007HSYCC System clock control register R/W 0000X011B
0008HSTBC Standby control register R/W 00000XXXB
0009HRSRR Reset source register R/W 000XXXXXB
000AHTBTC Time-base timer control register R/W 00000000B
000BHWPCR Watch prescaler control register R/W 00000000B
000CHWDTC Watchdog timer control register R/W 00XX0000B
000DHSYCC2 System clock control register 2 R/W XX100011B
000EH
to
0015H
(Disabled)
0016H (Disabled)
0017H (Disabled)
0018H
to
0027H
(Disabled)
0028HPDRF Port F data register R/W 00000000B
0029HDDRF Port F direction register R/W 00000000B
002AH (Disabled)
002BH (Disabled)
002CHPUL0 Port 0 pull-up register R/W 00000000B
002DH
to
0034H
(Disabled)
0035H (Disabled)
0036HT01CR1 8/16-bit composite timer 01 status control register 1 ch. 0 R/W 00000000B
0037HT00CR1 8/16-bit composite timer 00 status control register 1 ch. 0 R/W 00000000B
0038H (Disabled)
0039H (Disabled)
003AH
to
0048H
(Disabled)
0049H (Disabled)
MB95260H/270H/280H Series
36 DS07–12627–7E
(Continued)
Address Register
abbreviation Register name R/W Initial value
004AHEIC20 External interrupt circuit control register ch. 4 R/W 00000000B
004BHEIC30 External interrupt circuit control register ch. 6 R/W 00000000B
004CH
to
004FH
(Disabled)
0050H (Disabled)
0051H (Disabled)
0052H (Disabled)
0053H (Disabled)
0054H (Disabled)
0055H (Disabled)
0056H
to
006BH
(Disabled)
006CHADC1 8/10-bit A/D converter control register 1 R/W 00000000B
006DHADC2 8/10-bit A/D converter control register 2 R/W 00000000B
006EHADDH 8/10-bit A/D converter data register upper R/W 00000000B
006FHADDL 8/10-bit A/D converter data register lower R/W 00000000B
0070H (Disabled)
0071HFSR2 Flash memory status register 2 R/W 00000000B
0072HFSR Flash memory status register R/W 000X0000B
0073HSWRE0 Flash memory sector write control register 0 R/W 00000000B
0074HFSR3 Flash memory status register 3 R 0000XXXXB
0075H (Disabled)
0076HWREN Wild register address compare enable register R/W 00000000B
0077HWROR Wild register data test setting register R/W 00000000B
0078HMirror of register bank pointer (RP) and direct bank pointer
(DP) ——
0079HILR0 Interrupt level setting register 0 R/W 11111111B
007AHILR1 Interrupt level setting register 1 R/W 11111111B
007BH (Disabled)
007CH (Disabled)
007DHILR4 Interrupt level setting register 4 R/W 11111111B
007EHILR5 Interrupt level setting register 5 R/W 11111111B
007FH (Disabled)
0F80HWRARH0 Wild register address setting register (Upper) ch. 0 R/W 00000000B
0F81HWRARL0 Wild register address setting register (Lower) ch. 0 R/W 00000000B
0F82HWRDR0 Wild register data setting register ch. 0 R/W 00000000B
MB95260H/270H/280H Series
DS07–12627–7E 37
(Continued)
Address Register
abbreviation Register name R/W Initial value
0F83HWRARH1 Wild register address setting register (Upper) ch. 1 R/W 00000000B
0F84HWRARL1 Wild register address setting register (Lower) ch. 1 R/W 00000000B
0F85HWRDR1 Wild register data setting register ch. 1 R/W 00000000B
0F86HWRARH2 Wild register address setting register (Upper) ch. 2 R/W 00000000B
0F87HWRARL2 Wild register address setting register (Lower) ch. 2 R/W 00000000B
0F88HWRDR2 Wild register data setting register ch. 2 R/W 00000000B
0F89H
to
0F91H
(Disabled)
0F92HT01CR0 8/16-bit composite timer 01 status control register 0 ch. 0 R/W 00000000B
0F93HT00CR0 8/16-bit composite timer 00 status control register 0 ch. 0 R/W 00000000B
0F94HT01DR 8/16-bit composite timer 01 data register ch. 0 R/W 00000000B
0F95HT00DR 8/16-bit composite timer 00 data register ch. 0 R/W 00000000B
0F96HTMCR0 8/16-bit composite timer 00/01 timer mode control register
ch. 0 R/W 00000000B
0F97H (Disabled)
0F98H (Disabled)
0F99H (Disabled)
0F9AH (Disabled)
0F9BH (Disabled)
0F9CH
to
0FBBH
(Disabled)
0FBCH (Disabled)
0FBDH (Disabled)
0FBEH
to
0FC2H
(Disabled)
0FC3HAIDRL A/D input disable register (Lower) R/W 00000000B
0FC4H
to
0FE3H
(Disabled)
0FE4HCRTH Main CR clock trimming register (Upper) R/W 1XXXXXXXB
0FE5HCRTL Main CR clock trimming register (Lower) R/W 000XXXXXB
0FE6H,
0FE7H (Disabled)
0FE8HSYSC System configuration register R/W 11000011B
MB95260H/270H/280H Series
38 DS07–12627–7E
(Continued)
• R/W access symbols
• Initial value symbols
Note: Do not write to an address that is “(Disabled)”. If a “(Disabled)” address is read, an indeterminate value
is returned.
Address Register
abbreviation Register name R/W Initial value
0FE9HCMCR Clock monitoring control register R/W 00000000B
0FEAHCMDR Clock monitoring data register R/W 00000000B
0FEBHWDTH Watchdog timer selection ID register (Upper) R/W XXXXXXXXB
0FECHWDTL Watchdog timer selection ID register (Lower) R/W XXXXXXXXB
0FEDH (Disabled)
0FEEHILSR Input level select register R/W 00000000B
0FEFH
to
0FFFH
(Disabled)
R/W : Readable / Writable
R : Read only
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is undefined.
MB95260H/270H/280H Series
DS07–12627–7E 39
I/O MAP (MB95280H Series)
(Continued)
Address Register
abbreviation Register name R/W Initial value
0000HPDR0 Port 0 data register R/W 00000000B
0001HDDR0 Port 0 direction register R/W 00000000B
0002HPDR1 Port 1 data register R/W 00000000B
0003HDDR1 Port 1 direction register R/W 00000000B
0004H (Disabled)
0005HWATR Oscillation stabilization wait time setting register R/W 11111111B
0006H (Disabled)
0007HSYCC System clock control register R/W 0000X011B
0008HSTBC Standby control register R/W 00000XXXB
0009HRSRR Reset source register R/W 000XXXXXB
000AHTBTC Time-base timer control register R/W 00000000B
000BHWPCR Watch prescaler control register R/W 00000000B
000CHWDTC Watchdog timer control register R/W 00XX0000B
000DHSYCC2 System clock control register 2 R/W XX100011B
000EH
to
0015H
(Disabled)
0016H (Disabled)
0017H (Disabled)
0018H
to
0027H
(Disabled)
0028HPDRF Port F data register R/W 00000000B
0029HDDRF Port F direction register R/W 00000000B
002AHPDRG Port G data register R/W 00000000B
002BHDDRG Port G direction register R/W 00000000B
002CHPUL0 Port 0 pull-up register R/W 00000000B
002DH
to
0034H
(Disabled)
0035HPULG Port G pull-up register R/W 00000000B
0036HT01CR1 8/16-bit composite timer 01 status control register 1 ch. 0 R/W 00000000B
0037HT00CR1 8/16-bit composite timer 00 status control register 1 ch. 0 R/W 00000000B
0038H (Disabled)
0039H (Disabled)
003AH
to
0048H
(Disabled)
0049HEIC10 External interrupt circuit control register ch. 2/ch. 3 R/W 00000000B
MB95260H/270H/280H Series
40 DS07–12627–7E
(Continued)
Address Register
abbreviation Register name R/W Initial value
004AHEIC20 External interrupt circuit control register ch. 4/ch. 5 R/W 00000000B
004BHEIC30 External interrupt circuit control register ch. 6/ch. 7 R/W 00000000B
004CH
to
004FH
(Disabled)
0050HSCR LIN-UART serial control register R/W 00000000B
0051HSMR LIN-UART serial mode register R/W 00000000B
0052HSSR LIN-UART serial status register R/W 00001000B
0053HRDR/TDR LIN-UART receive/transmit data register R/W 00000000B
0054HESCR LIN-UART extended status control register R/W 00000100B
0055HECCR LIN-UART extended communication control register R/W 000000XXB
0056H
to
006BH
(Disabled)
006CHADC1 8/10-bit A/D converter control register 1 R/W 00000000B
006DHADC2 8/10-bit A/D converter control register 2 R/W 00000000B
006EHADDH 8/10-bit A/D converter data register upper R/W 00000000B
006FHADDL 8/10-bit A/D converter data register lower R/W 00000000B
0070H (Disabled)
0071HFSR2 Flash memory status register 2 R/W 00000000B
0072HFSR Flash memory status register R/W 000X0000B
0073HSWRE0 Flash memory sector write control register 0 R/W 00000000B
0074HFSR3 Flash memory status register 3 R 0000XXXXB
0075H (Disabled)
0076HWREN Wild register address compare enable register R/W 00000000B
0077HWROR Wild register data test setting register R/W 00000000B
0078HMirror of register bank pointer (RP) and direct bank pointer
(DP)
0079HILR0 Interrupt level setting register 0 R/W 11111111B
007AHILR1 Interrupt level setting register 1 R/W 11111111B
007BHILR2 Interrupt level setting register 2 R/W 11111111B
007CHILR3 Interrupt level setting register 3 R/W 11111111B
007DHILR4 Interrupt level setting register 4 R/W 11111111B
007EHILR5 Interrupt level setting register 5 R/W 11111111B
007FH (Disabled)
MB95260H/270H/280H Series
DS07–12627–7E 41
(Continued)
Address Register
abbreviation Register name R/W Initial value
0F80HWRARH0 Wild register address setting register (Upper) ch. 0 R/W 00000000B
0F81HWRARL0 Wild register address setting register (Lower) ch. 0 R/W 00000000B
0F82HWRDR0 Wild register data setting register ch. 0 R/W 00000000B
0F83HWRARH1 Wild register address setting register (Upper) ch. 1 R/W 00000000B
0F84HWRARL1 Wild register address setting register (Lower) ch. 1 R/W 00000000B
0F85HWRDR1 Wild register data setting register ch. 1 R/W 00000000B
0F86HWRARH2 Wild register address setting register (Upper) ch. 2 R/W 00000000B
0F87HWRARL2 Wild register address setting register (Lower) ch. 2 R/W 00000000B
0F88HWRDR2 Wild register data setting register ch. 2 R/W 00000000B
0F89H
to
0F91H
(Disabled)
0F92HT01CR0 8/16-bit composite timer 01 status control register 0 ch. 0 R/W 00000000B
0F93HT00CR0 8/16-bit composite timer 00 status control register 0 ch. 0 R/W 00000000B
0F94HT01DR 8/16-bit composite timer 01 data register ch. 0 R/W 00000000B
0F95HT00DR 8/16-bit composite timer 00 data register ch. 0 R/W 00000000B
0F96HTMCR0 8/16-bit composite timer 00/01 timer mode control register
ch. 0 R/W 00000000B
0F97H (Disabled)
0F98H (Disabled)
0F99H (Disabled)
0F9AH (Disabled)
0F9BH (Disabled)
0F9CH
to
0FBBH
(Disabled)
0FBCHBGR1 LIN-UART baud rate generator register 1 R/W 00000000B
0FBDHBGR0 LIN-UART baud rate generator register 0 R/W 00000000B
0FBEH
to
0FC2H
(Disabled)
0FC3HAIDRL A/D input disable register (Lower) R/W 00000000B
0FC4H
to
0FE3H
(Disabled)
0FE4HCRTH Main CR clock trimming register (Upper) R/W 1XXXXXXXB
0FE5HCRTL Main CR clock trimming register (Lower) R/W 000XXXXXB
MB95260H/270H/280H Series
42 DS07–12627–7E
(Continued)
• R/W access symbols
• Initial value symbols
Note: Do not write to an address that is “(Disabled)”. If a “(Disabled)” address is read, an indeterminate value
is returned.
Address Register
abbreviation Register name R/W Initial value
0FE6H,
0FE7H (Disabled)
0FE8HSYSC System configuration register R/W 11000011B
0FE9HCMCR Clock monitoring control register R/W 00000000B
0FEAHCMDR Clock monitoring data register R/W 00000000B
0FEBHWDTH Watchdog timer selection ID register (Upper) R/W XXXXXXXXB
0FECHWDTL Watchdog timer selection ID register (Lower) R/W XXXXXXXXB
0FEDH (Disabled)
0FEEHILSR Input level select register R/W 00000000B
0FEFH
to
0FFFH
(Disabled)
R/W : Readable / Writable
R : Read only
0 : The initial value of this bit is “0”.
1 : The initial value of this bit is “1”.
X : The initial value of this bit is undefined.
MB95260H/270H/280H Series
DS07–12627–7E 43
INTERRUPT SOURCE TABLE (MB95260H Series)
Interrupt source
Interrupt
request
number
Vector table address
Bit name of
interrupt level
setting register
Priority order of
interrupt sourc-
es of the same
level (occurring
simultaneously)
Upper Lower
External interrupt ch. 4 IRQ00 FFFAHFFFBHL00 [1:0] High
External interrupt ch. 5 IRQ01 FFF8HFFF9HL01 [1:0]
External interrupt ch. 2 IRQ02 FFF6HFFF7HL02 [1:0]
External interrupt ch. 6
External interrupt ch. 3 IRQ03 FFF4HFFF5HL03 [1:0]
External interrupt ch. 7
IRQ04 FFF2HFFF3HL04 [1:0]
8/16-bit composite timer ch. 0
(Lower) IRQ05 FFF0HFFF1HL05 [1:0]
8/16-bit composite timer ch. 0
(Upper) IRQ06 FFEEHFFEFHL06 [1:0]
LIN-UART (reception) IRQ07 FFECHFFEDHL07 [1:0]
LIN-UART (transmission) IRQ08 FFEAHFFEBHL08 [1:0]
IRQ09 FFE8HFFE9HL09 [1:0]
IRQ10 FFE6HFFE7HL10 [1:0]
IRQ11 FFE4HFFE5HL11 [1:0]
IRQ12 FFE2HFFE3HL12 [1:0]
IRQ13 FFE0HFFE1HL13 [1:0]
8/16-bit composite timer ch. 1
(Upper) IRQ14 FFDEHFFDFHL14 [1:0]
IRQ15 FFDCHFFDDHL15 [1:0]
IRQ16 FFDAHFFDBHL16 [1:0]
IRQ17 FFD8HFFD9HL17 [1:0]
8/10-bit A/D converter IRQ18 FFD6HFFD7HL18 [1:0]
Time-base timer IRQ19 FFD4HFFD5HL19 [1:0]
Watch prescaler IRQ20 FFD2HFFD3HL20 [1:0]
IRQ21 FFD0HFFD1HL21 [1:0]
8/16-bit composite timer ch. 1
(Lower) IRQ22 FFCEHFFCFHL22 [1:0]
Flash memory IRQ23 FFCCHFFCDHL23 [1:0] Low
MB95260H/270H/280H Series
44 DS07–12627–7E
INTERRUPT SOURCE TABLE (MB95270H Series)
Interrupt source
Interrupt
request
number
Vector table address
Bit name of
interrupt level
setting register
Priority order of
interrupt sourc-
es of the same
level (occurring
simultaneously)
Upper Lower
External interrupt ch. 4 IRQ00 FFFAHFFFBHL00 [1:0] High
IRQ01 FFF8HFFF9HL01 [1:0]
IRQ02 FFF6HFFF7HL02 [1:0]
External interrupt ch. 6
IRQ03 FFF4HFFF5HL03 [1:0]
IRQ04 FFF2HFFF3HL04 [1:0]
8/16-bit composite timer ch. 0
(Lower) IRQ05 FFF0HFFF1HL05 [1:0]
8/16-bit composite timer ch. 0
(Upper) IRQ06 FFEEHFFEFHL06 [1:0]
— IRQ07 FFECHFFEDHL07 [1:0]
— IRQ08 FFEAHFFEBHL08 [1:0]
IRQ09 FFE8HFFE9HL09 [1:0]
IRQ10 FFE6HFFE7HL10 [1:0]
IRQ11 FFE4HFFE5HL11 [1:0]
IRQ12 FFE2HFFE3HL12 [1:0]
IRQ13 FFE0HFFE1HL13 [1:0]
IRQ14 FFDEHFFDFHL14 [1:0]
IRQ15 FFDCHFFDDHL15 [1:0]
IRQ16 FFDAHFFDBHL16 [1:0]
IRQ17 FFD8HFFD9HL17 [1:0]
8/10-bit A/D converter IRQ18 FFD6HFFD7HL18 [1:0]
Time-base timer IRQ19 FFD4HFFD5HL19 [1:0]
Watch prescaler IRQ20 FFD2HFFD3HL20 [1:0]
IRQ21 FFD0HFFD1HL21 [1:0]
IRQ22 FFCEHFFCFHL22 [1:0]
Flash memory IRQ23 FFCCHFFCDHL23 [1:0] Low
MB95260H/270H/280H Series
DS07–12627–7E 45
INTERRUPT SOURCE TABLE (MB95280H Series)
Interrupt source
Interrupt
request
number
Vector table address
Bit name of
interrupt level
setting register
Priority order of
interrupt sourc-
es of the same
level (occurring
simultaneously)
Upper Lower
External interrupt ch. 4 IRQ00 FFFAHFFFBHL00 [1:0] High
External interrupt ch. 5 IRQ01 FFF8HFFF9HL01 [1:0]
External interrupt ch. 2 IRQ02 FFF6HFFF7HL02 [1:0]
External interrupt ch. 6
External interrupt ch. 3 IRQ03 FFF4HFFF5HL03 [1:0]
External interrupt ch. 7
IRQ04 FFF2HFFF3HL04 [1:0]
8/16-bit composite timer ch. 0
(Lower) IRQ05 FFF0HFFF1HL05 [1:0]
8/16-bit composite timer ch. 0
(Upper) IRQ06 FFEEHFFEFHL06 [1:0]
LIN-UART (reception) IRQ07 FFECHFFEDHL07 [1:0]
LIN-UART (transmission) IRQ08 FFEAHFFEBHL08 [1:0]
IRQ09 FFE8HFFE9HL09 [1:0]
IRQ10 FFE6HFFE7HL10 [1:0]
IRQ11 FFE4HFFE5HL11 [1:0]
IRQ12 FFE2HFFE3HL12 [1:0]
IRQ13 FFE0HFFE1HL13 [1:0]
IRQ14 FFDEHFFDFHL14 [1:0]
IRQ15 FFDCHFFDDHL15 [1:0]
IRQ16 FFDAHFFDBHL16 [1:0]
IRQ17 FFD8HFFD9HL17 [1:0]
8/10-bit A/D converter IRQ18 FFD6HFFD7HL18 [1:0]
Time-base timer IRQ19 FFD4HFFD5HL19 [1:0]
Watch prescaler IRQ20 FFD2HFFD3HL20 [1:0]
IRQ21 FFD0HFFD1HL21 [1:0]
IRQ22 FFCEHFFCFHL22 [1:0]
Flash memory IRQ23 FFCCHFFCDHL23 [1:0] Low
MB95260H/270H/280H Series
46 DS07–12627–7E
ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(Continued)
Parameter Symbol Rating Unit Remarks
Min Max
Power supply voltage*1VCC VSS 0.3 VSS + 6V
Input voltage*1VIVSS 0.3 VSS + 6V*2
Output voltage*1VOVSS 0.3 VSS + 6V*2
Maximum clamp current ICLAMP 2 + 2 mA Applicable to specific pins*3
Total maximum clamp
current Σ|ICLAMP| 20 mA Applicable to specific pins*3
“L” level maximum
output current
IOL1 15 mA Other than P05, P06, P62 and P63*4
IOL2 15 P05, P06, P62 and P63*4
“L” level average current
IOLAV1
4
mA
Other than P05, P06, P62 and P63*4
Average output current=
operating current × operating ratio (1 pin)
IOLAV2 12
P05, P06, P62 and P63*4
Average output current=
operating current × operating ratio (1 pin)
“L” level total maximum
output current ΣIOL 100 mA
“L” level total average
output current ΣIOLAV —50
mA Total average output current=
operating current × operating ratio
(Total number of pins)
“H” level maximum
output current
IOH1 15 mA Other than P05, P06, P62 and P63*4
IOH2 15 P05, P06, P62 and P63*4
“H” level average
current
IOHAV1
4
mA
Other than P05, P06, P62 and P63*4
Average output current=
operating current × operating ratio (1 pin)
IOHAV2 8
P05, P06, P62 and P63*4
Average output current=
operating current × operating ratio (1 pin)
“H” level total maximum
output current ΣIOH 100 mA
“H” level total average
output current ΣIOHAV 50 mA
Total average output current=
operating current × operating ratio
(Total number of pins)
Power consumption Pd 320 mW
Operating temperature TA 40 + 85 °C
Storage temperature Tstg 55 + 150 °C
MB95260H/270H/280H Series
DS07–12627–7E 47
(Continued)
*1: These parameters are based on the condition that VSS is 0.0 V.
*2: VI and VO must not exceed VCC + 0.3 V. VI must not exceed the rated voltage. However, if the maximum
current to/from an input is limited by means of an external component, the ICLAMP rating is used instead of
the VI rating.
*3: Applicable to the following pins: P00 to P07, P62 to P64, PG1, PG2, PF0, PF1 (P00, P62, P63 and P64 are
only available on MB95F262H/F262K/F263H/F263K/F264H/F264K. P01, P02, P03, P07, PG1, PG2, PF0
and PF1 are only available on MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/F283H/
F283K/F284H/F284K.)
Use under recommended operating conditions.
Use with DC voltage (current).
The HV (High Voltage) signal is an input signal exceeding the VCC voltage. Always connect a limiting resistor
between the HV (High Voltage) signal and the microcontroller before applying the HV (High Voltage) signal.
The value of the limiting resistor should be set to a value at which the current to be input to the microcontroller
pin when the HV (High Voltage) signal is input is below the standard value, irrespective of whether the
current is transient current or stationary current.
When the microcontroller drive current is low, such as in low power consumption modes, the HV (High
Voltage) input potential may pass through the protective diode to increase the potential of the VCC pin,
affecting other devices.
If the HV (High Voltage) signal is input when the microcontroller power supply is off (not fixed at 0 V), since
power is supplied from the pins, incomplete operations may be executed.
If the HV (High Voltage) input is input after power-on, since power is supplied from the pins, the voltage
of power supply may not be sufficient to enable a power-on reset.
Do not leave the HV (High Voltage) input pin unconnected.
Example of a recommended circuit:
*4: P62 and P63 are only available on MB95F262H/F262K/F263H/F263K/F264H/F264K.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
WARNING:
HV(High Voltage) input (0 V to 16 V)
Protective diode
VCC
N-ch
P-ch
R
Limiting
resistor
Input/Output equivalent circuit
MB95260H/270H/280H Series
48 DS07–12627–7E
2. Recommended Operating Conditions
(VSS = 0.0 V)
*1: The value varies depending on the operating frequency, the machine clock and the analog guaranteed range.
*2: The value is 2.88 V when the low-voltage detection reset is used.
*3: Use a ceramic capacitor or a capacitor with equivalent frequency characteristics. The bypass capacitor for
the VCC pin must have a capacitance larger than CS. For the connection to a smoothing capacitor CS, see
the diagram below. To prevent the device from unintentionally entering an unknown mode due to noise,
minimize the distance between the C pin and CS and the distance between CS and the VSS pin when designing
the layout of a printed circuit board.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
WARNING:
Parameter Symbol Value Unit Remarks
Min Max
Power supply
voltage VCC
2.4*1*25.5*1
V
In normal operation Other than on-chip debug
mode
2.3 5.5 Hold condition in stop mode
2.9 5.5 In normal operation On-chip debug mode
2.3 5.5 Hold condition in stop mode
Smoothing
capacitor CS0.022 1 µF *3
Operating
temperature TA
-40 + 85 °COther than on-chip debug mode
+ 5 + 35 On-chip debug mode
C
Cs
DBG
*
Since the DBG pin becomes a communication pin in on-chip debug mode,
set a pull-up resistor value suiting the input/output specifications of P12/DBG.
*:
RST
•DBG / RST / C pins connection diagram
MB95260H/270H/280H Series
DS07–12627–7E 49
3. DC Characteristics
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
(Continued)
Parameter Symbol Pin name Condition Value Unit Remarks
Min Typ Max
"H" level
input
voltage
VIHI P04 *1 0.7 VCC —VCC + 0.3 V
When CMOS input
level (hysteresis
input) is selected
VIHS
P00 to P07,
P12,
P62 to P64,
PF0, PF1,
PG1, PG2
*1 0.8 VCC —VCC + 0.3 V Hysteresis input
VIHM PF2 0.7 VCC —VCC + 0.3 V Hysteresis input
“L” level
input
voltage
VIL P04 *1 VSS 0.3 0.3 VCC V
When CMOS input
level (hysteresis
input) is selected
VILS
P00 to P07,
P12,
P62 to P64,
PF0, PF1,
PG1, PG2
*1 VSS 0.3 0.2 VCC V Hysteresis input
VILM PF2 VSS 0.3 0.3 VCC V Hysteresis input
Open-drain
output
application
voltage
VDPF2, P12 VSS 0.3 VSS + 5.5 V
“H” level
output
voltage
VOH1
Output pins
other than P05,
P06, P12, P62,
P63, PF2*2
IOH = 4 mA VCC 0.5 V
VOH2 P05, P06, P62,
P63*2 IOH = 8 mA VCC 0.5 V
“L” level
output
voltage
VOL1
Output pins
other than P05,
P06, P62,
P63*2
IOL = 4 mA 0.4 V
VOL2 P05, P06, P62,
P63*2 IOL = 12 mA 0.4 V
Input leak
current
(Hi-Z output
leak
current)
ILI All input pins 0.0 V < VI < VCC 5— +A
When pull-up
resistance is
disabled
Pull-up
resistance RPULL P00 to P07,
PG1, PG2*3*4 VI = 0 V 25 50 100 kΩ
When pull-up
resistance is
enabled
Input
capacitance CIN Other than VCC
and VSS f = 1 MHz 5 15 pF
MB95260H/270H/280H Series
50 DS07–12627–7E
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
(Continued)
Parameter Symbol Pin name Condition Value Unit Remarks
Min Typ Max
Power
supply
current*4
ICC
VCC
(External clock
operation)
VCC = 5.5 V
FCH = 32 MHz
FMP = 16 MHz
Main clock mode
(divided by 2)
—1317mA
Except during
Flash memory
programming and
erasing
33.5 39.5 mA
During Flash
memory
programming and
erasing
15 21 mA At A/D conversion
ICCS
VCC = 5.5 V
FCH = 32 MHz
FMP = 16 MHz
Main sleep mode
(divided by 2)
—5.5 9 mA
ICCL
VCC = 5.5 V
FCL = 32 kHz
FMPL = 16 kHz
Subclock mode
(divided by 2)
TA = + 25°C
65 153 µA
ICCLS
VCC = 5.5 V
FCL = 32 kHz
FMPL = 16 kHz
Subsleep mode
(divided by 2)
TA = + 25°C
—1084µA
ICCT
VCC = 5.5 V
FCL = 32 kHz
Watch mode
Main stop mode
TA = + 25°C
5 30 µA
ICCMCR
VCC
VCC = 5.5 V
FCRH = 10 MHz
FMP = 10 MHz
Main CR clock
mode
—8.6—mA
ICCSCR
VCC = 5.5 V
Sub-CR clock
mode
(divided by 2)
TA = + 25°C
110 410 µA
MB95260H/270H/280H Series
DS07–12627–7E 51
(Continued)
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: The input level of P04 can be switched between “CMOS input level” and “hysteresis input level”. The input
level selection register (ILSR) is used to switch between the two input levels.
*2: P62 and P63 are only available on MB95F262H/F262K/F263H/F263K/F264H/F264K.
*3: P00 is only available on MB95F262H/F262K/F263H/F263K/F264H/F264K. P01, P02, P03, P07, PG1 and
PG2 are only available on MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/F283H/F283K/
F284H/F284K.
*4: The power supply current is determined by the external clock. When the low-voltage detection option is
selected, the power-supply current will be the sum of adding the current consumption of the low-voltage
detection circuit (ILV D ) to one of the value from ICC to ICCH. In addition, when both the low-voltage detection
option and the CR oscillator are selected, the power supply current will be the sum of adding up the current
consumption of the low-voltage detection circuit, the current consumption of the CR oscillators (ICRH, ICRL)
and a specified value. In on-chip debug mode, the CR oscillator (ICRH) and the low-voltage detection circuit
are always enabled, and current consumption therefore increases accordingly.
See "4. AC Characteristics: (1) Clock Timing" for FCH and FCL.
See "4. AC Characteristics: (2) Source Clock / Machine Clock" for FMP and FMPL.
Parameter Symbol Pin name Condition Value Unit Remarks
Min Typ Max
Power
supply
current*4
ICCTS VCC
(External clock
operation)
VCC = 5.5 V
FCH = 32 MHz
Time-base timer
mode
TA = + 25°C
—1.1 3 mA
ICCH
VCC = 5.5 V
Substop mode
TA = + 25°C
3.5 22.5 µA
Main stop mode
for single external
clock selection
ILVD
VCC
Current
consumption for
low-voltage
detection circuit
only
—3754µA
ICRH
Current
consumption for
the main CR
oscillator
—0.50.6mA
ICRL
Current
consumption for
the sub-CR
oscillator oscillating
at 100 kHz
—2072µA
MB95260H/270H/280H Series
52 DS07–12627–7E
4. AC Characteristics
(1) Clock Timing
(VCC = 2.4 V to 5.5 V, VSS = 0.0 V, TA = -40°C to + 85°C)
(Continued)
Parameter Symbol Pin name Condition Value Unit Remarks
Min Typ Max
Clock
frequency
FCH
X0, X1 1 16.25 MHz When the main oscillation
circuit is used
X0 X1 : open 1 12 MHz When the main external clock
is used
X0, X1 *1 1 32.5 MHz
FCRH
9.7 10 10.3 MHz When the main CR clock is
used*2
3.3 V Vcc 5.5 V(-40 °C TA + 40 °C)
2.4 V Vcc < 3.3 V(0 °C TA + 40 °C)
7.76 8 8.24 MHz
0.97 1 1.03 MHz
9.55 10 10.45 MHz When the main CR clock is
used*2
3.3 V Vcc 5.5 V ( + 40 °C < TA + 85 °C)
7.64 8 8.36 MHz
0.955 1 1.045 MHz
9.5 10 10.5 MHz When the main CR clock is
used*2
2.4 V Vcc < 3.3 V
(-40 °C TA < 0 °C, + 40 °C < TA + 85 °C)
7.688.4MHz
0.95 1 1.05 MHz
9.7 10 10.3 MHz When the main CR clock is
used*3
2.4 V Vcc 5.5 V(0 °C TA + 40 °C)
7.76 8 8.24 MHz
0.97 1 1.03 MHz
9.5 10 10.5 MHz When the main CR clock is
used*3
2.4 V Vcc 5.5 V
(-40 °C TA < 0 °C, + 40 °C < TA + 85 °C)
7.688.4MHz
0.95 1 1.05 MHz
FCL X0A, X1A
32.768 kHz When the sub oscillation circuit
is used
32.768 kHz When the sub-external clock is
used
FCRL 50 100 200 kHz When the sub CR clock is used
Clock cycle
time
tHCYL
X0, X1 61.5 1000 ns When the main oscillation
circuit is used
X0 X1 : open 83.4 1000 ns When the external clock is
used
X0, X1 *1 30.8 1000 ns
tLCYL X0A, X1A 30.5 µs When the subclock is used
MB95260H/270H/280H Series
DS07–12627–7E 53
(Continued)
(VCC = 2.4 V to 5.5 V, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: The external clock signal is input to X0 and the inverted external clock signal to X1.
*2: These specifications are not applicable to the following products: MB95F272HPH, MB95F272KPH,
MB95F273HPH, MB95F273KPH, MB95F274HPH, MB95F274KPH, MB95F282HPH, MB95F282KPH,
MB95F283HPH, MB95F283KPH, MB95F284HPH and MB95F284KPH.
*3: These specifications are only applicable to the following products: MB95F272HPH, MB95F272KPH,
MB95F273HPH, MB95F273KPH, MB95F274HPH, MB95F274KPH, MB95F282HPH, MB95F282KPH,
MB95F283HPH, MB95F283KPH, MB95F284HPH and MB95F284KPH.
Parameter Symbol Pin name Condition Value Unit Remarks
Min Typ Max
Input clock
pulse width
tWH1
tWL1
X0 X1 : open 33.4 ns When the external clock is
used, the duty ratio should
range between 40% and
60%.
X0, X1 *1 12.4 ns
tWH2
tWL2 X0A 15.2 µs
Input clock
rise time and
fall time
tCR
tCF
X0 X1 : open 5 ns When the external clock is
used
X0, X1 *1 5 ns
CR oscillation
start time
tCRHWK 80 µs When the main CR clock is
used
tCRLWK 10 µs When the sub CR clock is
used
MB95260H/270H/280H Series
54 DS07–12627–7E
X0, X1 0.8 VCC
0.2 VCC 0.2 VCC
0.8 VCC
tWH1 tWL1
0.2 VCC
tHCYL
tCR tCF
Input waveform generated when an external clock (main clock) is used
When a crystal oscillator or
a ceramic oscillator is used
When an external clock
is used
X0 X1 X0 X1
FCH
FCH
When an external clock is used
(X1 is open)
X0 X1
Open
FCH
Figure of main clock input port external connection
X0A 0.8 VCC
0.2 VCC 0.2 VCC
0.8 VCC
tWH2 tWL2
0.2 VCC
tLCYL
tCR tCF
Input waveform generated when an external clock (subclock) is used
When a crystal oscillator or
a ceramic oscillator is used
When an external clock
is used
X0A X1A X0A X1A
Open
F
CL
F
CL
Figure of subclock input port external connection
MB95260H/270H/280H Series
DS07–12627–7E 55
(2) Source Clock / Machine Clock
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: This is the clock before it is divided according to the division ratio set by the machine clock division ratio
select bits (SYCC : DIV1 and DIV0) . This source clock is divided to become a machine clock according to
the division ratio set by the machine clock division ratio select bits (SYCC : DIV1 and DIV0). In addition, a
source clock can be selected from the following.
• Main clock divided by 2
• Main CR clock
• Subclock divided by 2
• Sub-CR clock divided by 2
*2: This is the operating clock of the microcontroller. A machine clock can be selected from the following.
• Source clock (no division)
• Source clock divided by 4
• Source clock divided by 8
• Source clock divided by 16
Parameter Symbol Pin
name
Value Unit Remarks
Min Typ Max
Source clock
cycle time*1tSCLK
61.5 2000 ns
When the main external clock is used
Min: FCH = 32.5 MHz, divided by 2
Max: FCH = 1 MHz, divided by 2
100 1000 ns
When the main CR clock is used
Min: FCRH = 10 MHz
Max: FCRH = 1 MHz
—61—µs
When the sub-oscillation clock is used
FCL = 32.768 kHz, divided by 2
—20—µs
When the sub CR clock is used
FCRL = 100 kHz, divided by 2
Source clock
frequency
FSP
0.5 16.25 MHz When the main oscillation clock is used
110 MHz When the main CR clock is used
FSPL
16.384 kHz When the sub-oscillation clock is used
50 kHz When the sub-CR clock is used
FCRL = 100 kHz, divided by 2
Machine clock
cycle time*2
(minimum
instruction
execution
time)
tMCLK
61.5 32000 ns
When the main oscillation clock is used
Min: FSP = 16.25 MHz, no division
Max: FSP = 0.5 MHz, divided by 16
100 16000 ns
When the main CR clock is used
Min: FSP = 10 MHz
Max: FSP = 1 MHz, divided by 16
61 976.5 µs
When the sub-oscillation clock is used
Min: FSPL = 16.384 kHz, no division
Max: FSPL = 16.384 kHz, divided by 16
20 320 µs
When the sub-CR clock is used
Min: FSPL = 50 kHz, no division
Max: FSPL = 50 kHz, divided by 16
Machine clock
frequency
FMP
0.031 16.25 MHz When the main oscillation clock is used
0.0625 10 MHz When the main CR clock is used
FMPL
1.024 16.384 kHz When the sub-oscillation clock is used
3.125 50 kHz When the sub-CR clock is used
FCRL = 100 kHz
MB95260H/270H/280H Series
56 DS07–12627–7E
FCH
(main oscillation)
FCRH
(Main
CR clock)
FCL
(sub-oscillation) FCRL
(Sub-
CR clock)
SCLK
(source clock)
MCLK
(machine clock)
Clock mode select bits
(SYCC2: RCS1, RCS0)
Machine clock division
ratio select bits
(SYCC : DIV1, DIV0)
Division
circuit
×
×
×
×
1
1/4
1/8
1/16
Divided
by 2
Divided
by 2
Divided
by 2
Schematic diagram of the clock generation block
Operating voltage (V)
A/D converter operation range
5.5
5.0
4.0
3.5
3.0
2.4
16 kHz 3 MHz 10 MHz 16.25 MHz
Source clock frequency (F
SP
/F
SPL
)
Operating voltage (V)
A/D converter operation range
5.5
5.0
4.0
3.5
3.0
2.9
16 kHz 3 MHz 10 MHz 16.25 MHz
Source clock frequency (FSP)
Operating voltage - Operating frequency (When TA = -40°C to + 85°C)
MB95260H/270H/280H (without the on-chip debug function)
Operating voltage - Operating frequency (When TA = -40°C to + 85°C)
MB95260H/270H/280H (with the on-chip debug function)
MB95260H/270H/280H Series
DS07–12627–7E 57
(3) External Reset
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1 : See “(2) Source Clock / Machine Clock” for tMCLK.
*2 : The oscillation time of an oscillator is the time for it to reach 90% of its amplitude. The crystal oscillator has
an oscillation time of between several ms and tens of ms. The ceramic oscillator has an oscillation time of
between hundreds of µs and several ms. The external clock has an oscillation time of 0 ms. The CR oscillator
clock has an oscillation time of between several µs and several ms.
Parameter Symbol Value Unit Remarks
Min Max
RST “L” level
pulse width tRSTL
2 tMCLK*1 ns In normal operation
Oscillation time of the
oscillator*2 + 100 —µs
In stop mode, subclock mode,
sub-sleep mode, watch mode,
and power-on
100 µs In time-base timer mode
0.2 VCC
RST
0.2 VCC
tRSTL
t
RSTL
0.2 V
CC
0.2 V
CC
100 μs
X0
Internal
operating
clock
90% of
amplitude
Oscillation
time of
oscillator Oscillation stabilization wait time
Execute instructionInternal reset
RST
In normal operation
In stop mode, subclock mode, subsleep mode, watch mode and power-on
MB95260H/270H/280H Series
58 DS07–12627–7E
(4) Power-on Reset
(VSS = 0.0 V, TA = -40°C to + 85°C)
Note: A sudden change of power supply voltage may activate the power-on reset function. When changing the
power supply voltage during the operation, set the slope of rising to a value below within 30 mV/ms as
shown below.
Parameter Symbol Condition Value Unit Remarks
Min Max
Power supply rising time tR——50ms
Power supply cutoff time tOFF 1 ms Wait time until power-on
0.2 V0.2 V
tOFF
tR
2.5 V
0.2 V
V
CC
V
CC
2.3 V
V
SS
Hold condition in stop mode
Set the slope of rising to
a value below 30 mV/ms.
MB95260H/270H/280H Series
DS07–12627–7E 59
(5) Peripheral Input Timing
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: See “(2) Source Clock / Machine Clock” for tMCLK.
*2: INT04, INT06 and EC0 are available in all products.
*3: INT02, INT03, INT05 and INT07 are only available on MB95F262H/F262K/F263H/F263K/F264H/F264K/
F282H/F282K/F283H/F283K/F284H/F284K.
*4: EC1 is only available on MB95F262H/F262K/F263H/F263K/F264H/F264K.
Parameter Symbol Pin name Value Unit
Min Max
Peripheral input “H” pulse width tILIH INT02 to INT07*2,*3, EC0*2, EC1*4 2 tMCLK*1 —ns
Peripheral input “L” pulse width tIHIL 2 tMCLK*1 —ns
INT02 to INT07*2, *3,
EC0*2, EC1*4
0.8 VCC 0.8 VCC
0.2 VCC 0.2 VCC
tILIH tIHIL
MB95260H/270H/280H Series
60 DS07–12627–7E
(6) LIN-UART Timing (only available on MB95F262H/F262K/F263H/F263K/F264H/F264K/F282H/F282K/
F283H/F283K/F284H/F284K)
Sampling is executed at the rising edge of the sampling clock*1, and serial clock delay is disabled*2.
(ESCR register: SCES bit = 0, ECCR register: SCDE bit = 0)
(VCC = 5.0 V±10%, AVSS = VSS = 0.0 V, TA = -40°C to + 85°C)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or
a falling edge of the serial clock.
*2: The serial clock delay function is a function used to delay the output signal of the serial clock for half the clock.
*3: See “(2) Source Clock / Machine Clock” for tMCLK.
Parameter Symbol Pin name Condition Value Unit
Min Max
Serial clock cycle time tSCYC SCK
Internal clock
operation output pin:
CL = 80 pF + 1 TTL
5 tMCLK*3—ns
SCK ↓→ SOT delay time tSLOVI SCK, SOT 95 + 95 ns
Valid SIN SCK tIVSHI SCK, SIN tMCLK*3 + 190 ns
SCK ↑→ valid SIN hold time tSHIXI SCK, SIN 0 ns
Serial clock “L” pulse width tSLSH SCK
External clock
operation output pin:
CL = 80 pF + 1 TTL
3 tMCLK*3 tR—ns
Serial clock “H” pulse width tSHSL SCK tMCLK*3 + 95 ns
SCK ↓→ SOT delay time tSLOVE SCK, SOT 2 tMCLK*3 + 95 ns
Valid SIN SCK tIVSHE SCK, SIN 190 ns
SCK ↑→ valid SIN hold time tSHIXE SCK, SIN tMCLK*3 + 95 ns
SCK fall time tFSCK 10 ns
SCK rise time tRSCK 10 ns
MB95260H/270H/280H Series
DS07–12627–7E 61
0.8 V0.8 V
2.4 V
t
SLOVI
t
IVSHI
t
SHIXI
2.4 V
0.8 V
SCK
SOT
SIN
0.8 V
CC
0.2 V
CC
0.8 V
CC
0.2 V
CC
t
SCYC
Internal shift clock mode
0.2 V
CC
0.2 V
CC
0.8 V
CC
0.8 V
CC
tSLOVE
t
IVSHE
t
SHIXE
2.4 V
0.8 V
SCK
SOT
SIN
0.8 V
CC
0.2 V
CC
0.8 V
CC
0.2 V
CC
t
SLSH
t
SHSL
t
R
0.8 V
CC
t
F
External shift clock mode
MB95260H/270H/280H Series
62 DS07–12627–7E
Sampling is executed at the falling edge of the sampling clock*1, and serial clock delay is disabled*2.
(ESCR register: SCES bit = 1, ECCR register: SCDE bit = 0)
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or
a falling edge of the serial clock.
*2: The serial clock delay function is a function used to delay the output signal of the serial clock for half the clock.
*3: See “(2) Source Clock / Machine Clock” for tMCLK.
Parameter Symbol Pin name Condition Value Unit
Min Max
Serial clock cycle time tSCYC SCK
Internal clock
operation output pin:
CL = 80 pF + 1 TTL
5 tMCLK*3—ns
SCK ↑→ SOT delay time tSHOVI SCK, SOT 95 + 95 ns
Valid SIN SCK tIVSLI SCK, SIN tMCLK*3 + 190 ns
SCK ↓→ valid SIN hold time tSLIXI SCK, SIN 0 ns
Serial clock “H” pulse width tSHSL SCK
External clock
operation output pin:
CL = 80 pF + 1 TTL
3 tMCLK*3 tR—ns
Serial clock “L” pulse width tSLSH SCK tMCLK*3 + 95 ns
SCK ↑→ SOT delay time tSHOVE SCK, SOT 2 tMCLK*3 + 95 ns
Valid SIN SCK tIVSLE SCK, SIN 190 ns
SCK ↓→ valid SIN hold time tSLIXE SCK, SIN tMCLK*3 + 95 ns
SCK fall time tFSCK 10 ns
SCK rise time tRSCK 10 ns
MB95260H/270H/280H Series
DS07–12627–7E 63
0.8 V
2.4 V2.4 V
tSHOVI
tIVSLI tSLIXI
2.4 V
0.8 V
SCK
SOT
SIN
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
tSCYC
Internal shift clock mode
0.2 V
CC
0.2 V
CC
0.2 V
CC
0.8 V
CC
tSHOVE
t
IVSLE
t
SLIXE
2.4 V
0.8 V
SCK
SOT
SIN
0.8 V
CC
0.2 V
CC
0.8 V
CC
0.2 V
CC
t
SHSL
t
SLSH
t
F
0.8 V
CC
t
R
External shift clock mode
MB95260H/270H/280H Series
64 DS07–12627–7E
Sampling is executed at the rising edge of the sampling clock*1, and serial clock delay is enabled*2.
(ESCR register: SCES bit = 0, ECCR register: SCDE bit = 1)
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1: There is a function used to choose whether the sampling of reception data is performed at a rising edge or
a falling edge of the serial clock.
*2: The serial clock delay function is a function that delays the output signal of the serial clock for half clock.
*3: See “(2) Source Clock / Machine Clock” for tMCLK.
Parameter Symbol Pin name Condition Value Unit
Min Max
Serial clock cycle time tSCYC SCK
Internal clock
operation output pin:
CL = 80 pF + 1 TTL
5 tMCLK*3—ns
SCK ↑→ SOT delay time tSHOVI SCK, SOT 95 + 95 ns
Valid SIN SCK tIVSLI SCK, SIN tMCLK*3 + 190 ns
SCK ↓→ valid SIN hold time tSLIXI SCK, SIN 0 ns
SOT SCK delay time tSOVLI SCK, SOT 4 tMCLK*3ns
2.4 V
0.8 V0.8 V
tSHOVI
tSOVLI
tIVSLI tSLIXI
2.4 V
0.8 V
2.4 V
0.8 V
SCK
SOT
SIN 0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
tSCYC
MB95260H/270H/280H Series
DS07–12627–7E 65
Sampling is executed at the falling edge of the sampling clock*1, and serial clock delay is enabled*2.
(ESCR register: SCES bit = 1, ECCR register: SCDE bit = 1)
(VCC = 5.0 V±10%, VSS = 0.0 V, TA = -40°C to + 85°C)
*1:There is a function used to choose whether the sampling of reception data is performed at a rising edge or
a falling edge of the serial clock.
*2: The serial clock delay function is a function that delays the output signal of the serial clock for half clock.
*3: See “(2) Source Clock / Machine Clock” for tMCLK.
Parameter Symbol Pin name Condition Value Unit
Min Max
Serial clock cycle time tSCYC SCK
Internal clock
operating output pin:
CL = 80 pF + 1 TTL
5 tMCLK*3—ns
SCK ↓→ SOT delay time tSLOVI SCK, SOT 95 + 95 ns
Valid SIN SCK tIVSHI SCK, SIN tMCLK*3 + 190 ns
SCK ↑→ valid SIN hold time tSHIXI SCK, SIN 0 ns
SOT SCK delay time tSOVHI SCK, SOT 4 tMCLK*3ns
0.8 V
2.4 V 2.4 V
tSLOVI
tSOVHI
tIVSHI tSHIXI
2.4 V
0.8 V
2.4 V
0.8 V
SCK
SOT
SIN 0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
tSCYC
MB95260H/270H/280H Series
66 DS07–12627–7E
(7) Low-voltage Detection
(VSS = 0.0 V, TA = -40°C to + 85°C)
Parameter Symbol Value Unit Remarks
Min Typ Max
Release voltage VDL+2.52 2.7 2.88 V At power supply rise
Detection voltage VDL2.42 2.6 2.78 V At power supply fall
Hysteresis width VHYS 70 100 mV
Power supply start voltage Voff ——2.3V
Power supply end voltage Von 4.9 V
Power supply voltage
change time
(at power supply rise)
tr3000 µs
Slope of power supply that the reset
release signal generates within the
rating (VDL+)
Power supply voltage
change time
(at power supply fall)
tf300 µs
Slope of power supply that the reset
detection signal generates within the
rating (VDL-)
Reset release delay time td1 ——300µs
Reset detection delay time td2 20 µs
VHYS
td2 td1
tr
tf
VCC
Internal reset signal
Von
Voff
VDL+
VDL-
time
time
MB95260H/270H/280H Series
DS07–12627–7E 67
5. A/D Converter
(1) A/D Converter Electrical Characteristics
(VCC = 4.0 V to 5.5 V, VSS = 0.0 V, TA = -40°C to + 85°C)
Parameter Symbol Value Unit Remarks
Min Typ Max
Resolution
——10bit
Total error 3— + 3LSB
Linearity error 2.5 + 2.5 LSB
Differential linear
error 1.9 + 1.9 LSB
Zero transition
voltage VOT VSS 1.5 LSB VSS + 0.5 LSB VSS + 2.5 LSB V
Full-scale transition
voltage VFST VCC 4.5 LSB VCC 2 LSB VCC + 0.5 LSB V
Compare time 0.9 16500 µs 4.5 V VCC 5.5 V
1.8 16500 µs 4.0 V VCC < 4.5 V
Sampling time
0.6 µs
4.5 V VCC 5.5 V,
with external
impedance < 5.4 kΩ
1.2 µs
4.0 V VCC < 4.5 V,
with external
impedance < 2.4 kΩ
Analog input current IAIN 0.3 + 0.3 µA
Analog input voltage VAIN VSS —VCC V
MB95260H/270H/280H Series
68 DS07–12627–7E
(2) Notes on Using the A/D Converter
External impedance of analog input and its sampling time
The A/D converter has a sample and hold circuit. If the external impedance is too high to keep sufficient
sampling time, the analog voltage charged to the capacitor of the internal sample and hold circuit is
insufficient, adversely affecting A/D conversion precision. Therefore, to satisfy the A/D conversion precision
standard, considering the relationship between the external impedance and minimum sampling time, either
adjust the register value and operating frequency or decrease the external impedance so that the sampling
time is longer than the minimum value. In addition, if sufficient sampling time cannot be secured, connect
a capacitor of about 0.1 µF to the analog input pin.
A/D conversion error
As |VCCVSS| decreases, the A/D conversion error increases proportionately.
ComparatorAnalog input
During sampling: ON
Note: The values are reference values.
~
~~
~
4.5 V <VCC <5.5 V : R 1.95 kΩ (Max), C 17 pF (Max)
~
~~
~
<
4.0 V VCC < 4.5 V : R 8.98 kΩ (Max), C 17 pF (Max)
RC
Analog input equivalent circuit
[External impedance = 0 kΩ to 100 kΩ]
External impedance [kΩ]
External impedance [kΩ]
Minimum sampling time [μs]Minimum sampling time [μs]
[External impedance = 0 kΩ to 20 kΩ]
100
90
80
70
60
50
40
30
20
10
0
20
18
16
14
12
10
8
6
4
2
0
0246810 12 14 10234
(VCC > 4.5 V)
(VCC > 4.0 V)
(VCC > 4.5 V)
(VCC > 4.0 V)
Relationship between external impedance and minimum sampling time
MB95260H/270H/280H Series
DS07–12627–7E 69
(3) Definitions of A/D Converter Terms
Resolution
It indicates the level of analog variation that can be distinguished by the A/D converter.
When the number of bits is 10, analog voltage can be divided into 210 = 1024.
Linearity error (unit: LSB)
It indicates how much an actual conversion value deviates from the straight line connecting
the zero transition point (“00 0000 0000” ← → “00 0000 0001”) of a device to
the full-scale transition point (“11 1111 1111” ← → “11 1111 1110”) of the same device.
Differential linear error (unit: LSB)
It indicates how much the input voltage required to change the output code by 1 LSB deviates from an
ideal value.
Total error (unit: LSB)
It indicates the difference between an actual value and a theoretical value. The error can be caused by a
zero transition error, a full-scale transition errors, a linearity error, a quantum error, or noise.
(Continued)
VSS
VFST
Ideal I/O characteristics
VCC
001H
002H
003H
004H
3FDH
3FEH
3FFH
Digital output
Digital output
2 LSB
VOT
1 LSB
0.5 LSB
To t al error
Analog inputAnalog input
001H
002H
003H
004H
3FDH
3FEH
3FFH
Actual conversion
characteristic
Ideal characteristic
Actual conversion
characteristic
N
VNT
: A/D converter digital output value
: Voltage at which the digital output transits from (N - 1)H to NH
{1 LSB × (N-1) + 0.5 LSB}
VNT
VSS VCC
To t al error of
digital output N
VNT - {1 LSB × (N - 1) + 0.5 LSB}
1 LSB[LSB]=
VCC - VSS
1024 (V)1 LSB =
MB95260H/270H/280H Series
70 DS07–12627–7E
(Continued)
Zero transition error
Linearity error
Full-scale transition error
001H
002H
003H
004H
3FDH
3FEH
3FFH
Digital output
Differential linear error
of digital output N
V(N+1)T - VNT
1 LSB- 1=
Linearity error
of digital output N
VNT - {1 LSB × N + VOT}
1 LSB
=
Digital output
Analog input
001H
002H
3FCH
3FDH
003H
3FEH
3FFH
004H
Actual conversion
characteristic
Actual conversion
characteristic
VOT (measurement value)
Actual conversion
characteristic
Actual conversion
characteristic
VFST
(measurement
value)
VSS VCC
Analog input
VSS VCC
Digital output
Analog input
VSS VCC
Ideal characteristic
{1 LSB × N + VOT}
Actual conversion
characteristic
Ideal
characteristic
Actual conversion
characteristic
VOT (measurement value)
VNT
Differential linearity error
(N - 2)H
(N - 1)H
NH
(N + 1)H
Digital output
Analog input
VSS VCC
Actual conversion
characteristic
Ideal characteristic
VNT
Actual conversion
characteristic V(N+1)T
N
VNT
: A/D converter digital output value
: Voltage at which the digital output transits from (N - 1)H to NH
VOT (ideal value) = VSS + 0.5 LSB [V]
VFST (ideal value) = VCC - 2 LSB [V]
VFST
(measurement
value)
Ideal
characteristic
MB95260H/270H/280H Series
DS07–12627–7E 71
6. Flash Memory Program/Erase Characteristics
*1: TA = + 25 °C, VCC = 5.0 V, 100000 cycles
*2: TA = + 85 °C, VCC = 3.0 V, 100000 cycles
*3: This value is converted from the result of a technology reliability assessment. (The value is converted from
the result of a high temperature accelerated test using the Arrhenius equation with the average temperature
being + 85°C) .
Parameter Value Unit Remarks
Min Typ Max
Sector erase time
(2 Kbyte sector) —0.2*
10.5*2sThe time of writing 00H prior to
erasure is excluded.
Sector erase time
(16 Kbyte sector) —0.5*
17.5*2sThe time of writing 00H prior to
erasure is excluded.
Byte writing time 21 6100*2µs System-level overhead is excluded.
Program/erase cycle 100000 cycle
Power supply voltage at
program/erase 3.0 5.5 V
Flash memory data retention
time 20*3 year Average TA = + 85°C
MB95260H/270H/280H Series
72 DS07–12627–7E
SAMPLE CHARACTERISTICS
Power supply current temperature
(Continued)
0
5
10
15
20
234567
Vcc [V]
Icc [mA]
FMP = 16 MHz
FMP = 10 MHz
FMP = 8 MHz
FMP = 4 MHz
FMP = 2 MHz
0
5
10
15
20
50 0 +50 +100 +150
Icc [mA]
FMP = 16 MHz
FMP = 10 MHz
TA [°C]
0
5
10
15
20
234567
Vcc [V]
I
CCS
[mA]
F
MP
= 16 MHz
F
MP
= 10 MHz
F
MP
= 8 MHz
F
MP
= 4 MHz
F
MP
= 2 MHz
0
5
10
15
20
50 0 +50 +100 +150
I
CCS
[mA]
T
A
[°C]
F
MP
= 16 MHz
F
MP
= 10MHz
0
25
50
75
100
234567
Vcc [V]
IccL [μA]
0
25
50
75
100
50 0 +50 +100 +150
IccL [μA]
TA [°C]
Icc Vcc
TA = + 25 °C FMP = 2, 4, 8, 10, 16 MHz (divided by 2)
Main clock mode with the external clock operating
Icc TA
Vcc = 5.5 V FMP = 10, 16 MHz (divided by 2)
Main clock mode with the external clock operating
Iccs Vcc
TA = + 25 °C FMP = 2, 4, 8, 10, 16 MHz (divided by 2)
Main sleep mode with the external clock operating
Iccs TA
Vcc = 5.5 V FMP = 10, 16 MHz (divided by 2)
Main sleep mode with the external clock operating
ICCL Vcc
TA = + 25 °C FMPL = 16 kHz (divided by 2)
Subclock mode with the external clock operating
ICCL TA
Vcc = 5.5 V FMPL = 16 kHz (divided by 2)
Subclock mode with the external clock operating
MB95260H/270H/280H Series
DS07–12627–7E 73
(Continued)
0
10
20
30
40
50
60
70
80
234567
Vcc [V]
Icc
LS
[μA]
0
10
20
30
40
50
60
70
80
50 0 +50 +100 +150
IccLS [μA]
TA [°C]
0
4
8
12
16
20
234567
Vcc [V]
Icc
T
[μA]
0
4
8
12
16
20
50 0 +50 +100 +150
IccT [μA]
TA [°C]
0
0.2
0.4
0.6
0.8
1
1.2
1.4
234567
Vcc [V]
I
CTS
[mA]
F
MP
= 16 MHz
F
MP
= 10 MHz
F
MP
= 8 MHz
F
MP
= 4 MHz
F
MP
= 2 MHz
0
0.2
0.4
0.6
0.8
1
1.2
1.4
50 0 +50 +100 +150
T
A
[°C]
F
MP
= 16 MHz
F
MP
= 10 MHz
I
CTS
[mA]
ICCLS Vcc
TA = + 25 °C FMPL = 16 kHz (divided by 2)
Subsleep mode with the external clock operating
ICCLS TA
Vcc = 5.5 V FMPL = 16 kHz (divided by 2)
Subsleep mode with the external clock operating
ICCT Vcc
TA = + 25 °C FMPL = 16 kHz (divided by 2)
Watch mode with the external clock operating
ICCT TA
Vcc = 5.5 V FMPL = 16 kHz (divided by 2)
Watch mode with the external clock operating
ICTS Vcc
TA = + 25 °C FMP = 2, 4, 8, 10, 16 MHz (divided by 2)
Time-base timer mode with the external clock
operating
ICTS TA
Vcc = 5.5 V FMP = 10, 16 MHz (divided by 2)
Time-base timer mode with the external clock
operating
MB95260H/270H/280H Series
74 DS07–12627–7E
(Continued)
0
4
8
12
16
20
50 0 +50 +100 +150
IccH [μA]
TA [°C]
0
5
10
15
20
234567
Vcc [V]
ICCMCR [mA]
FMP = 10 MHz
FMP = 8 MHz
FMP = 1 MHz
0
5
10
15
20
50 0 +50 +100 +150
I
CCMCR
[mA]
T
A
[°C]
FMP = 10 MHz
FMP = 8 MHz
FMP = 1 MHz
0
50
100
150
200
234567
Vcc [V]
I
CCSCR
[μA]
0
50
100
150
200
50 0 +50 +100 +150
I
CCSCR
[μA]
T
A
[°C]
0
4
8
12
16
20
2345 76
Vcc [V]
Icc
H
[ A]
ICCH Vcc
TA = + 25 °C FMPL = (stop)
Substop mode with the external clock stopping
ICCH TA
Vcc = 5.5 V FMPL = (stop)
Substop mode with the external clock stopping
ICCMCR Vcc
TA = + 25 °C FMP = 1, 8, 10 MHz (no division)
Main clock mode
with the main CR clock operating
ICCMCR TA
Vcc = 5.5 V FMP = 1, 8, 10 MHz (no division)
Main clock mode
with the main CR clock operating
ICCSCR Vcc
TA = + 25 °C FMPL = 50 kHz (divided by 2)
Subclock mode with
the sub-CR clock operating
ICCSCR TA
Vcc = 5.5 V FMPL = 50 kHz (divided by 2)
Subclock mode with
the sub-CR clock operating
MB95260H/270H/280H Series
DS07–12627–7E 75
Input voltage
VIHI - VCC and VILI - VCC
TA=+25°C
VCC[V]
VIHI/VILI[V]
234567
5
4
3
2
1
0
VIHI
VILI
VIHS - VCC and VILS - VCC
TA=+25°C
VCC[V]
VIHS/VILS[V]
234567
5
4
3
2
1
0
VILS
VIHS
VIHM - VCC and VILM - VCC
TA=+25°C
VCC[V]
VIHM/VILM[V]
234567
5
4
3
2
1
0
VILM
VIHM
MB95260H/270H/280H Series
76 DS07–12627–7E
Output voltage
Vcc = 2.4 V
Vcc = 2.7 V
Vcc = 3.5 V
Vcc = 4.5 V
Vcc = 5.0 V
Vcc = 5.5 V
0
0.2
0.4
0.6
0.8
1
1086420
I
OH
[mA]
Vcc - V
OH1
[V]
Vcc = 2.4 V
Vcc = 2.7 V
Vcc = 3.5 V
Vcc = 4.5 V
Vcc = 5.0 V
Vcc = 5.5 V
0
0.2
0.4
0.6
0.8
1
121086420
I
OH
[mA]
Vcc - V
OH2
[V]
Vcc = 2.4 V
Vcc = 2.7 V
Vcc = 3.5 V
Vcc = 4.5 V
Vcc = 5.0 V
Vcc = 5.5 V
0
0.2
0.4
0.6
0.8
1
0246810
IOL [mA]
V
OL1
[V]
Vcc = 2.4 V
Vcc = 2.7 V
Vcc = 3.5 V
Vcc = 4.5 V
Vcc = 5.0 V
Vcc = 5.5 V
0
0.2
0.4
0.6
0246810 12
IOL [mA]
V
OL2
[V]
(Vcc VOH1) IOH
TA = + 25 °C
(Vcc VOH2) IOH
TA = + 25 °C
VOL1 IOL
TA = + 25 °C
VOL2 IOL
TA = + 25 °C
MB95260H/270H/280H Series
DS07–12627–7E 77
•Pull-up
0
50
100
150
200
250
23456
VCC [V]
RPULL [kΩ]
RPULL-Vcc
TA = + 25 °C
MB95260H/270H/280H Series
78 DS07–12627–7E
MASK OPTIONS
No. Part Number
MB95F262H
MB95F263H
MB95F264H
MB95F272H
MB95F273H
MB95F274H
MB95F282H
MB95F283H
MB95F284H
MB95F262K
MB95F263K
MB95F264K
MB95F272K
MB95F273K
MB95F274K
MB95F282K
MB95F283K
MB95F284K
Selectable/Fixed Fixed
1 Low-voltage detection reset Without low-voltage detection reset With low-voltage detection reset
2 Reset With dedicated reset input Without dedicated reset input
MB95260H/270H/280H Series
DS07–12627–7E 79
ORDERING INFORMATION
(Continued)
Part Number Package
MB95F262HWQN-G-SNE1
MB95F262HWQN-G-SNERE1
MB95F262KWQN-G-SNE1
MB95F262KWQN-G-SNERE1
MB95F263HWQN-G-SNE1
MB95F263HWQN-G-SNERE1
MB95F263KWQN-G-SNE1
MB95F263KWQN-G-SNERE1
MB95F264HWQN-G-SNE1
MB95F264HWQN-G-SNERE1
MB95F264KWQN-G-SNE1
MB95F264KWQN-G-SNERE1
32-pin plastic QFN
(LCC-32P-M19)
MB95F262HP-G-SH-SNE2
MB95F262KP-G-SH-SNE2
MB95F263HP-G-SH-SNE2
MB95F263KP-G-SH-SNE2
MB95F264HP-G-SH-SNE2
MB95F264KP-G-SH-SNE2
24-pin plastic SDIP
(DIP-24P-M07)
MB95F262HPF-G-SNE2
MB95F262KPF-G-SNE2
MB95F263HPF-G-SNE2
MB95F263KPF-G-SNE2
MB95F264HPF-G-SNE2
MB95F264KPF-G-SNE2
20-pin plastic SOP
(FPT-20P-M09)
MB95F262HPFT-G-SNE2
MB95F262KPFT-G-SNE2
MB95F263HPFT-G-SNE2
MB95F263KPFT-G-SNE2
MB95F264HPFT-G-SNE2
MB95F264KPFT-G-SNE2
20-pin plastic TSSOP
(FPT-20P-M10)
MB95F282HWQN-G-SNE1
MB95F282HWQN-G-SNERE1
MB95F282KWQN-G-SNE1
MB95F282KWQN-G-SNERE1
MB95F283HWQN-G-SNE1
MB95F283HWQN-G-SNERE1
MB95F283KWQN-G-SNE1
MB95F283KWQN-G-SNERE1
MB95F284HWQN-G-SNE1
MB95F284HWQN-G-SNERE1
MB95F284KWQN-G-SNE1
MB95F284KWQN-G-SNERE1
32-pin plastic QFN
(LCC-32P-M19)
MB95F282HPH-G-SNE2
MB95F282KPH-G-SNE2
MB95F283HPH-G-SNE2
MB95F283KPH-G-SNE2
MB95F284HPH-G-SNE2
MB95F284KPH-G-SNE2
16-pin plastic DIP
(DIP-16P-M06)
MB95260H/270H/280H Series
80 DS07–12627–7E
(Continued)
Part Number Package
MB95F282HPF-G-SNE1
MB95F282KPF-G-SNE1
MB95F283HPF-G-SNE1
MB95F283KPF-G-SNE1
MB95F284HPF-G-SNE1
MB95F284KPF-G-SNE1
16-pin plastic SOP
(FPT-16P-M06)
MB95F272HPH-G-SNE2
MB95F272KPH-G-SNE2
MB95F273HPH-G-SNE2
MB95F273KPH-G-SNE2
MB95F274HPH-G-SNE2
MB95F274KPH-G-SNE2
8-pin plastic DIP
(DIP-8P-M03)
MB95F272HPF-G-SNE2
MB95F272KPF-G-SNE2
MB95F273HPF-G-SNE2
MB95F273KPF-G-SNE2
MB95F274HPF-G-SNE2
MB95F274KPF-G-SNE2
8-pin plastic SOP
(FPT-8P-M08)
MB95260H/270H/280H Series
DS07–12627–7E 81
PACKAGE DIMENSION
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
24-pin plastic SDIP Lead pitch 1.778 mm
Package width
×
package length
6.40 mm × 22.86 mm
Sealing method Plastic mold
Mounting height 4.80 mm Max
24-pin plastic SDIP
(DIP-24P-M07)
(DIP-24P-M07)
C
2008-2010 FUJITSU SEMICONDUCTOR LIMITED D24066S-c-1-2
#22.86±0.10(.900±.004)
INDEX
TYP.
7.62(.300)
6.40±0.10
(.252±.004)
BTM E-MARK
0.04
+.004
.002.010
0.25 +0.10
112
24 13
4.80(.189)MAX
+0.20
0.30
+.008
.012
3.00 .118
1.778(.070)
(.039±.004)
1.00±0.10 +0.09
0.04
+.004
.002
.017
0.43
MIN
0.50(.020)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
Note 1) Pins width and pins thickness include plating thickness.
Note 2) Pins width do not include tie bar cutting remainder.
Note 3) # : These dimensions do not include resin protrusion.
MB95260H/270H/280H Series
82 DS07–12627–7E
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
32-pin plastic QFN Lead pitch 0.50 mm
Package width ×
package length 5.00 mm × 5.00 mm
Sealing method Plastic mold
Mounting height 0.80 mm MAX
Weight 0.06 g
32-pin plastic QFN
(LCC-32P-M19)
(LCC-32P-M19)
(.010 )
C
2009-2010 FUJITSU SEMICONDUCTOR LIMITED C32071S-c-1-2
(.197±.004)
5.00±0.10
5.00±0.10
(.197±.004)
(3-R0.20)
((3-R.008))
0.50(.020) 1PIN CORNER
(C0.30(C.012))
0.75±0.05
(0.20(.008))
INDEX AREA
0.40±0.05
(.016±.002)
+0.03
0.02
.001
+.001
0.02
(.001 )
(.138±.004)
3.50±0.10
3.50±0.10
(.138±.004)
(TYP)
(.030±.002)
+0.05
0.07
.003
+.002
0.25
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB95260H/270H/280H Series
DS07–12627–7E 83
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
20-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
7.50 mm × 12.70 mm
Lead shape Gullwing
Lead bend
direction Normal bend
Sealing method Plastic mold
Mounting height 2.65 mm Max
20-pin plastic SOP
(FPT-20P-M09)
(FPT-20P-M09)
C
2008-2010 FUJITSU SEMICONDUCTOR LIMITED F20030S-c-1-2
Details of "A" part
INDEX
0.10(.004)
(.008±.004)
0.20±0.10
.007
+.005
.099
0.17
+0.13
2.52 (Mounting height)
0~8°
(Stand off)
0.80 +0.47
0.30
.031+.019
.012
"A"
.001
+.003
.010
0.25 +0.07
0.02
#12.70±0.10(.500±.004)
1120
1.27(.050)
1 10
0.25(.010) M
0.05
+0.09
0.40
.016 +.004
.002
#7.50±0.10
(.295±.004)
0.20
+0.40
10.2
.402 +.016
.008
BTM E-MARK
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) Pins width and pins thickness include plating thickness.
Note 2) Pins width do not include tie bar cutting remainder.
Note 3) # : These dimensions do not include resin protrusion.
MB95260H/270H/280H Series
84 DS07–12627–7E
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
20-pin plastic TSSOP Lead pitch 0.65 mm
Package width ×
package length 4.40 mm × 6.50 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.20 mm MAX
Weight 0.08 g
20-pin plastic TSSOP
(FPT-20P-M10)
(FPT-20P-M10)
C
2009-2010 FUJITSU SEMICONDUCTOR LIMITED F20031S-c-1-2
#6.50±0.10(.256±.004)
#4.40±0.10 6.40±0.20
(.252±.008)(.173±.004)
0.10(.004)
0.65(.026) 0.24±0.04
(.009±.002)
110
20 11
"A"
Details of "A" part
0~8°
(.024±.006)
0.60±0.15
MAX
1.20(.047) (Mounting height)
0.10±0.05
(Stand off)
LEAD No.
INDEX
BTM E-MARK
(.004±.002)
0.14 +0.05
–0.04
+.002
–.002.006
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) Pins width and pins thickness include plating thickness.
Note 2) Pins width do not include tie bar cutting remainder.
Note 3) # : These dimensions do not include resin protrusion.
MB95260H/270H/280H Series
DS07–12627–7E 85
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
16-pin plastic DIP Lead pitch 2.54 mm
Sealing method
Plastic mold
16-pin plastic DIP
(DIP-16P-M06)
(DIP-16P-M06)
C
2006-2010 FUJITSU SEMICONDUCTOR LIMITED D16125S-c-1-3
0.25±0.05
(.010±.002)
15° MAX
.770 .012
+.008
0.30
+0.20
19.55
INDEX
0.50(.020)
MIN
TYP.
2.54(.100)
(.018±.003)
0.46±0.08
3.00(.118)MIN
4.36(.172)MAX
1.52
.060 0
+.012
0
+0.30
MAX
1.27(.050)
TYP.
7.62(.300)
6.35±0.25
(.250±.010)
.039
0.99
+.012
0
+0.30
0
Dimensions in mm (inches).
Note: The values in parentheses are reference values
MB95260H/270H/280H Series
86 DS07–12627–7E
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
16-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
5.3 × 10.15 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 2.25 mm MAX
Weight 0.20 g
Code
(Reference) P-SOP16-5.3×10.15-1.27
16-pin plastic SOP
(FPT-16P-M06)
(FPT-16P-M06)
C
2002-2010 FUJITSU SEMICONDUCTOR LIMITED F16015S-c-4-9
0.13(.005) M
Details of "A" part
7.80±0.405.30±0.30
(.209±.012) (.307±.016)
–.008
+.010
–0.20
+0.25
10.15
INDEX
1.27(.050)
0.10(.004)
18
916
0.47±0.08
(.019±.003)
–0.04
+0.03
0.17
.007 +.001
–.002
"A" 0.25(.010)
(Stand off)
0~8°
(Mounting height)
2.00 +0.25
–0.15
.079 +.010
–.006
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10 +0.10
–0.05
–.002
+.004
.004
.400
*
1
*
2
0.10(.004)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB95260H/270H/280H Series
DS07–12627–7E 87
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
8-pin plastic DIP Lead pitch 2.54 mm
Sealing method
Plastic mold
8-pin plastic DIP
(DIP-8P-M03)
(DIP-8P-M03)
C
2006-2010 FUJITSUSEMICONDUCTOR LIMITED D08008S-c-1-4
0.25±0.05
(.010±.002)
15° MAX
.370 .012
+.016
0.30
+0.40
9.40
(.250±.010)
6.35±0.25
INDEX
14
85
0.50(.020)
MIN
TYP.
2.54(.100)
(.018±.003)
0.46±0.08
3.00(.118)MIN
4.36(.172)MAX
1.52
.060 0
+.012
0
+0.30
0
00.99 +0.30
+.012
.039
.035
0.89
+.014
+0.35
–.012
0.30
TYP.
7.62(.300)
Dimensions in mm (inches).
Note: The values in parentheses are reference values
MB95260H/270H/280H Series
88 DS07–12627–7E
(Continued)
Please check the latest Package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
8-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
5.30 mm × 5.24 mm
Lead shape Gullwing
Lead bend
direction Normal bend
Sealing method Plastic mold
Mounting height 2.10 mm Max
8-pin plastic SOP
(FPT-8P-M08)
(FPT-8P-M08)
C
2008-2010 FUJITSU SEMICONDUCTOR LIMITED F08016S-c-1-2
Details of "A" part
#5.30±0.10
(.209±.004)
INDEX
1.27(.050)
14
58
0.43±0.05
(.017±.002)
"A"
(Stand off)
0~8°
(Mounting height)
2.10(.083)
MAX
0.10 +0.15
0.05
.002
+.006
.004
7.80 +0.45
0.10
+.018
.004.307
#5.24±0.10
(.206±.004)
BTM E-MARK
0.20±0.05
(.008±.002)
+0.10
0.200.75
.030 +.004
.008
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) Pins width and pins thickness include plating thickness.
Note 2) Pins width do not include tie bar cutting remainder.
Note 3) # : These dimensions do not include resin protrusion.
MB95260H/270H/280H Series
DS07–12627–7E 89
MAJOR CHANGES IN THIS EDITION
A change on a page is indicated by a vertical line drawn on the left side of that page.
Page Section Details
1—
Changed the family name.
F2MC-8FX New 8FX
2FEATURES Added “• Power-on reset”.
3PRODUCT LINE-UP
• MB95260H Series
Added the parameter “Power-on reset”.
5PRODUCT LINE-UP
• MB95270H Series
Added the parameter “Power-on reset”.
6PRODUCT LINE-UP
• MB95280H Series
Added the parameter “Power-on reset”.
10 PIN ASSIGNMENT Deleted the HCLK1 pin and the HCLK2 pin.
11 Deleted the HCLK1 pin and the HCLK2 pin.
13 PIN DESCRIPTION (MB95260H
Series, 32 pins)
Deleted the HCLK1 pin and the HCLK2 pin.
15 PIN DESCRIPTION (MB95260H
Series, 24 pins)
Deleted the HCLK1 pin and the HCLK2 pin.
17 PIN DESCRIPTION (MB95260H
Series, 20 pins)
Deleted the HCLK1 pin and the HCLK2 pin.
18 PIN DESCRIPTION (MB95270H
Series, 8 pins)
Deleted the HCLK1 pin and the HCLK2 pin.
19 PIN DESCRIPTION (MB95280H
Series, 32 pins)
Deleted the HCLK1 pin.
20 Deleted the HCLK2 pin.
21 PIN DESCRIPTION (MB95280H
Series, 16 pins)
Deleted the HCLK1 pin.
22 Deleted the HCLK2 pin.
27 BLOCK DIAGRAM (MB95260H
Series)
Deleted the HCLK1 pin and the HCLK2 pin.
28 BLOCK DIAGRAM (MB95270H
Series)
Deleted the HCLK1 pin and the HCLK2 pin.
29 BLOCK DIAGRAM (MB95280H
Series)
Deleted the HCLK1 pin and the HCLK2 pin.
52, 53 ELECTRICAL CHARACTERISTICS
4. AC Characteristics
(1) Clock Timing
Deleted all information about the HCLK1 pin and the HCLK2
pin in the table.
54
Deleted the HCLK1 pin and the HCLK2 pin in the “• Input
waveform generated when an external clock (main clock) is
used”.
Deleted the external connection diagram for the HCLK1 pin
and the HCLK2 pin in “• Figure of main clock input port
external connection”.
MB95260H/270H/280H Series
90 DS07–12627–7E
MEMO
MB95260H/270H/280H Series
DS07–12627–7E 91
MEMO
MB95260H/270H/280H Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
North and South America
FUJITSU SEMICONDUCTOR AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
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Europe
FUJITSU SEMICONDUCTOR EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/semiconductor/
Korea
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Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fsk/
Asia Pacific
FUJITSU SEMICONDUCTOR ASIA PTE. LTD.
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#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://sg.fujitsu.com/semiconductor/
FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD.
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Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fss/
FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fsp/
Specifications are subject to change without notice. For further information please contact each office.
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The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does
not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
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Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
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The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
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weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages aris-
ing in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-
current levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations
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The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department